1 /*
2  * Copyright 2022 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef FSL_EVTG_H_
9 #define FSL_EVTG_H_
10 
11 #include "fsl_common.h"
12 
13 /*!
14  * @addtogroup evtg
15  * @{
16  */
17 
18 /*******************************************************************************
19  * Definitions
20  ******************************************************************************/
21 
22 /*! @name Driver version */
23 /*! @{ */
24 /*! @brief EVTG driver version. */
25 #define FSL_EVTG_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) /*!< Version 2.0.1. */
26 /*! @} */
27 
28 /*! @brief EVTG instance index. */
29 typedef enum _evtg_index
30 {
31     kEVTG_Index0 = 0x0U, /*!< EVTG instance index 0. */
32     kEVTG_Index1,        /*!< EVTG instance index 1. */
33     kEVTG_Index2,        /*!< EVTG instance index 2. */
34     kEVTG_Index3,        /*!< EVTG instance index 3. */
35 } evtg_index_t;
36 
37 /*! @brief EVTG input index. */
38 typedef enum _evtg_input_index
39 {
40     kEVTG_InputA = 0x0U, /*!< EVTG input A. */
41     kEVTG_InputB,        /*!< EVTG input B. */
42     kEVTG_InputC,        /*!< EVTG input C. */
43     kEVTG_InputD,        /*!< EVTG input D. */
44 } evtg_input_index_t;
45 
46 /*! @brief EVTG AOI index. */
47 typedef enum _evtg_aoi_index
48 {
49     kEVTG_AOI0 = 0x0U, /*!< EVTG AOI index 0. */
50     kEVTG_AOI1 = 0x1U, /*!< EVTG AOI index 1. */
51 } evtg_aoi_index_t;
52 
53 /*! @brief EVTG AOI product term index. */
54 typedef enum _evtg_aoi_product_term
55 {
56     kEVTG_ProductTerm0 = 0x0U, /*!< EVTG AOI product term index 0. */
57     kEVTG_ProductTerm1,        /*!< EVTG AOI product term index 1. */
58     kEVTG_ProductTerm2,        /*!< EVTG AOI product term index 2. */
59     kEVTG_ProductTerm3,        /*!< EVTG AOI product term index 3. */
60 } evtg_aoi_product_term_t;
61 
62 /*! @brief EVTG input configuration. */
63 typedef enum _evtg_aoi_input_config
64 {
65     kEVTG_InputLogicZero = 0x0U, /*!< Force input in product term to a logical zero. */
66     kEVTG_InputDirectPass,       /*!< Pass input in product term. */
67     kEVTG_InputComplement,       /*!< Complement input in product term. */
68     kEVTG_InputLogicOne,         /*!< Force input in product term to a logical one. */
69 } evtg_aoi_input_config_t;
70 
71 /*! @brief EVTG AOI Output Filter Sample Count. */
72 typedef enum _evtg_aoi_outfilter_count
73 {
74     kEVTG_AOIOutFilterSampleCount3 = 0x0U, /*!< EVTG AOI output filter sample count is 3. */
75     kEVTG_AOIOutFilterSampleCount4,        /*!< EVTG AOI output filter sample count is 4. */
76     kEVTG_AOIOutFilterSampleCount5,        /*!< EVTG AOI output filter sample count is 5. */
77     kEVTG_AOIOutFilterSampleCount6,        /*!< EVTG AOI output filter sample count is 6. */
78     kEVTG_AOIOutFilterSampleCount7,        /*!< EVTG AOI output filter sample count is 7. */
79     kEVTG_AOIOutFilterSampleCount8,        /*!< EVTG AOI output filter sample count is 8. */
80     kEVTG_AOIOutFilterSampleCount9,        /*!< EVTG AOI output filter sample count is 9. */
81     kEVTG_AOIOutFilterSampleCount10,       /*!< EVTG AOI output filter sample count is 10. */
82 } evtg_aoi_outfilter_count_t;
83 
84 /*!
85  * @brief EVTG output feedback override control mode. When FF is configured as JK-FF mode,
86  *        need EVTG_OUTA feedback to EVTG input and replace one of the four inputs.
87  */
88 typedef enum _evtg_outfdbk_override_input
89 {
90     kEVTG_OutputOverrideInputA = 0x0U, /*!< Replace input A. */
91     kEVTG_OutputOverrideInputB,        /*!< Replace input B. */
92     kEVTG_OutputOverrideInputC,        /*!< Replace input C. */
93     kEVTG_OutputOverrideInputD,        /*!< Replace input D. */
94 } evtg_outfdbk_override_input_t;
95 
96 /*! @brief EVTG flip flop mode configuration. */
97 typedef enum _evtg_flipflop_mode
98 {
99     kEVTG_FFModeBypass = 0x0U, /*!< Bypass mode (default).In this mode, user can choose to enable
100                                    or disable input sync logic and filter function. */
101     kEVTG_FFModeRSTrigger,     /*!< RS trigger mode. In this mode, user can choose to enable
102                                    or disable input sync logic and filter function. */
103     kEVTG_FFModeTFF,           /*!< T-FF mode. In this mode, input sync or filter has to be enabled
104                                    to remove the possible glitch.*/
105     kEVTG_FFModeDFF,           /*!< D-FF mode. In this mode, input sync or filter has to be enabled
106                                    to remove the possible glitch.*/
107     kEVTG_FFModeJKFF,          /*!< JK-FF mode. In this mode, input sync or filter has to be enabled
108                                    to remove the possible glitch.*/
109     kEVTG_FFModeLatch,         /*!< Latch mode. In this mode, input sync or filter has to be enabled
110                                    to remove the possible glitch.*/
111 } evtg_flipflop_mode_t;
112 
113 /*! @brief EVTG flip-flop initial value. */
114 typedef enum _evtg_flipflop_init_output
115 {
116     kEVTG_FFInitOut0 = 0x0U, /*!< Configure the positive output of flip-flop as 0. */
117     kEVTG_FFInitOut1 = 0x1U, /*!< Configure the positive output of flip-flop as 1. */
118 } evtg_flipflop_init_output_t;
119 
120 /*! @brief The structure for configuring an AOI output filter sample.
121  *
122  * AOI output filter sample count represent the number of consecutive samples that must agree prior to the AOI output
123  * filter accepting an transition.
124  * AOI output filter sample period represent the sampling period (in IP bus clock cycles) of the AOI output signals.
125  * Each AOI output is sampled multiple times at the rate specified by this period.
126  *
127  * For the modes with Filter function enabled, filter delay is "(FILT_CNT + 3) x FILT_PER + 2".
128  *
129  */
130 typedef struct _evtg_aoi_outfilter_config
131 {
132     evtg_aoi_outfilter_count_t sampleCount; /*!< EVTG AOI output filter sample count.
133                                                 refer to @ref evtg_aoi_outfilter_count_t. */
134     uint8_t samplePeriod;                   /*!< EVTG AOI output filter sample period, within 0~255. If sample period
135                                                  value is 0x00 (default), then the input filter is bypassed. */
136 } evtg_aoi_outfilter_config_t;
137 
138 /*! @brief The structure for configuring an AOI product term. */
139 typedef struct _evtg_aoi_product_term_config
140 {
141     evtg_aoi_input_config_t aInput; /*!< Input A configuration. */
142     evtg_aoi_input_config_t bInput; /*!< Input B configuration. */
143     evtg_aoi_input_config_t cInput; /*!< Input C configuration. */
144     evtg_aoi_input_config_t dInput; /*!< Input D configuration. */
145 } evtg_aoi_product_term_config_t;
146 
147 /*! @brief EVTG AOI configuration structure. */
148 typedef struct _evtg_aoi_config
149 {
150     /* AOI Output Filter configuration. */
151     evtg_aoi_outfilter_config_t aoiOutFilterConfig; /*!< EVTG AOI output filter sample
152                                                         configuration structure. */
153 
154     /* Product term configuration. */
155     evtg_aoi_product_term_config_t productTerm0; /*!< Configure AOI product term0. */
156     evtg_aoi_product_term_config_t productTerm1; /*!< Configure AOI product term1. */
157     evtg_aoi_product_term_config_t productTerm2; /*!< Configure AOI product term2. */
158     evtg_aoi_product_term_config_t productTerm3; /*!< Configure AOI product term3. */
159 } evtg_aoi_config_t;
160 
161 /*! @brief EVTG configuration covering all configurable fields. */
162 typedef struct _evtg_config
163 {
164     /* Input configuration. */
165     bool enableInputASync;                             /*!< Enable/Disable EVTG A input synchronous with bus clk. */
166     bool enableInputBSync;                             /*!< Enable/Disable EVTG B input synchronous with bus clk. */
167     bool enableInputCSync;                             /*!< Enable/Disable EVTG C input synchronous with bus clk. */
168     bool enableInputDSync;                             /*!< Enable/Disable EVTG D input synchronous with bus clk. */
169     evtg_outfdbk_override_input_t outfdbkOverideinput; /*!< EVTG output feedback to EVTG input
170                                                                and replace one of the four inputs. */
171 
172     /* Flip-flop configuration. */
173     evtg_flipflop_mode_t flipflopMode; /*!< Flip-Flop can be configured as one of Bypass mode, RS trigger mode,
174                                                T-FF mode, D-FF mode, JK-FF mode, Latch mode. */
175     bool enableFlipflopInitOutput;     /*!< Flip-flop initial output value enable/disable. */
176     evtg_flipflop_init_output_t flipflopInitOutputValue; /*!< Flip-flop initial output value configuration. */
177 
178 #if defined(FSL_FEATURE_EVTG_HAS_FORCE_BYPASS_FLIPFLOP) && FSL_FEATURE_EVTG_HAS_FORCE_BYPASS_FLIPFLOP
179     bool enableForceBypassFlipFlopAOI0; /*!< Enable/Disable force bypass Flip-Flop and route the AOI_0(Filter_0)
180                                                 value directly to EVTG_OUTA */
181     bool enableForceBypassFlipFlopAOI1; /*!< Enable/Disable force bypass Flip-Flop and route the AOI_1(Filter_1)
182                                                 value directly to EVTG_OUTB */
183 #endif
184 
185     /* AOI configuration. */
186     evtg_aoi_config_t aoi0Config; /*!< Configure EVTG AOI0. */
187     evtg_aoi_config_t aoi1Config; /*!< Configure EVTG AOI1. */
188 } evtg_config_t;
189 
190 /*! @} */
191 
192 /*******************************************************************************
193  * API
194  ******************************************************************************/
195 
196 #if defined(__cplusplus)
197 extern "C" {
198 #endif
199 
200 /*!
201  * @addtogroup evtg_driver
202  * @{
203  */
204 
205 /*!
206  * @name Initialization Interfaces
207  * @{
208  */
209 
210 /*!
211  * @brief Initialize EVTG with a user configuration structure.
212  *
213  * @param base      EVTG base address.
214  * @param evtgIndex EVTG instance index.
215  * @param psConfig  EVTG initial configuration structure pointer.
216  */
217 void EVTG_Init(EVTG_Type *base, evtg_index_t evtgIndex, evtg_config_t *psConfig);
218 
219 /*!
220  * @brief Loads default values to the EVTG configuration structure.
221  *
222  *  The purpose of this API is to initialize the configuration structure to default value for @ref EVTG_Init()
223  *  to use.
224  *  The Flip-Flop can be configured as Bypass mode, RS trigger mode, T-FF mode, D-FF mode, JK-FF mode, Latch mode.
225  *  Please check RM INTC chapter for more details.
226  *
227  * @param psConfig     EVTG initial configuration structure pointer.
228  * @param flipflopMode EVTG flip flop mode. see @ ref _evtg_flipflop_mode
229  */
230 void EVTG_GetDefaultConfig(evtg_config_t *psConfig, evtg_flipflop_mode_t flipflopMode);
231 /*! @} */
232 
233 /*!
234  * @name Force Init Flipflop Interfaces
235  * @{
236  */
237 
238 /*!
239  * @brief Force Flip-flop initial output value to be presented on flip-flop positive output.
240  *
241  * @param base                    EVTG base address.
242  * @param evtgIndex               EVTG instance index.
243  * @param flipflopInitOutputValue EVTG flip-flop initial output control.
244  *                                 see @ref evtg_flipflop_init_output_t
245  */
EVTG_ForceFlipflopInitOutput(EVTG_Type * base,evtg_index_t evtgIndex,evtg_flipflop_init_output_t flipflopInitOutputValue)246 static inline void EVTG_ForceFlipflopInitOutput(EVTG_Type *base,
247                                                 evtg_index_t evtgIndex,
248                                                 evtg_flipflop_init_output_t flipflopInitOutputValue)
249 {
250     base->EVTG_INST[(uint8_t)evtgIndex].EVTG_CTRL &= (~(uint16_t)EVTG_EVTG_INST_EVTG_CTRL_FF_INIT_MASK);
251     base->EVTG_INST[(uint8_t)evtgIndex].EVTG_CTRL |=
252         EVTG_EVTG_INST_EVTG_CTRL_FF_INIT((uint16_t)flipflopInitOutputValue);
253     /* INIT_EN bit should be set after FF_INIT is set. */
254     base->EVTG_INST[(uint8_t)evtgIndex].EVTG_CTRL |= EVTG_EVTG_INST_EVTG_CTRL_INIT_EN_MASK;
255 }
256 /*! @} */
257 
258 /*!
259  * @name Input Interfaces
260  * @{
261  */
262 /*!
263  * @brief Configure each input value of AOI product term. Each selected input term in
264  *        each product term can be configured to produce a logical 0 or 1 or pass the
265  *        true or complement of the selected event input. Adapt to some simple aoi
266  *        expressions.
267  *
268  * @param base        EVTG base address.
269  * @param evtgIndex   EVTG instance index.
270  * @param aoiIndex    EVTG AOI index. see enum ref evtg_aoi_index_t
271  * @param productTerm EVTG product term index.
272  * @param inputIndex  EVTG input index.
273  * @param input       EVTG input configuration with enum @ref evtg_aoi_input_config_t.
274  */
EVTG_SetProductTermInput(EVTG_Type * base,evtg_index_t evtgIndex,evtg_aoi_index_t aoiIndex,evtg_aoi_product_term_t productTerm,evtg_input_index_t inputIndex,evtg_aoi_input_config_t input)275 static inline void EVTG_SetProductTermInput(EVTG_Type *base,
276                                             evtg_index_t evtgIndex,
277                                             evtg_aoi_index_t aoiIndex,
278                                             evtg_aoi_product_term_t productTerm,
279                                             evtg_input_index_t inputIndex,
280                                             evtg_aoi_input_config_t input)
281 {
282     if (kEVTG_AOI0 == aoiIndex)
283     {
284         if ((productTerm == kEVTG_ProductTerm0) || (productTerm == kEVTG_ProductTerm1))
285         {
286             base->EVTG_INST[(uint8_t)evtgIndex].EVTG_AOI0_BFT01 &=
287                 (uint16_t)(~(3UL << ((3U - ((uint8_t)inputIndex)) * 2U + (((3U - (uint8_t)productTerm) % 2U) * 8U))));
288             base->EVTG_INST[(uint8_t)evtgIndex].EVTG_AOI0_BFT01 |=
289                 ((((uint16_t)(input)) << ((3U - ((uint8_t)inputIndex)) * 2U +
290                                           (((3U - (uint8_t)productTerm) % 2U) * 8U))) &
291                  (uint16_t)(3UL << ((3U - ((uint8_t)inputIndex)) * 2U + (((3U - (uint8_t)productTerm) % 2U) * 8U))));
292         }
293         else
294         {
295             base->EVTG_INST[(uint8_t)evtgIndex].EVTG_AOI0_BFT23 &=
296                 (uint16_t)(~(3UL << ((3U - ((uint8_t)inputIndex)) * 2U + (((3U - (uint8_t)productTerm) % 2U) * 8U))));
297             base->EVTG_INST[(uint8_t)evtgIndex].EVTG_AOI0_BFT23 |=
298                 ((((uint16_t)(input)) << ((3U - ((uint8_t)inputIndex)) * 2U +
299                                           (((3U - (uint8_t)productTerm) % 2U) * 8U))) &
300                  (uint16_t)(3UL << ((3U - ((uint8_t)inputIndex)) * 2U + (((3U - (uint8_t)productTerm) % 2U) * 8U))));
301         }
302     }
303     else if (kEVTG_AOI1 == aoiIndex)
304     {
305         if ((productTerm == kEVTG_ProductTerm0) || (productTerm == kEVTG_ProductTerm1))
306         {
307             base->EVTG_INST[(uint8_t)evtgIndex].EVTG_AOI1_BFT01 &=
308                 (uint16_t)(~(3UL << ((3U - ((uint8_t)inputIndex)) * 2U + (((3U - (uint8_t)productTerm) % 2U) * 8U))));
309             base->EVTG_INST[(uint8_t)evtgIndex].EVTG_AOI1_BFT01 |=
310                 ((((uint16_t)(input)) << ((3U - ((uint8_t)inputIndex)) * 2U +
311                                           (((3U - (uint8_t)productTerm) % 2U) * 8U))) &
312                  (uint16_t)(3UL << ((3U - ((uint8_t)inputIndex)) * 2U + (((3U - (uint8_t)productTerm) % 2U) * 8U))));
313         }
314         else
315         {
316             base->EVTG_INST[(uint8_t)evtgIndex].EVTG_AOI1_BFT23 &=
317                 (uint16_t)(~(3UL << ((3U - ((uint8_t)inputIndex)) * 2U + (((3U - (uint8_t)productTerm) % 2U) * 8U))));
318             base->EVTG_INST[(uint8_t)evtgIndex].EVTG_AOI1_BFT23 |=
319                 ((((uint16_t)(input)) << ((3U - ((uint8_t)inputIndex)) * 2U +
320                                           (((3U - (uint8_t)productTerm) % 2U) * 8U))) &
321                  (uint16_t)(3UL << ((3U - ((uint8_t)inputIndex)) * 2U + (((3U - (uint8_t)productTerm) % 2U) * 8U))));
322         }
323     }
324     else
325     {
326         ; /* No action*/
327     }
328 }
329 
330 /*!
331  * @brief Configure AOI product term by initializing the product term
332  *        configuration structure.
333  *
334  * @param base                EVTG base address.
335  * @param evtgIndex           EVTG instance index.
336  * @param aoiIndex            EVTG AOI index. see enum @ref evtg_aoi_index_t
337  * @param productTerm         EVTG AOI product term index.
338  * @param psProductTermConfig Pointer to EVTG product term configuration structure.
339  *                            see ref _evtg_aoi_product_term_config
340  */
341 void EVTG_ConfigAOIProductTerm(EVTG_Type *base,
342                                evtg_index_t evtgIndex,
343                                evtg_aoi_index_t aoiIndex,
344                                evtg_aoi_product_term_t productTerm,
345                                evtg_aoi_product_term_config_t *psProductTermConfig);
346 
347 /*! @} */
348 
349 #if defined(__cplusplus)
350 }
351 #endif
352 
353 /*! @} */
354 
355 #endif /* FSL_EVTG_H_ */
356