1//  Memory map file to generate linker scripts for programs to run on
2//  most targets (that have the OCD option); allows I/O through the host
3//  debugger when being debugged using GDB (via the Xtensa OCD daemon).
4
5// Customer ID=7187; Build=0xac168; Copyright (c) 2006-2015 Cadence Design Systems, Inc.
6//
7// Permission is hereby granted, free of charge, to any person obtaining
8// a copy of this software and associated documentation files (the
9// "Software"), to deal in the Software without restriction, including
10// without limitation the rights to use, copy, modify, merge, publish,
11// distribute, sublicense, and/or sell copies of the Software, and to
12// permit persons to whom the Software is furnished to do so, subject to
13// the following conditions:
14//
15// The above copyright notice and this permission notice shall be included
16// in all copies or substantial portions of the Software.
17//
18// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
22// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26//  Show extra XTBOARD memory map details.
27INCLUDE_XTBOARD_MEMORIES = try
28
29
30// A memory map is a sequence of memory descriptions and
31// optional parameter assignments.
32//
33// Each memory description has the following format:
34//   BEGIN <name>
35//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
36//                       : [writable] [,executable] [,device] ;
37//     <segment>*
38//   END <name>
39//
40// where each <segment> description has the following format:
41//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
42//                : <section-name>* ;
43//
44// Each parameter assignment is a keyword/value pair in the following format:
45//   <keyword> = <value>                (no spaces in <value>)
46// or
47//   <keyword> = "<value>"              (spaces allowed in <value>)
48//
49// The following primitives are also defined:
50//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
51//                                       | IN_SEGMENT(<seg-name>) }
52//
53//   NOLOAD <section-name1> [ <section-name2> ... ]
54//
55// Please refer to the Xtensa LSP Reference Manual for more details.
56//
57BEGIN iram0
580x580000: instRam : iram0 : 0x8000 : executable, writable ;
59 iram0_1 : F : 0x580000 - 0x5802df : .ResetVector.text .ResetHandler.literal .ResetHandler.text;
60 iram0_2 : C : 0x5802e0 - 0x5803ff : ;
61 iram0_3 : F : 0x580400 - 0x580577 : .WindowVectors.text;
62 iram0_4 : C : 0x580578 - 0x58057b : .Level2InterruptVector.literal;
63 iram0_5 : F : 0x58057c - 0x580597 : .Level2InterruptVector.text;
64 iram0_6 : C : 0x580598 - 0x58059b : .Level3InterruptVector.literal;
65 iram0_7 : F : 0x58059c - 0x5805b7 : .Level3InterruptVector.text;
66 iram0_8 : C : 0x5805b8 - 0x5805bb : .DebugExceptionVector.literal;
67 iram0_9 : F : 0x5805bc - 0x5805d7 : .DebugExceptionVector.text;
68 iram0_10 : C : 0x5805d8 - 0x5805db : .NMIExceptionVector.literal;
69 iram0_11 : F : 0x5805dc - 0x5805f7 : .NMIExceptionVector.text;
70 iram0_12 : C : 0x5805f8 - 0x5805fb : .KernelExceptionVector.literal;
71 iram0_13 : F : 0x5805fc - 0x580617 : .KernelExceptionVector.text;
72 iram0_14 : C : 0x580618 - 0x58061b : .UserExceptionVector.literal;
73 iram0_15 : F : 0x58061c - 0x580637 : .UserExceptionVector.text;
74 iram0_16 : C : 0x580638 - 0x58063b : .DoubleExceptionVector.literal;
75 iram0_17 : F : 0x58063c - 0x580657 : .DoubleExceptionVector.text;
76 iram0_0 : C : 0x580658 - 0x587fff : ;
77 END iram0
78
79BEGIN iram1
800x680000: instRam : iram1 : 0x80000 : executable, writable ;
81 iram1_0 : C : 0x680000 - 0x6fffff : .iram1.literal .iram1.text .sram.literal .literal .rtos.literal .clib.literal .sram.text .text .clib.text .rtos.text ;
82END iram1
83
84BEGIN dram0
850x20700000: dataRam : dram0 : 0x80000 : writable ;
86 dram0_0 : C : 0x20700000 - 0x2077ffff : STACK :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .rodata .dram0.rodata .dram0.data .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data .data __llvm_prf_names __llvm_covmap .note.gnu.build-id .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .bss .dram0.bss ;
87END dram0
88
89BEGIN iocached
900x70000000: io : iocached : 0xda00000 : executable, writable ;
91END iocached
92
93BEGIN rambypass
940x80000000: sysram : rambypass : 0x10000000 : device, executable, writable ;
95END rambypass
96
97BEGIN iobypass
980x90000000: io : iobypass : 0xda00000 : device, executable, writable ;
99END iobypass
100