1 /*
2 ** ###################################################################
3 **     Processors:          MIMXRT798SGAWAR_hifi4
4 **                          MIMXRT798SGFOA_hifi4
5 **
6 **     Compiler:            Xtensa Compiler
7 **     Reference manual:    iMXRT700RM Rev.2 DraftA, 05/2024
8 **     Version:             rev. 2.0, 2024-05-28
9 **     Build:               b240528
10 **
11 **     Abstract:
12 **         Provides a system configuration function and a global variable that
13 **         contains the system frequency. It configures the device and initializes
14 **         the oscillator (PLL) that is part of the microcontroller device.
15 **
16 **     Copyright 2016 Freescale Semiconductor, Inc.
17 **     Copyright 2016-2024 NXP
18 **     SPDX-License-Identifier: BSD-3-Clause
19 **
20 **     http:                 www.nxp.com
21 **     mail:                 support@nxp.com
22 **
23 **     Revisions:
24 **     - rev. 1.0 (2022-09-15)
25 **         Initial version.
26 **     - rev. 2.0 (2024-05-28)
27 **         Rev2 DraftA.
28 **
29 ** ###################################################################
30 */
31 
32 /*!
33  * @file MIMXRT798S
34  * @version 1.0
35  * @date 2024-05-28
36  * @brief Device specific configuration file for MIMXRT798S
37  *  (implementation file)
38  *
39  * Provides a system configuration function and a global variable that contains
40  * the system frequency. It configures the device and initializes the oscillator
41  * (PLL) that is part of the microcontroller device.
42  */
43 
44 #include <stdint.h>
45 #include "fsl_device_registers.h"
46 
47 /* ----------------------------------------------------------------------------
48    -- Core clock
49    ---------------------------------------------------------------------------- */
50 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
51 
52 /* ----------------------------------------------------------------------------
53    -- SystemInit()
54    ---------------------------------------------------------------------------- */
55 
SystemInit(void)56 __attribute__((weak)) void SystemInit(void)
57 {
58     SystemInitHook();
59 }
60 
61 /* ----------------------------------------------------------------------------
62    -- SystemCoreClockUpdate()
63    ---------------------------------------------------------------------------- */
getFro0MaxFreq(void)64 static uint32_t getFro0MaxFreq(void)
65 {
66     return CLK_FRO0_CLK;
67 }
68 
getFro1MaxFreq(void)69 static uint32_t getFro1MaxFreq(void)
70 {
71     return CLK_FRO1_MAX_CLK;
72 }
73 
getFro1Div3Freq(void)74 static uint32_t getFro1Div3Freq(void)
75 {
76     return getFro1MaxFreq() / 3U;
77 }
78 
getFro0Div3Freq(void)79 static uint32_t getFro0Div3Freq(void)
80 {
81     return getFro0MaxFreq() / 3U;
82 }
83 
getLpOscFreq(void)84 static uint32_t getLpOscFreq(void)
85 {
86     return CLK_LPOSC_1MHZ;
87 }
88 
getBaseClkDsp(void)89 static uint32_t getBaseClkDsp(void)
90 {
91     uint32_t freq = 0U;
92 
93     switch (CLKCTL0->DSPBASECLKSEL & CLKCTL0_DSPBASECLKSEL_SEL_MASK)
94     {
95         case CLKCTL0_DSPBASECLKSEL_SEL(0):
96             freq = getFro1Div3Freq();
97             break;
98         case CLKCTL0_DSPBASECLKSEL_SEL(1):
99             freq = getFro1MaxFreq();
100             break;
101         case CLKCTL0_DSPBASECLKSEL_SEL(2):
102             freq = getFro0Div3Freq();
103             break;
104         case CLKCTL0_DSPBASECLKSEL_SEL(3):
105             freq = getLpOscFreq();
106             break;
107         default:
108             freq = 0U;
109             break;
110     }
111 
112     return freq;
113 }
114 
getMainPllFreq(void)115 static uint32_t getMainPllFreq(void)
116 {
117     uint32_t freq = 0U;
118     uint64_t freqTmp;
119 
120     switch ((CLKCTL2->MAINPLL0CLKSEL) & CLKCTL2_MAINPLL0CLKSEL_SEL_MASK)
121     {
122         case CLKCTL2_MAINPLL0CLKSEL_SEL(0):
123             freq = getFro1MaxFreq() / 8U;
124             break;
125         case CLKCTL2_MAINPLL0CLKSEL_SEL(1):
126             freq = CLK_OSC_CLK;
127             break;
128         default:
129             freq = 0U;
130             break;
131     }
132 
133     if (((CLKCTL2->MAINPLL0CTL0) & CLKCTL2_MAINPLL0CTL0_BYPASS_MASK) == 0U)
134     {
135         /* PLL output frequency = Fref * (DIV_SELECT + NUM/DENOM). */
136         freqTmp = ((uint64_t)freq * ((uint64_t)(CLKCTL2->MAINPLL0NUM))) / ((uint64_t)(CLKCTL2->MAINPLL0DENOM));
137         freq *= ((CLKCTL2->MAINPLL0CTL0) & CLKCTL2_MAINPLL0CTL0_MULT_MASK) >> CLKCTL2_MAINPLL0CTL0_MULT_SHIFT;
138         freq += (uint32_t)freqTmp;
139     }
140     return freq;
141 }
142 
getMainPllPfd0Freq(void)143 static uint32_t getMainPllPfd0Freq(void)
144 {
145     uint32_t freq = getMainPllFreq();
146 
147     if (((CLKCTL2->MAINPLL0CTL0) & CLKCTL2_MAINPLL0CTL0_BYPASS_MASK) == 0U)
148     {
149         freq = (uint32_t)((uint64_t)freq * 18U /
150                           ((CLKCTL2->MAINPLL0PFD & CLKCTL2_MAINPLL0PFD_PFD0_MASK) >> CLKCTL2_MAINPLL0PFD_PFD0_SHIFT));
151     }
152     return freq;
153 }
154 
getMainPllPfd1Freq(void)155 static uint32_t getMainPllPfd1Freq(void)
156 {
157     uint32_t freq = getMainPllFreq();
158 
159     if (((CLKCTL2->MAINPLL0CTL0) & CLKCTL2_MAINPLL0CTL0_BYPASS_MASK) == 0U)
160     {
161         freq = (uint32_t)((uint64_t)freq * 18U /
162                           ((CLKCTL2->MAINPLL0PFD & CLKCTL2_MAINPLL0PFD_PFD1_MASK) >> CLKCTL2_MAINPLL0PFD_PFD1_SHIFT));
163     }
164     return freq;
165 }
166 
SystemCoreClockUpdate(void)167 void SystemCoreClockUpdate(void)
168 {
169     /* iMXRT7xx systemCoreClockUpdate */
170     uint32_t freq = 0U;
171 
172     switch (CLKCTL0->DSPCPUCLKSEL & CLKCTL0_DSPCPUCLKSEL_SEL_MASK)
173     {
174         case CLKCTL0_DSPCPUCLKSEL_SEL(0):
175             freq = getBaseClkDsp();
176             break;
177 
178         case CLKCTL0_DSPCPUCLKSEL_SEL(1):
179             freq = getMainPllPfd0Freq();
180             break;
181 
182         case CLKCTL0_DSPCPUCLKSEL_SEL(2):
183             freq = getFro0MaxFreq();
184             break;
185 
186         case CLKCTL0_DSPCPUCLKSEL_SEL(3):
187             freq = getMainPllPfd1Freq();
188             break;
189 
190         default:
191             freq = 0U;
192             break;
193     }
194 
195     SystemCoreClock = freq / ((CLKCTL0->DSPCPUCLKDIV & CLKCTL0_DSPCPUCLKDIV_DIV_MASK) + 1U);
196 }
197 
198 /* ----------------------------------------------------------------------------
199    -- SystemInitHook()
200    ---------------------------------------------------------------------------- */
201 
SystemInitHook(void)202 __attribute__((weak)) void SystemInitHook(void)
203 {
204     /* Void implementation of the weak function. */
205 }
206