1 /*
2  * Copyright 2023 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 #ifndef FSL_EDMA_SOC_H_
8 #define FSL_EDMA_SOC_H_
9 
10 #include "fsl_common.h"
11 
12 /*!
13  * @addtogroup edma_soc
14  * @{
15  */
16 
17 /*******************************************************************************
18  * Definitions
19  ******************************************************************************/
20 /*! @name Driver version */
21 /*@{*/
22 /*! @brief Driver version 1.0.0. */
23 #define FSL_EDMA_SOC_DRIVER_VERSION (MAKE_VERSION(1, 0, 0))
24 /*@}*/
25 
26 /*!@brief DMA IP version */
27 #define FSL_EDMA_SOC_IP_DMA3 (1)
28 #define FSL_EDMA_SOC_IP_DMA4 (0)
29 
30 #if defined(MIMXRT798S_hifi4_SERIES) || defined(MIMXRT798S_cm33_core0_SERIES) || \
31     defined(MIMXRT758S_cm33_core0_SERIES) || defined(MIMXRT735S_cm33_core0_SERIES)
32 /*!@brief DMA base table */
33 #define EDMA_BASE_PTRS \
34     {                  \
35         DMA0, DMA1     \
36     }
37 
38 #define EDMA_CHN_IRQS                                                                                             \
39     {                                                                                                             \
40         {EDMA0_CH0_IRQn,  EDMA0_CH1_IRQn,  EDMA0_CH2_IRQn,  EDMA0_CH3_IRQn, EDMA0_CH4_IRQn,  EDMA0_CH5_IRQn,      \
41          EDMA0_CH6_IRQn,  EDMA0_CH7_IRQn,  EDMA0_CH8_IRQn,  EDMA0_CH9_IRQn, EDMA0_CH10_IRQn, EDMA0_CH11_IRQn,     \
42          EDMA0_CH12_IRQn, EDMA0_CH13_IRQn, EDMA0_CH14_IRQn, EDMA0_CH15_IRQn},                                     \
43         {                                                                                                         \
44             EDMA1_CH0_IRQn, EDMA1_CH1_IRQn, EDMA1_CH2_IRQn, EDMA1_CH3_IRQn, EDMA1_CH4_IRQn, EDMA1_CH5_IRQn,       \
45                 EDMA1_CH6_IRQn, EDMA1_CH7_IRQn, EDMA1_CH8_IRQn, EDMA1_CH9_IRQn, EDMA1_CH10_IRQn, EDMA1_CH11_IRQn, \
46                 EDMA1_CH12_IRQn, EDMA1_CH13_IRQn, EDMA1_CH14_IRQn, EDMA1_CH15_IRQn                                \
47         }                                                                                                         \
48     }
49 
50 #elif defined(MIMXRT798S_hifi1_SERIES) || defined(MIMXRT798S_cm33_core1_SERIES) || \
51     defined(MIMXRT758S_cm33_core1_SERIES) || defined(MIMXRT735S_cm33_core1_SERIES)
52 /*!@brief DMA base table */
53 #define EDMA_BASE_PTRS \
54     {                  \
55         DMA2, DMA3     \
56     }
57 
58 #define EDMA_CHN_IRQS                                                                                       \
59     {                                                                                                       \
60         {EDMA2_CH0_IRQn, EDMA2_CH1_IRQn, EDMA2_CH2_IRQn, EDMA2_CH3_IRQn,                                    \
61          EDMA2_CH4_IRQn, EDMA2_CH5_IRQn, EDMA2_CH6_IRQn, EDMA2_CH7_IRQn},                                   \
62         {                                                                                                   \
63             EDMA3_CH0_IRQn, EDMA3_CH1_IRQn, EDMA3_CH2_IRQn, EDMA3_CH3_IRQn, EDMA3_CH4_IRQn, EDMA3_CH5_IRQn, \
64                 EDMA3_CH6_IRQn, EDMA3_CH7_IRQn                                                              \
65         }                                                                                                   \
66     }
67 
68 #else
69 #error "Unsupported core."
70 #endif
71 
72 /*!@brief EDMA base address convert macro */
73 #define EDMA_CHANNEL_OFFSET           0x1000U
74 #define EDMA_CHANNEL_ARRAY_STEP(base) (0x1000U)
75 
76 /*******************************************************************************
77  * API
78  ******************************************************************************/
79 
80 #ifdef __cplusplus
81 extern "C" {
82 #endif
83 
84 /*!
85  * @brief Enable the eDMA request.
86  *
87  * This function enables the eDMA request controlled by SYSCON.
88  *
89  * @param base eDMA peripheral base address.
90  * @param requestSource eDMA request source, see "dma_request_source_t".
91  */
92 void EDMA_EnableRequest(DMA_Type *base, dma_request_source_t requestSource);
93 
94 /*!
95  * @brief Disable the eDMA request.
96  *
97  * This function disables the eDMA request controlled by SYSCON.
98  *
99  * @param base eDMA peripheral base address.
100  * @param requestSource eDMA request source, see "dma_request_source_t".
101  */
102 void EDMA_DisableRequest(DMA_Type *base, dma_request_source_t requestSource);
103 
104 #ifdef __cplusplus
105 }
106 #endif
107 
108 /*!
109  * @}
110  */
111 
112 #endif /* FSL_EDMA_SOC_H_ */
113