1 /* This linker script generated from xt-genldscripts.tpp for LSP min-rt */ 2 /* Linker Script for default link */ 3 MEMORY 4 { 5 iram0_1_seg : org = 0x00580000, len = 0x2E0 6 iram0_3_seg : org = 0x00580400, len = 0x178 7 iram0_4_seg : org = 0x00580578, len = 0x4 8 iram0_5_seg : org = 0x0058057C, len = 0x1C 9 iram0_6_seg : org = 0x00580598, len = 0x4 10 iram0_7_seg : org = 0x0058059C, len = 0x1C 11 iram0_8_seg : org = 0x005805B8, len = 0x4 12 iram0_9_seg : org = 0x005805BC, len = 0x1C 13 iram0_10_seg : org = 0x005805D8, len = 0x4 14 iram0_11_seg : org = 0x005805DC, len = 0x1C 15 iram0_12_seg : org = 0x005805F8, len = 0x4 16 iram0_13_seg : org = 0x005805FC, len = 0x1C 17 iram0_14_seg : org = 0x00580618, len = 0x4 18 iram0_15_seg : org = 0x0058061C, len = 0x1C 19 iram0_16_seg : org = 0x00580638, len = 0x4 20 iram0_17_seg : org = 0x0058063C, len = 0x1C 21 iram0_0_seg : org = 0x00598000, len = 0x18000 22 dram0_0_seg : org = 0x205B0000, len = 0x10000 23 } 24 25 PHDRS 26 { 27 iram0_1_phdr PT_LOAD; 28 iram0_2_phdr PT_LOAD; 29 iram0_3_phdr PT_LOAD; 30 iram0_4_phdr PT_LOAD; 31 iram0_5_phdr PT_LOAD; 32 iram0_6_phdr PT_LOAD; 33 iram0_7_phdr PT_LOAD; 34 iram0_8_phdr PT_LOAD; 35 iram0_9_phdr PT_LOAD; 36 iram0_10_phdr PT_LOAD; 37 iram0_11_phdr PT_LOAD; 38 iram0_12_phdr PT_LOAD; 39 iram0_13_phdr PT_LOAD; 40 iram0_14_phdr PT_LOAD; 41 iram0_15_phdr PT_LOAD; 42 iram0_16_phdr PT_LOAD; 43 iram0_17_phdr PT_LOAD; 44 iram0_18_phdr PT_LOAD; 45 iram0_0_phdr PT_LOAD; 46 dram0_0_phdr PT_LOAD; 47 dram0_0_bss_phdr PT_LOAD; 48 } 49 50 51 /* Default entry point: */ 52 ENTRY(_ResetVector) 53 54 55 /* Memory boundary addresses: */ 56 _memmap_mem_iram0_start = 0x580000; 57 _memmap_mem_iram0_end = 0x5B0000; 58 _memmap_mem_dram0_start = 0x205b0000; 59 _memmap_mem_dram0_end = 0x205c0000; 60 61 /* Memory segment boundary addresses: */ 62 _memmap_seg_iram0_1_start = 0x580000; 63 _memmap_seg_iram0_1_max = 0x5802e0; 64 _memmap_seg_iram0_3_start = 0x580400; 65 _memmap_seg_iram0_3_max = 0x580578; 66 _memmap_seg_iram0_4_start = 0x580578; 67 _memmap_seg_iram0_4_max = 0x58057c; 68 _memmap_seg_iram0_5_start = 0x58057c; 69 _memmap_seg_iram0_5_max = 0x580598; 70 _memmap_seg_iram0_6_start = 0x580598; 71 _memmap_seg_iram0_6_max = 0x58059c; 72 _memmap_seg_iram0_7_start = 0x58059c; 73 _memmap_seg_iram0_7_max = 0x5805b8; 74 _memmap_seg_iram0_8_start = 0x5805b8; 75 _memmap_seg_iram0_8_max = 0x5805bc; 76 _memmap_seg_iram0_9_start = 0x5805bc; 77 _memmap_seg_iram0_9_max = 0x5805d8; 78 _memmap_seg_iram0_10_start = 0x5805d8; 79 _memmap_seg_iram0_10_max = 0x5805dc; 80 _memmap_seg_iram0_11_start = 0x5805dc; 81 _memmap_seg_iram0_11_max = 0x5805f8; 82 _memmap_seg_iram0_12_start = 0x5805f8; 83 _memmap_seg_iram0_12_max = 0x5805fc; 84 _memmap_seg_iram0_13_start = 0x5805fc; 85 _memmap_seg_iram0_13_max = 0x580618; 86 _memmap_seg_iram0_14_start = 0x580618; 87 _memmap_seg_iram0_14_max = 0x58061c; 88 _memmap_seg_iram0_15_start = 0x58061c; 89 _memmap_seg_iram0_15_max = 0x580638; 90 _memmap_seg_iram0_16_start = 0x580638; 91 _memmap_seg_iram0_16_max = 0x58063c; 92 _memmap_seg_iram0_17_start = 0x58063c; 93 _memmap_seg_iram0_17_max = 0x580658; 94 _memmap_seg_iram0_0_start = 0x598000; 95 _memmap_seg_iram0_0_max = 0x5B0000; 96 _memmap_seg_dram0_0_start = 0x205b0000; 97 _memmap_seg_dram0_0_max = 0x205c0000; 98 99 _rom_store_table = 0; 100 PROVIDE(_memmap_reset_vector = 0x580000); 101 PROVIDE(_memmap_vecbase_reset = 0x580400); 102 /* Various memory-map dependent cache attribute settings: */ 103 _memmap_cacheattr_wb_base = 0x00000022; 104 _memmap_cacheattr_wt_base = 0x00000022; 105 _memmap_cacheattr_bp_base = 0x00000022; 106 _memmap_cacheattr_unused_mask = 0xFFFFFF00; 107 _memmap_cacheattr_wb_trapnull = 0x22222222; 108 _memmap_cacheattr_wba_trapnull = 0x22222222; 109 _memmap_cacheattr_wbna_trapnull = 0x22222222; 110 _memmap_cacheattr_wt_trapnull = 0x22222222; 111 _memmap_cacheattr_bp_trapnull = 0x22222222; 112 _memmap_cacheattr_wb_strict = 0xFFFFFF22; 113 _memmap_cacheattr_wt_strict = 0xFFFFFF22; 114 _memmap_cacheattr_bp_strict = 0xFFFFFF22; 115 _memmap_cacheattr_wb_allvalid = 0x22222222; 116 _memmap_cacheattr_wt_allvalid = 0x22222222; 117 _memmap_cacheattr_bp_allvalid = 0x22222222; 118 _memmap_region_map = 0x00000003; 119 PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); 120 121 SECTIONS 122 { 123 124 .ResetVector.text : ALIGN(4) 125 { 126 _ResetVector_text_start = ABSOLUTE(.); 127 KEEP (*(.ResetVector.text)) 128 . = ALIGN (4); 129 _ResetVector_text_end = ABSOLUTE(.); 130 } >iram0_1_seg :iram0_1_phdr 131 132 .ResetHandler.text : ALIGN(4) 133 { 134 _ResetHandler_text_start = ABSOLUTE(.); 135 *(.ResetHandler.literal .ResetHandler.text) 136 . = ALIGN (4); 137 _ResetHandler_text_end = ABSOLUTE(.); 138 _memmap_seg_iram0_1_end = ALIGN(0x8); 139 } >iram0_1_seg :iram0_1_phdr 140 141 142 143 .WindowVectors.text : ALIGN(4) 144 { 145 _WindowVectors_text_start = ABSOLUTE(.); 146 KEEP (*(.WindowVectors.text)) 147 . = ALIGN (4); 148 _WindowVectors_text_end = ABSOLUTE(.); 149 _memmap_seg_iram0_3_end = ALIGN(0x8); 150 } >iram0_3_seg :iram0_3_phdr 151 152 153 .Level2InterruptVector.literal : ALIGN(4) 154 { 155 _Level2InterruptVector_literal_start = ABSOLUTE(.); 156 *(.Level2InterruptVector.literal) 157 . = ALIGN (4); 158 _Level2InterruptVector_literal_end = ABSOLUTE(.); 159 _memmap_seg_iram0_4_end = ALIGN(0x8); 160 } >iram0_4_seg :iram0_4_phdr 161 162 163 .Level2InterruptVector.text : ALIGN(4) 164 { 165 _Level2InterruptVector_text_start = ABSOLUTE(.); 166 KEEP (*(.Level2InterruptVector.text)) 167 . = ALIGN (4); 168 _Level2InterruptVector_text_end = ABSOLUTE(.); 169 _memmap_seg_iram0_5_end = ALIGN(0x8); 170 } >iram0_5_seg :iram0_5_phdr 171 172 173 .Level3InterruptVector.literal : ALIGN(4) 174 { 175 _Level3InterruptVector_literal_start = ABSOLUTE(.); 176 *(.Level3InterruptVector.literal) 177 . = ALIGN (4); 178 _Level3InterruptVector_literal_end = ABSOLUTE(.); 179 _memmap_seg_iram0_6_end = ALIGN(0x8); 180 } >iram0_6_seg :iram0_6_phdr 181 182 183 .Level3InterruptVector.text : ALIGN(4) 184 { 185 _Level3InterruptVector_text_start = ABSOLUTE(.); 186 KEEP (*(.Level3InterruptVector.text)) 187 . = ALIGN (4); 188 _Level3InterruptVector_text_end = ABSOLUTE(.); 189 _memmap_seg_iram0_7_end = ALIGN(0x8); 190 } >iram0_7_seg :iram0_7_phdr 191 192 193 .DebugExceptionVector.literal : ALIGN(4) 194 { 195 _DebugExceptionVector_literal_start = ABSOLUTE(.); 196 *(.DebugExceptionVector.literal) 197 . = ALIGN (4); 198 _DebugExceptionVector_literal_end = ABSOLUTE(.); 199 _memmap_seg_iram0_8_end = ALIGN(0x8); 200 } >iram0_8_seg :iram0_8_phdr 201 202 203 .DebugExceptionVector.text : ALIGN(4) 204 { 205 _DebugExceptionVector_text_start = ABSOLUTE(.); 206 KEEP (*(.DebugExceptionVector.text)) 207 . = ALIGN (4); 208 _DebugExceptionVector_text_end = ABSOLUTE(.); 209 _memmap_seg_iram0_9_end = ALIGN(0x8); 210 } >iram0_9_seg :iram0_9_phdr 211 212 213 .NMIExceptionVector.literal : ALIGN(4) 214 { 215 _NMIExceptionVector_literal_start = ABSOLUTE(.); 216 *(.NMIExceptionVector.literal) 217 . = ALIGN (4); 218 _NMIExceptionVector_literal_end = ABSOLUTE(.); 219 _memmap_seg_iram0_10_end = ALIGN(0x8); 220 } >iram0_10_seg :iram0_10_phdr 221 222 223 .NMIExceptionVector.text : ALIGN(4) 224 { 225 _NMIExceptionVector_text_start = ABSOLUTE(.); 226 KEEP (*(.NMIExceptionVector.text)) 227 . = ALIGN (4); 228 _NMIExceptionVector_text_end = ABSOLUTE(.); 229 _memmap_seg_iram0_11_end = ALIGN(0x8); 230 } >iram0_11_seg :iram0_11_phdr 231 232 233 .KernelExceptionVector.literal : ALIGN(4) 234 { 235 _KernelExceptionVector_literal_start = ABSOLUTE(.); 236 *(.KernelExceptionVector.literal) 237 . = ALIGN (4); 238 _KernelExceptionVector_literal_end = ABSOLUTE(.); 239 _memmap_seg_iram0_12_end = ALIGN(0x8); 240 } >iram0_12_seg :iram0_12_phdr 241 242 243 .KernelExceptionVector.text : ALIGN(4) 244 { 245 _KernelExceptionVector_text_start = ABSOLUTE(.); 246 KEEP (*(.KernelExceptionVector.text)) 247 . = ALIGN (4); 248 _KernelExceptionVector_text_end = ABSOLUTE(.); 249 _memmap_seg_iram0_13_end = ALIGN(0x8); 250 } >iram0_13_seg :iram0_13_phdr 251 252 253 .UserExceptionVector.literal : ALIGN(4) 254 { 255 _UserExceptionVector_literal_start = ABSOLUTE(.); 256 *(.UserExceptionVector.literal) 257 . = ALIGN (4); 258 _UserExceptionVector_literal_end = ABSOLUTE(.); 259 _memmap_seg_iram0_14_end = ALIGN(0x8); 260 } >iram0_14_seg :iram0_14_phdr 261 262 263 .UserExceptionVector.text : ALIGN(4) 264 { 265 _UserExceptionVector_text_start = ABSOLUTE(.); 266 KEEP (*(.UserExceptionVector.text)) 267 . = ALIGN (4); 268 _UserExceptionVector_text_end = ABSOLUTE(.); 269 _memmap_seg_iram0_15_end = ALIGN(0x8); 270 } >iram0_15_seg :iram0_15_phdr 271 272 273 .DoubleExceptionVector.literal : ALIGN(4) 274 { 275 _DoubleExceptionVector_literal_start = ABSOLUTE(.); 276 *(.DoubleExceptionVector.literal) 277 . = ALIGN (4); 278 _DoubleExceptionVector_literal_end = ABSOLUTE(.); 279 _memmap_seg_iram0_16_end = ALIGN(0x8); 280 } >iram0_16_seg :iram0_16_phdr 281 282 283 .DoubleExceptionVector.text : ALIGN(4) 284 { 285 _DoubleExceptionVector_text_start = ABSOLUTE(.); 286 KEEP (*(.DoubleExceptionVector.text)) 287 . = ALIGN (4); 288 _DoubleExceptionVector_text_end = ABSOLUTE(.); 289 _memmap_seg_iram0_17_end = ALIGN(0x8); 290 } >iram0_17_seg :iram0_17_phdr 291 292 293 294 .iram0.text : ALIGN(4) 295 { 296 _iram0_text_start = ABSOLUTE(.); 297 *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text) 298 . = ALIGN (4); 299 _iram0_text_end = ABSOLUTE(.); 300 } >iram0_0_seg :iram0_0_phdr 301 302 .text : ALIGN(4) 303 { 304 _stext = .; 305 _text_start = ABSOLUTE(.); 306 *(.entry.text) 307 *(.init.literal) 308 KEEP(*(.init)) 309 *(.literal.sort.* SORT(.text.sort.*)) 310 KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*)) 311 *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) 312 *(.fini.literal) 313 KEEP(*(.fini)) 314 *(.gnu.version) 315 . = ALIGN (4); 316 _text_end = ABSOLUTE(.); 317 _etext = .; 318 } >iram0_0_seg :iram0_0_phdr 319 320 .clib.text : ALIGN(4) 321 { 322 _clib_text_start = ABSOLUTE(.); 323 *(.clib.literal .clib.text) 324 . = ALIGN (4); 325 _clib_text_end = ABSOLUTE(.); 326 } >iram0_0_seg :iram0_0_phdr 327 328 .rtos.text : ALIGN(4) 329 { 330 _rtos_text_start = ABSOLUTE(.); 331 *(.rtos.literal .rtos.text) 332 . = ALIGN (4); 333 _rtos_text_end = ABSOLUTE(.); 334 } >iram0_0_seg :iram0_0_phdr 335 336 .note.gnu.build-id : ALIGN(4) 337 { 338 _note_gnu_build-id_start = ABSOLUTE(.); 339 *(.note.gnu.build-id) 340 . = ALIGN (4); 341 _note_gnu_build-id_end = ABSOLUTE(.); 342 _memmap_seg_iram0_0_end = ALIGN(0x8); 343 } >iram0_0_seg :iram0_0_phdr 344 345 _memmap_mem_iram0_max = ABSOLUTE(.); 346 347 .dram0.rodata : ALIGN(4) 348 { 349 _dram0_rodata_start = ABSOLUTE(.); 350 *(.dram0.rodata) 351 *(.dram.rodata) 352 . = ALIGN (4); 353 _dram0_rodata_end = ABSOLUTE(.); 354 } >dram0_0_seg :dram0_0_phdr 355 356 .clib.rodata : ALIGN(4) 357 { 358 _clib_rodata_start = ABSOLUTE(.); 359 *(.clib.rodata) 360 . = ALIGN (4); 361 _clib_rodata_end = ABSOLUTE(.); 362 } >dram0_0_seg :dram0_0_phdr 363 364 .rtos.rodata : ALIGN(4) 365 { 366 _rtos_rodata_start = ABSOLUTE(.); 367 *(.rtos.rodata) 368 . = ALIGN (4); 369 _rtos_rodata_end = ABSOLUTE(.); 370 } >dram0_0_seg :dram0_0_phdr 371 372 .rodata : ALIGN(4) 373 { 374 _rodata_start = ABSOLUTE(.); 375 *(.rodata) 376 *(SORT(.rodata.sort.*)) 377 KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*)) 378 *(.rodata.*) 379 *(.gnu.linkonce.r.*) 380 *(.rodata1) 381 __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); 382 KEEP (*(.xt_except_table)) 383 KEEP (*(.gcc_except_table)) 384 *(.gnu.linkonce.e.*) 385 *(.gnu.version_r) 386 PROVIDE (__eh_frame_start = .); 387 KEEP (*(.eh_frame)) 388 PROVIDE (__eh_frame_end = .); 389 /* C++ constructor and destructor tables, properly ordered: */ 390 KEEP (*crtbegin.o(.ctors)) 391 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) 392 KEEP (*(SORT(.ctors.*))) 393 KEEP (*(.ctors)) 394 KEEP (*crtbegin.o(.dtors)) 395 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) 396 KEEP (*(SORT(.dtors.*))) 397 KEEP (*(.dtors)) 398 /* C++ exception handlers table: */ 399 __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); 400 *(.xt_except_desc) 401 *(.gnu.linkonce.h.*) 402 __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); 403 *(.xt_except_desc_end) 404 *(.dynamic) 405 *(.gnu.version_d) 406 . = ALIGN(4); /* this table MUST be 4-byte aligned */ 407 _bss_table_start = ABSOLUTE(.); 408 LONG(_bss_start) 409 LONG(_bss_end) 410 _bss_table_end = ABSOLUTE(.); 411 . = ALIGN (4); 412 _rodata_end = ABSOLUTE(.); 413 } >dram0_0_seg :dram0_0_phdr 414 415 .clib.data : ALIGN(4) 416 { 417 _clib_data_start = ABSOLUTE(.); 418 *(.clib.data) 419 . = ALIGN (4); 420 _clib_data_end = ABSOLUTE(.); 421 } >dram0_0_seg :dram0_0_phdr 422 423 .clib.percpu.data : ALIGN(4) 424 { 425 _clib_percpu_data_start = ABSOLUTE(.); 426 *(.clib.percpu.data) 427 . = ALIGN (4); 428 _clib_percpu_data_end = ABSOLUTE(.); 429 } >dram0_0_seg :dram0_0_phdr 430 431 .rtos.percpu.data : ALIGN(4) 432 { 433 _rtos_percpu_data_start = ABSOLUTE(.); 434 *(.rtos.percpu.data) 435 . = ALIGN (4); 436 _rtos_percpu_data_end = ABSOLUTE(.); 437 } >dram0_0_seg :dram0_0_phdr 438 439 .rtos.data : ALIGN(4) 440 { 441 _rtos_data_start = ABSOLUTE(.); 442 *(.rtos.data) 443 . = ALIGN (4); 444 _rtos_data_end = ABSOLUTE(.); 445 } >dram0_0_seg :dram0_0_phdr 446 447 .dram0.data : ALIGN(4) 448 { 449 _dram0_data_start = ABSOLUTE(.); 450 *(.dram0.data) 451 *(.dram.data) 452 . = ALIGN (4); 453 _dram0_data_end = ABSOLUTE(.); 454 } >dram0_0_seg :dram0_0_phdr 455 456 .data : ALIGN(4) 457 { 458 _data_start = ABSOLUTE(.); 459 *(.data) 460 *(SORT(.data.sort.*)) 461 KEEP (*(SORT(.data.keepsort.*) .data.keep.*)) 462 *(.data.*) 463 *(.gnu.linkonce.d.*) 464 KEEP(*(.gnu.linkonce.d.*personality*)) 465 *(.data1) 466 *(.sdata) 467 *(.sdata.*) 468 *(.gnu.linkonce.s.*) 469 *(.sdata2) 470 *(.sdata2.*) 471 *(.gnu.linkonce.s2.*) 472 KEEP(*(.jcr)) 473 *(__llvm_prf_cnts) 474 *(__llvm_prf_data) 475 *(__llvm_prf_vnds) 476 . = ALIGN (4); 477 _data_end = ABSOLUTE(.); 478 } >dram0_0_seg :dram0_0_phdr 479 bss(NOLOAD)480 .bss (NOLOAD) : ALIGN(8) 481 { 482 . = ALIGN (8); 483 _bss_start = ABSOLUTE(.); 484 *(.dynsbss) 485 *(.sbss) 486 *(.sbss.*) 487 *(.gnu.linkonce.sb.*) 488 *(.scommon) 489 *(.sbss2) 490 *(.sbss2.*) 491 *(.gnu.linkonce.sb2.*) 492 *(.dynbss) 493 *(.bss) 494 *(SORT(.bss.sort.*)) 495 KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*)) 496 *(.bss.*) 497 *(.gnu.linkonce.b.*) 498 *(COMMON) 499 *(.clib.bss) 500 *(.clib.percpu.bss) 501 *(.rtos.percpu.bss) 502 *(.rtos.bss) 503 *(.dram0.bss) 504 . = ALIGN (8); 505 _bss_end = ABSOLUTE(.); 506 _end = ALIGN(0x8); 507 PROVIDE(end = ALIGN(0x8)); 508 _stack_sentry = ALIGN(0x8); 509 _memmap_seg_dram0_0_end = ALIGN(0x8); 510 } >dram0_0_seg :dram0_0_bss_phdr 511 512 PROVIDE(__stack = 0x205c0000); 513 _heap_sentry = 0x205c0000; 514 515 _memmap_mem_dram0_max = ABSOLUTE(.); 516 517 .debug 0 : { *(.debug) } 518 .line 0 : { *(.line) } 519 .debug_srcinfo 0 : { *(.debug_srcinfo) } 520 .debug_sfnames 0 : { *(.debug_sfnames) } 521 .debug_aranges 0 : { *(.debug_aranges) } 522 .debug_ranges 0 : { *(.debug_ranges) } 523 .debug_pubnames 0 : { *(.debug_pubnames) } 524 .debug_info 0 : { *(.debug_info) } 525 .debug_abbrev 0 : { *(.debug_abbrev) } 526 .debug_line 0 : { *(.debug_line) } 527 .debug_frame 0 : { *(.debug_frame) } 528 .debug_str 0 : { *(.debug_str) } 529 .debug_loc 0 : { *(.debug_loc) } 530 .debug_macinfo 0 : { *(.debug_macinfo) } 531 .debug_weaknames 0 : { *(.debug_weaknames) } 532 .debug_funcnames 0 : { *(.debug_funcnames) } 533 .debug_typenames 0 : { *(.debug_typenames) } 534 .debug_varnames 0 : { *(.debug_varnames) } 535 .xt.insn 0 : 536 { 537 KEEP (*(.xt.insn)) 538 KEEP (*(.gnu.linkonce.x.*)) 539 } 540 .xt.prop 0 : 541 { 542 *(.xt.prop) 543 *(.xt.prop.*) 544 *(.gnu.linkonce.prop.*) 545 } 546 .xt.lit 0 : 547 { 548 *(.xt.lit) 549 *(.xt.lit.*) 550 *(.gnu.linkonce.p.*) 551 } 552 .xtensa.info 0 : 553 { 554 *(.xtensa.info) 555 } 556 .debug.xt.callgraph 0 : 557 { 558 KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*)) 559 } 560 .comment 0 : 561 { 562 KEEP(*(.comment)) 563 } 564 .note.GNU-stack 0 : 565 { 566 *(.note.GNU-stack) 567 } 568 } 569 570
