1 /*
2 * Copyright 2023 NXP
3 * All rights reserved.
4 *
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include "fsl_i2s_bridge.h"
10
11 /*******************************************************************************
12 * Definitions
13 ******************************************************************************/
14
15 /* Component ID definition, used by tools. */
16 #ifndef FSL_COMPONENT_ID
17 #define FSL_COMPONENT_ID "platform.drivers.i2s_bridge"
18 #endif
19
20 /*******************************************************************************
21 * Prototypes
22 ******************************************************************************/
23
24 /*******************************************************************************
25 * Variables
26 ******************************************************************************/
27
28 /*******************************************************************************
29 * Code
30 ******************************************************************************/
31 /*!
32 * @brief Update SYSCTL1 register
33 *
34 * @param base SYSCT1L1 peripheral base address.
35 * @param regAddr register address
36 * @param value the value to be writen.
37 */
SYSCTL1_UpdateRegister(SYSCTL1_Type * base,volatile uint32_t * regAddr,uint32_t value)38 static void SYSCTL1_UpdateRegister(SYSCTL1_Type *base, volatile uint32_t *regAddr, uint32_t value)
39 {
40 if ((base->UPDATELCKOUT & SYSCTL1_UPDATELCKOUT_UPDATELCKOUT_MASK) != 0U)
41 {
42 base->UPDATELCKOUT &= ~SYSCTL1_UPDATELCKOUT_UPDATELCKOUT_MASK;
43 *regAddr = value;
44 base->UPDATELCKOUT |= SYSCTL1_UPDATELCKOUT_UPDATELCKOUT_MASK;
45 }
46 else
47 {
48 *regAddr = value;
49 }
50 }
51
I2S_BRIDGE_SetFlexcommSignalShareSet(uint32_t flexCommIndex,i2s_bridge_signal_t signal,uint32_t set)52 void I2S_BRIDGE_SetFlexcommSignalShareSet(uint32_t flexCommIndex, i2s_bridge_signal_t signal, uint32_t set)
53 {
54 uint32_t tempReg = SYSCTL1->FCCTRLSEL[flexCommIndex];
55
56 tempReg &= ~((uint32_t)SYSCTL1_FCCTRLSEL_SCKINSEL_MASK << ((uint32_t)signal * 8U));
57 tempReg |= set << ((uint32_t)signal * 8U);
58
59 SYSCTL1_UpdateRegister(SYSCTL1, &SYSCTL1->FCCTRLSEL[flexCommIndex], tempReg);
60 }
61
I2S_BRIDGE_SetFlexcommShareSet(uint32_t flexCommIndex,uint32_t sckSet,uint32_t wsSet,uint32_t dataInSet,uint32_t dataOutSet)62 void I2S_BRIDGE_SetFlexcommShareSet(
63 uint32_t flexCommIndex, uint32_t sckSet, uint32_t wsSet, uint32_t dataInSet, uint32_t dataOutSet)
64 {
65 uint32_t tempReg = SYSCTL1->FCCTRLSEL[flexCommIndex];
66
67 tempReg &= ~(SYSCTL1_FCCTRLSEL_SCKINSEL_MASK | SYSCTL1_FCCTRLSEL_WSINSEL_MASK | SYSCTL1_FCCTRLSEL_DATAINSEL_MASK |
68 SYSCTL1_FCCTRLSEL_DATAOUTSEL_MASK);
69 tempReg |= SYSCTL1_FCCTRLSEL_SCKINSEL(sckSet) | SYSCTL1_FCCTRLSEL_WSINSEL(wsSet) |
70 SYSCTL1_FCCTRLSEL_DATAINSEL(dataInSet) | SYSCTL1_FCCTRLSEL_DATAOUTSEL(dataOutSet);
71
72 SYSCTL1_UpdateRegister(SYSCTL1, &SYSCTL1->FCCTRLSEL[flexCommIndex], tempReg);
73 }
74
I2S_BRIDGE_SetShareSetSrc(uint32_t setIndex,uint32_t sckShareSrc,uint32_t wsShareSrc,uint32_t dataInShareSrc,uint32_t dataOutShareSrc)75 void I2S_BRIDGE_SetShareSetSrc(
76 uint32_t setIndex, uint32_t sckShareSrc, uint32_t wsShareSrc, uint32_t dataInShareSrc, uint32_t dataOutShareSrc)
77 {
78 if (setIndex > 0U)
79 {
80 uint32_t tempReg = 0U;
81
82 /* WS,SCK,DATA IN */
83 tempReg |= SYSCTL1_SHAREDCTRLSET_SHAREDSCKSEL(sckShareSrc) | SYSCTL1_SHAREDCTRLSET_SHAREDWSSEL(wsShareSrc) |
84 SYSCTL1_SHAREDCTRLSET_SHAREDDATASEL(dataInShareSrc);
85 /* data out */
86 tempReg |= dataOutShareSrc;
87
88 SYSCTL1_UpdateRegister(SYSCTL1, &SYSCTL1->SHAREDCTRLSET[setIndex - 1U], tempReg);
89 }
90 }
91
I2S_BRIDGE_SetShareSignalSrc(uint32_t setIndex,i2s_bridge_signal_t signal,uint32_t shareSrc)92 void I2S_BRIDGE_SetShareSignalSrc(uint32_t setIndex, i2s_bridge_signal_t signal, uint32_t shareSrc)
93 {
94 if (setIndex > 0U)
95 {
96 uint32_t tempReg = SYSCTL1->SHAREDCTRLSET[setIndex - 1U];
97
98 if (signal == kI2S_BRIDGE_SignalDataOut)
99 {
100 tempReg |= 1UL << (SYSCTL1_SHAREDCTRLSET_FC0DATAOUTEN_SHIFT + shareSrc);
101 }
102 else
103 {
104 tempReg &= ~((uint32_t)SYSCTL1_SHAREDCTRLSET_SHAREDSCKSEL_MASK << ((uint32_t)signal * 4U));
105 tempReg |= shareSrc << ((uint32_t)signal * 4U);
106 }
107
108 SYSCTL1_UpdateRegister(SYSCTL1, &SYSCTL1->SHAREDCTRLSET[setIndex - 1U], tempReg);
109 }
110 }
111