1 /*
2 * Copyright 2022-2023 NXP
3 * All rights reserved.
4 *
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include "fsl_edma_soc.h"
10
11 /*******************************************************************************
12 * Definitions
13 ******************************************************************************/
14
15 /* Component ID definition, used by tools. */
16 #ifndef FSL_COMPONENT_ID
17 #define FSL_COMPONENT_ID "platform.drivers.edma_soc"
18 #endif
19
20 /*******************************************************************************
21 * Prototypes
22 ******************************************************************************/
23 extern void DMA4_CH0_CH1_CH32_CH33_DriverIRQHandler(void);
24 extern void DMA4_CH2_CH3_CH34_CH35_DriverIRQHandler(void);
25 extern void DMA4_CH4_CH5_CH36_CH37_DriverIRQHandler(void);
26 extern void DMA4_CH6_CH7_CH38_CH39_DriverIRQHandler(void);
27 extern void DMA4_CH8_CH9_CH40_CH41_DriverIRQHandler(void);
28 extern void DMA4_CH10_CH11_CH42_CH43_DriverIRQHandler(void);
29 extern void DMA4_CH12_CH13_CH44_CH45_DriverIRQHandler(void);
30 extern void DMA4_CH14_CH15_CH46_CH47_DriverIRQHandler(void);
31 extern void DMA4_CH16_CH17_CH48_CH49_DriverIRQHandler(void);
32 extern void DMA4_CH18_CH19_CH50_CH51_DriverIRQHandler(void);
33 extern void DMA4_CH20_CH21_CH52_CH53_DriverIRQHandler(void);
34 extern void DMA4_CH22_CH23_CH54_CH55_DriverIRQHandler(void);
35 extern void DMA4_CH24_CH25_CH56_CH57_DriverIRQHandler(void);
36 extern void DMA4_CH26_CH27_CH58_CH59_DriverIRQHandler(void);
37 extern void DMA4_CH28_CH29_CH60_CH61_DriverIRQHandler(void);
38 extern void DMA4_CH30_CH31_CH62_CH63_DriverIRQHandler(void);
39 extern void DMA3_CH0_DriverIRQHandler(void);
40 extern void DMA3_CH1_DriverIRQHandler(void);
41 extern void DMA3_CH2_DriverIRQHandler(void);
42 extern void DMA3_CH3_DriverIRQHandler(void);
43 extern void DMA3_CH4_DriverIRQHandler(void);
44 extern void DMA3_CH5_DriverIRQHandler(void);
45 extern void DMA3_CH6_DriverIRQHandler(void);
46 extern void DMA3_CH7_DriverIRQHandler(void);
47 extern void DMA3_CH8_DriverIRQHandler(void);
48 extern void DMA3_CH9_DriverIRQHandler(void);
49 extern void DMA3_CH10_DriverIRQHandler(void);
50 extern void DMA3_CH11_DriverIRQHandler(void);
51 extern void DMA3_CH12_DriverIRQHandler(void);
52 extern void DMA3_CH13_DriverIRQHandler(void);
53 extern void DMA3_CH14_DriverIRQHandler(void);
54 extern void DMA3_CH15_DriverIRQHandler(void);
55 extern void DMA3_CH16_DriverIRQHandler(void);
56 extern void DMA3_CH17_DriverIRQHandler(void);
57 extern void DMA3_CH18_DriverIRQHandler(void);
58 extern void DMA3_CH19_DriverIRQHandler(void);
59 extern void DMA3_CH20_DriverIRQHandler(void);
60 extern void DMA3_CH21_DriverIRQHandler(void);
61 extern void DMA3_CH22_DriverIRQHandler(void);
62 extern void DMA3_CH23_DriverIRQHandler(void);
63 extern void DMA3_CH24_DriverIRQHandler(void);
64 extern void DMA3_CH25_DriverIRQHandler(void);
65 extern void DMA3_CH26_DriverIRQHandler(void);
66 extern void DMA3_CH27_DriverIRQHandler(void);
67 extern void DMA3_CH28_DriverIRQHandler(void);
68 extern void DMA3_CH29_DriverIRQHandler(void);
69 extern void DMA3_CH30_DriverIRQHandler(void);
70 extern void DMA3_CH31_DriverIRQHandler(void);
71 extern void EDMA_DriverIRQHandler(uint32_t instance, uint32_t channel);
72 /*******************************************************************************
73 * Code
74 ******************************************************************************/
75 /*!
76 * brief DMA instance 1, channel 0~1, 32~33 IRQ handler.
77 *
78 */
DMA4_CH0_CH1_CH32_CH33_DriverIRQHandler(void)79 void DMA4_CH0_CH1_CH32_CH33_DriverIRQHandler(void)
80 {
81 /* Instance 1 channel 0 */
82 EDMA_DriverIRQHandler(1U, 0U);
83 /* Instance 1 channel 1 */
84 EDMA_DriverIRQHandler(1U, 1U);
85 /* Instance 1 channel 32 */
86 EDMA_DriverIRQHandler(1U, 32U);
87 /* Instance 1 channel 33 */
88 EDMA_DriverIRQHandler(1U, 33U);
89 }
90
91 /*!
92 * brief DMA instance 1, channel 2~3, 34~35 IRQ handler.
93 *
94 */
DMA4_CH2_CH3_CH34_CH35_DriverIRQHandler(void)95 void DMA4_CH2_CH3_CH34_CH35_DriverIRQHandler(void)
96 {
97 /* Instance 1 channel 2 */
98 EDMA_DriverIRQHandler(1U, 2U);
99 /* Instance 1 channel 3 */
100 EDMA_DriverIRQHandler(1U, 3U);
101 /* Instance 1 channel 34 */
102 EDMA_DriverIRQHandler(1U, 34U);
103 /* Instance 1 channel 35 */
104 EDMA_DriverIRQHandler(1U, 35U);
105 }
106
107 /*!
108 * brief DMA instance 1, channel 4~5, 36~37 IRQ handler.
109 *
110 */
DMA4_CH4_CH5_CH36_CH37_DriverIRQHandler(void)111 void DMA4_CH4_CH5_CH36_CH37_DriverIRQHandler(void)
112 {
113 /* Instance 1 channel 4 */
114 EDMA_DriverIRQHandler(1U, 4U);
115 /* Instance 1 channel 5 */
116 EDMA_DriverIRQHandler(1U, 5U);
117 /* Instance 1 channel 36 */
118 EDMA_DriverIRQHandler(1U, 36U);
119 /* Instance 1 channel 37 */
120 EDMA_DriverIRQHandler(1U, 37U);
121 }
122
123 /*!
124 * brief DMA instance 1, channel 6~7, 38~39 IRQ handler.
125 *
126 */
DMA4_CH6_CH7_CH38_CH39_DriverIRQHandler(void)127 void DMA4_CH6_CH7_CH38_CH39_DriverIRQHandler(void)
128 {
129 /* Instance 1 channel 6 */
130 EDMA_DriverIRQHandler(1U, 6U);
131 /* Instance 1 channel 7 */
132 EDMA_DriverIRQHandler(1U, 7U);
133 /* Instance 1 channel 38 */
134 EDMA_DriverIRQHandler(1U, 38U);
135 /* Instance 1 channel 39 */
136 EDMA_DriverIRQHandler(1U, 39U);
137 }
138
139 /*!
140 * brief DMA instance 1, channel 8~9, 40~41 IRQ handler.
141 *
142 */
DMA4_CH8_CH9_CH40_CH41_DriverIRQHandler(void)143 void DMA4_CH8_CH9_CH40_CH41_DriverIRQHandler(void)
144 {
145 /* Instance 1 channel 8 */
146 EDMA_DriverIRQHandler(1U, 8U);
147 /* Instance 1 channel 9 */
148 EDMA_DriverIRQHandler(1U, 9U);
149 /* Instance 1 channel 40 */
150 EDMA_DriverIRQHandler(1U, 40U);
151 /* Instance 1 channel 41 */
152 EDMA_DriverIRQHandler(1U, 41U);
153 }
154
155 /*!
156 * brief DMA instance 1, channel 10~11, 42~43 IRQ handler.
157 *
158 */
DMA4_CH10_CH11_CH42_CH43_DriverIRQHandler(void)159 void DMA4_CH10_CH11_CH42_CH43_DriverIRQHandler(void)
160 {
161 /* Instance 1 channel 10 */
162 EDMA_DriverIRQHandler(1U, 10U);
163 /* Instance 1 channel 11 */
164 EDMA_DriverIRQHandler(1U, 11U);
165 /* Instance 1 channel 42 */
166 EDMA_DriverIRQHandler(1U, 42U);
167 /* Instance 1 channel 43 */
168 EDMA_DriverIRQHandler(1U, 43U);
169 }
170
171 /*!
172 * brief DMA instance 1, channel 12~13, 44~45 IRQ handler.
173 *
174 */
DMA4_CH12_CH13_CH44_CH45_DriverIRQHandler(void)175 void DMA4_CH12_CH13_CH44_CH45_DriverIRQHandler(void)
176 {
177 /* Instance 1 channel 12 */
178 EDMA_DriverIRQHandler(1U, 12U);
179 /* Instance 1 channel 13 */
180 EDMA_DriverIRQHandler(1U, 13U);
181 /* Instance 1 channel 44 */
182 EDMA_DriverIRQHandler(1U, 44U);
183 /* Instance 1 channel 45 */
184 EDMA_DriverIRQHandler(1U, 45U);
185 }
186
187 /*!
188 * brief DMA instance 1, channel 14~15, 46~47 IRQ handler.
189 *
190 */
DMA4_CH14_CH15_CH46_CH47_DriverIRQHandler(void)191 void DMA4_CH14_CH15_CH46_CH47_DriverIRQHandler(void)
192 {
193 /* Instance 1 channel 14 */
194 EDMA_DriverIRQHandler(1U, 14U);
195 /* Instance 1 channel 15 */
196 EDMA_DriverIRQHandler(1U, 15U);
197 /* Instance 1 channel 46 */
198 EDMA_DriverIRQHandler(1U, 46U);
199 /* Instance 1 channel 47 */
200 EDMA_DriverIRQHandler(1U, 47U);
201 }
202
203 /*!
204 * brief DMA instance 1, channel 16~17, 48~49 IRQ handler.
205 *
206 */
DMA4_CH16_CH17_CH48_CH49_DriverIRQHandler(void)207 void DMA4_CH16_CH17_CH48_CH49_DriverIRQHandler(void)
208 {
209 /* Instance 1 channel 16 */
210 EDMA_DriverIRQHandler(1U, 16U);
211 /* Instance 1 channel 17 */
212 EDMA_DriverIRQHandler(1U, 17U);
213 /* Instance 1 channel 48 */
214 EDMA_DriverIRQHandler(1U, 48U);
215 /* Instance 1 channel 49 */
216 EDMA_DriverIRQHandler(1U, 49U);
217 }
218
219 /*!
220 * brief DMA instance 1, channel 18~19, 50~51 IRQ handler.
221 *
222 */
DMA4_CH18_CH19_CH50_CH51_DriverIRQHandler(void)223 void DMA4_CH18_CH19_CH50_CH51_DriverIRQHandler(void)
224 {
225 /* Instance 1 channel 18 */
226 EDMA_DriverIRQHandler(1U, 18U);
227 /* Instance 1 channel 19 */
228 EDMA_DriverIRQHandler(1U, 19U);
229 /* Instance 1 channel 50 */
230 EDMA_DriverIRQHandler(1U, 50U);
231 /* Instance 1 channel 51 */
232 EDMA_DriverIRQHandler(1U, 51U);
233 }
234
235 /*!
236 * brief DMA instance 1, channel 20~21, 52~53 IRQ handler.
237 *
238 */
DMA4_CH20_CH21_CH52_CH53_DriverIRQHandler(void)239 void DMA4_CH20_CH21_CH52_CH53_DriverIRQHandler(void)
240 {
241 /* Instance 1 channel 20 */
242 EDMA_DriverIRQHandler(1U, 20U);
243 /* Instance 1 channel 21 */
244 EDMA_DriverIRQHandler(1U, 21U);
245 /* Instance 1 channel 52 */
246 EDMA_DriverIRQHandler(1U, 52U);
247 /* Instance 1 channel 53 */
248 EDMA_DriverIRQHandler(1U, 53U);
249 }
250
251 /*!
252 * brief DMA instance 1, channel 22~23, 54~55 IRQ handler.
253 *
254 */
DMA4_CH22_CH23_CH54_CH55_DriverIRQHandler(void)255 void DMA4_CH22_CH23_CH54_CH55_DriverIRQHandler(void)
256 {
257 /* Instance 1 channel 22 */
258 EDMA_DriverIRQHandler(1U, 22U);
259 /* Instance 1 channel 23 */
260 EDMA_DriverIRQHandler(1U, 23U);
261 /* Instance 1 channel 54 */
262 EDMA_DriverIRQHandler(1U, 54U);
263 /* Instance 1 channel 55 */
264 EDMA_DriverIRQHandler(1U, 55U);
265 }
266
267 /*!
268 * brief DMA instance 1, channel 24~25, 56~57 IRQ handler.
269 *
270 */
DMA4_CH24_CH25_CH56_CH57_DriverIRQHandler(void)271 void DMA4_CH24_CH25_CH56_CH57_DriverIRQHandler(void)
272 {
273 /* Instance 1 channel 24 */
274 EDMA_DriverIRQHandler(1U, 24U);
275 /* Instance 1 channel 25 */
276 EDMA_DriverIRQHandler(1U, 25U);
277 /* Instance 1 channel 56 */
278 EDMA_DriverIRQHandler(1U, 56U);
279 /* Instance 1 channel 57 */
280 EDMA_DriverIRQHandler(1U, 57U);
281 }
282
283 /*!
284 * brief DMA instance 1, channel 26~27, 58~59 IRQ handler.
285 *
286 */
DMA4_CH26_CH27_CH58_CH59_DriverIRQHandler(void)287 void DMA4_CH26_CH27_CH58_CH59_DriverIRQHandler(void)
288 {
289 /* Instance 1 channel 26 */
290 EDMA_DriverIRQHandler(1U, 26U);
291 /* Instance 1 channel 27 */
292 EDMA_DriverIRQHandler(1U, 27U);
293 /* Instance 1 channel 58 */
294 EDMA_DriverIRQHandler(1U, 58U);
295 /* Instance 1 channel 59 */
296 EDMA_DriverIRQHandler(1U, 59U);
297 }
298
299 /*!
300 * brief DMA instance 1, channel 28~29, 60~61 IRQ handler.
301 *
302 */
DMA4_CH28_CH29_CH60_CH61_DriverIRQHandler(void)303 void DMA4_CH28_CH29_CH60_CH61_DriverIRQHandler(void)
304 {
305 /* Instance 1 channel 28 */
306 EDMA_DriverIRQHandler(1U, 28U);
307 /* Instance 1 channel 29 */
308 EDMA_DriverIRQHandler(1U, 29U);
309 /* Instance 1 channel 60 */
310 EDMA_DriverIRQHandler(1U, 60U);
311 /* Instance 1 channel 61 */
312 EDMA_DriverIRQHandler(1U, 61U);
313 }
314
315 /*!
316 * brief DMA instance 1, channel 30~31, 62~63 IRQ handler.
317 *
318 */
DMA4_CH30_CH31_CH62_CH63_DriverIRQHandler(void)319 void DMA4_CH30_CH31_CH62_CH63_DriverIRQHandler(void)
320 {
321 /* Instance 1 channel 30 */
322 EDMA_DriverIRQHandler(1U, 30U);
323 /* Instance 1 channel 31 */
324 EDMA_DriverIRQHandler(1U, 31U);
325 /* Instance 1 channel 62 */
326 EDMA_DriverIRQHandler(1U, 62U);
327 /* Instance 1 channel 63 */
328 EDMA_DriverIRQHandler(1U, 63U);
329 }
330
331 /*!
332 * brief DMA instance 0, channel 0 IRQ handler.
333 *
334 */
DMA3_CH0_DriverIRQHandler(void)335 void DMA3_CH0_DriverIRQHandler(void)
336 {
337 /* Instance 0 channel 0 */
338 EDMA_DriverIRQHandler(0U, 0U);
339 }
340
341 /*!
342 * brief DMA instance 0, channel 1 IRQ handler.
343 *
344 */
DMA3_CH1_DriverIRQHandler(void)345 void DMA3_CH1_DriverIRQHandler(void)
346 {
347 /* Instance 0 channel 1 */
348 EDMA_DriverIRQHandler(0U, 1U);
349 }
350
351 /*!
352 * brief DMA instance 0, channel 2 IRQ handler.
353 *
354 */
DMA3_CH2_DriverIRQHandler(void)355 void DMA3_CH2_DriverIRQHandler(void)
356 {
357 /* Instance 0 channel 2 */
358 EDMA_DriverIRQHandler(0U, 2U);
359 }
360
361 /*!
362 * brief DMA instance 0, channel 3 IRQ handler.
363 *
364 */
DMA3_CH3_DriverIRQHandler(void)365 void DMA3_CH3_DriverIRQHandler(void)
366 {
367 /* Instance 0 channel 3 */
368 EDMA_DriverIRQHandler(0U, 3U);
369 }
370
371 /*!
372 * brief DMA instance 0, channel 4 IRQ handler.
373 *
374 */
DMA3_CH4_DriverIRQHandler(void)375 void DMA3_CH4_DriverIRQHandler(void)
376 {
377 /* Instance 0 channel 4 */
378 EDMA_DriverIRQHandler(0U, 4U);
379 }
380
381 /*!
382 * brief DMA instance 0, channel 5 IRQ handler.
383 *
384 */
DMA3_CH5_DriverIRQHandler(void)385 void DMA3_CH5_DriverIRQHandler(void)
386 {
387 /* Instance 0 channel 5 */
388 EDMA_DriverIRQHandler(0U, 5U);
389 }
390
391 /*!
392 * brief DMA instance 0, channel 6 IRQ handler.
393 *
394 */
DMA3_CH6_DriverIRQHandler(void)395 void DMA3_CH6_DriverIRQHandler(void)
396 {
397 /* Instance 0 channel 6 */
398 EDMA_DriverIRQHandler(0U, 6U);
399 }
400
401 /*!
402 * brief DMA instance 0, channel 7 IRQ handler.
403 *
404 */
DMA3_CH7_DriverIRQHandler(void)405 void DMA3_CH7_DriverIRQHandler(void)
406 {
407 /* Instance 0 channel 7 */
408 EDMA_DriverIRQHandler(0U, 7U);
409 }
410
411 /*!
412 * brief DMA instance 0, channel 8 IRQ handler.
413 *
414 */
DMA3_CH8_DriverIRQHandler(void)415 void DMA3_CH8_DriverIRQHandler(void)
416 {
417 /* Instance 0 channel 8 */
418 EDMA_DriverIRQHandler(0U, 8U);
419 }
420
421 /*!
422 * brief DMA instance 0, channel 9 IRQ handler.
423 *
424 */
DMA3_CH9_DriverIRQHandler(void)425 void DMA3_CH9_DriverIRQHandler(void)
426 {
427 /* Instance 0 channel 9 */
428 EDMA_DriverIRQHandler(0U, 9U);
429 }
430
431 /*!
432 * brief DMA instance 0, channel 10 IRQ handler.
433 *
434 */
DMA3_CH10_DriverIRQHandler(void)435 void DMA3_CH10_DriverIRQHandler(void)
436 {
437 /* Instance 0 channel 10 */
438 EDMA_DriverIRQHandler(0U, 10U);
439 }
440
441 /*!
442 * brief DMA instance 0, channel 11 IRQ handler.
443 *
444 */
DMA3_CH11_DriverIRQHandler(void)445 void DMA3_CH11_DriverIRQHandler(void)
446 {
447 /* Instance 0 channel 11 */
448 EDMA_DriverIRQHandler(0U, 11U);
449 }
450
451 /*!
452 * brief DMA instance 0, channel 12 IRQ handler.
453 *
454 */
DMA3_CH12_DriverIRQHandler(void)455 void DMA3_CH12_DriverIRQHandler(void)
456 {
457 /* Instance 0 channel 12 */
458 EDMA_DriverIRQHandler(0U, 12U);
459 }
460
461 /*!
462 * brief DMA instance 0, channel 13 IRQ handler.
463 *
464 */
DMA3_CH13_DriverIRQHandler(void)465 void DMA3_CH13_DriverIRQHandler(void)
466 {
467 /* Instance 0 channel 13 */
468 EDMA_DriverIRQHandler(0U, 13U);
469 }
470
471 /*!
472 * brief DMA instance 0, channel 14 IRQ handler.
473 *
474 */
DMA3_CH14_DriverIRQHandler(void)475 void DMA3_CH14_DriverIRQHandler(void)
476 {
477 /* Instance 0 channel 14 */
478 EDMA_DriverIRQHandler(0U, 14U);
479 }
480
481 /*!
482 * brief DMA instance 0, channel 15 IRQ handler.
483 *
484 */
DMA3_CH15_DriverIRQHandler(void)485 void DMA3_CH15_DriverIRQHandler(void)
486 {
487 /* Instance 0 channel 15 */
488 EDMA_DriverIRQHandler(0U, 15U);
489 }
490
491 /*!
492 * brief DMA instance 0, channel 16 IRQ handler.
493 *
494 */
DMA3_CH16_DriverIRQHandler(void)495 void DMA3_CH16_DriverIRQHandler(void)
496 {
497 /* Instance 0 channel 16 */
498 EDMA_DriverIRQHandler(0U, 16U);
499 }
500
501 /*!
502 * brief DMA instance 0, channel 17 IRQ handler.
503 *
504 */
DMA3_CH17_DriverIRQHandler(void)505 void DMA3_CH17_DriverIRQHandler(void)
506 {
507 /* Instance 0 channel 17 */
508 EDMA_DriverIRQHandler(0U, 17U);
509 }
510
511 /*!
512 * brief DMA instance 0, channel 18 IRQ handler.
513 *
514 */
DMA3_CH18_DriverIRQHandler(void)515 void DMA3_CH18_DriverIRQHandler(void)
516 {
517 /* Instance 0 channel 18 */
518 EDMA_DriverIRQHandler(0U, 18U);
519 }
520
521 /*!
522 * brief DMA instance 0, channel 19 IRQ handler.
523 *
524 */
DMA3_CH19_DriverIRQHandler(void)525 void DMA3_CH19_DriverIRQHandler(void)
526 {
527 /* Instance 0 channel 19 */
528 EDMA_DriverIRQHandler(0U, 19U);
529 }
530
531 /*!
532 * brief DMA instance 0, channel 20 IRQ handler.
533 *
534 */
DMA3_CH20_DriverIRQHandler(void)535 void DMA3_CH20_DriverIRQHandler(void)
536 {
537 /* Instance 0 channel 20 */
538 EDMA_DriverIRQHandler(0U, 20U);
539 }
540
541 /*!
542 * brief DMA instance 0, channel 21 IRQ handler.
543 *
544 */
DMA3_CH21_DriverIRQHandler(void)545 void DMA3_CH21_DriverIRQHandler(void)
546 {
547 /* Instance 0 channel 21 */
548 EDMA_DriverIRQHandler(0U, 21U);
549 }
550
551 /*!
552 * brief DMA instance 0, channel 22 IRQ handler.
553 *
554 */
DMA3_CH22_DriverIRQHandler(void)555 void DMA3_CH22_DriverIRQHandler(void)
556 {
557 /* Instance 0 channel 22 */
558 EDMA_DriverIRQHandler(0U, 22U);
559 }
560
561 /*!
562 * brief DMA instance 0, channel 23 IRQ handler.
563 *
564 */
DMA3_CH23_DriverIRQHandler(void)565 void DMA3_CH23_DriverIRQHandler(void)
566 {
567 /* Instance 0 channel 23 */
568 EDMA_DriverIRQHandler(0U, 23U);
569 }
570
571 /*!
572 * brief DMA instance 0, channel 24 IRQ handler.
573 *
574 */
DMA3_CH24_DriverIRQHandler(void)575 void DMA3_CH24_DriverIRQHandler(void)
576 {
577 /* Instance 0 channel 24 */
578 EDMA_DriverIRQHandler(0U, 24U);
579 }
580
581 /*!
582 * brief DMA instance 0, channel 25 IRQ handler.
583 *
584 */
DMA3_CH25_DriverIRQHandler(void)585 void DMA3_CH25_DriverIRQHandler(void)
586 {
587 /* Instance 0 channel 25 */
588 EDMA_DriverIRQHandler(0U, 25U);
589 }
590
591 /*!
592 * brief DMA instance 0, channel 26 IRQ handler.
593 *
594 */
DMA3_CH26_DriverIRQHandler(void)595 void DMA3_CH26_DriverIRQHandler(void)
596 {
597 /* Instance 0 channel 26 */
598 EDMA_DriverIRQHandler(0U, 26U);
599 }
600
601 /*!
602 * brief DMA instance 0, channel 27 IRQ handler.
603 *
604 */
DMA3_CH27_DriverIRQHandler(void)605 void DMA3_CH27_DriverIRQHandler(void)
606 {
607 /* Instance 0 channel 27 */
608 EDMA_DriverIRQHandler(0U, 27U);
609 }
610
611 /*!
612 * brief DMA instance 0, channel 28 IRQ handler.
613 *
614 */
DMA3_CH28_DriverIRQHandler(void)615 void DMA3_CH28_DriverIRQHandler(void)
616 {
617 /* Instance 0 channel 28 */
618 EDMA_DriverIRQHandler(0U, 28U);
619 }
620
621 /*!
622 * brief DMA instance 0, channel 29 IRQ handler.
623 *
624 */
DMA3_CH29_DriverIRQHandler(void)625 void DMA3_CH29_DriverIRQHandler(void)
626 {
627 /* Instance 0 channel 29 */
628 EDMA_DriverIRQHandler(0U, 29U);
629 }
630
631 /*!
632 * brief DMA instance 0, channel 30 IRQ handler.
633 *
634 */
DMA3_CH30_DriverIRQHandler(void)635 void DMA3_CH30_DriverIRQHandler(void)
636 {
637 /* Instance0 channel 30 */
638 EDMA_DriverIRQHandler(0U, 30U);
639 }
640
641 /*!
642 * brief DMA instance 0, channel 31 IRQ handler.
643 *
644 */
DMA3_CH31_DriverIRQHandler(void)645 void DMA3_CH31_DriverIRQHandler(void)
646 {
647 /* Instance 0 channel 31 */
648 EDMA_DriverIRQHandler(0U, 31U);
649 }
650
