1 /* 2 * Copyright 2021-2023 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef _FSL_PMU_H_ 9 #define _FSL_PMU_H_ 10 11 #include "fsl_common.h" 12 13 /*! 14 * @addtogroup pmu 15 * @{ 16 */ 17 18 /******************************************************************************* 19 * Definitions 20 ******************************************************************************/ 21 22 /*! @name Driver version 23 * @{ 24 */ 25 26 /*! @brief PMU driver version */ 27 #define FSL_PMU_DRIVER_VERSION (MAKE_VERSION(2, 1, 2)) /*!< Version 2.1.2. */ 28 29 /*! 30 * @} 31 */ 32 33 /*! 34 * @brief The name of LDOs 35 */ 36 typedef enum _pmu_ldo_name 37 { 38 kPMU_PllLdo = 0U, /*!< The PLL LDO in SOC domain. */ 39 kPMU_AonAnaLdo = 1U, /*!< The AON ANA LDO in AON domain. */ 40 kPMU_AonDigLdo = 2U, /*!< The AON DIG LDO in AON domain. */ 41 } pmu_ldo_name_t; 42 43 /*! 44 * @brief The control mode of LDOs/Bandgaps/Body Bias. 45 */ 46 typedef enum _pmu_control_mode 47 { 48 kPMU_StaticMode = 0U, /*!< Static/Software Control mode. */ 49 kPMU_GPCMode = 1U, /*!< GPC/Hardware Control mode. */ 50 } pmu_control_mode_t; 51 52 /*! 53 * @brief The operation mode for the LDOs. 54 */ 55 typedef enum _pmu_ldo_operate_mode 56 { 57 kPMU_LowPowerMode = 0x0U, /*!< LDOs operate in Low power mode. */ 58 kPMU_HighPowerMode = 0x1U, /*!< LDOs operate in High power mode. */ 59 } pmu_ldo_operate_mode_t; 60 61 /*! 62 * @brief The enumeration of AON ANA LDO's charge pump current. 63 */ 64 typedef enum _pmu_aon_ana_ldo_charge_pump_current 65 { 66 kPMU_AonAnaChargePump300nA = 0U, /*!< The current of the charge pump is selected as 300nA. */ 67 kPMU_AonAnaChargePump400nA = 1U, /*!< The current of the charge pump is selected as 400nA. */ 68 kPMU_AonAnaChargePump500nA = 2U, /*!< The current of the charge pump is selected as 500nA. */ 69 kPMU_AonAnaChargePump600nA = 3U, /*!< The current of the charge pump is selected as 600nA. */ 70 } pmu_aon_ana_ldo_charge_pump_current_t; 71 72 /*! 73 * @brief The enumeration of AON ANA LDO's output range. 74 */ 75 typedef enum _pmu_aon_ana_ldo_output_range 76 { 77 kPMU_AonAnaLdoOutputFrom1P77To1P83 = 0U, /*!< The output voltage varies from 1.77V to 1.83V. */ 78 kPMU_AonAnaLdoOutputFrom1P72To1P77 = 1U, /*!< The output voltage varies from 1.72V to 1.77V. */ 79 kPMU_AonAnaLdoOutputFrom1P82To1P88 = 2U, /*!< The output voltage varies from 1.82V to 1.88V. */ 80 } pmu_aon_ana_ldo_output_range_t; 81 82 /*! 83 * @brief The enumeration of voltage step time for AON DIG LDO. 84 */ 85 typedef enum _pmu_aon_dig_voltage_step_time 86 { 87 kPMU_AonDigVoltageStepInc15us = 0x0U, /*!< AON DIG LDO voltage step time selected as 15us. */ 88 kPMU_AonDigVoltageStepInc25us = 0x1U, /*!< AON DIG LDO voltage step time selected as 25us. */ 89 kPMU_AonDigVoltageStepInc50us = 0x2U, /*!< AON DIG LDO voltage step time selected as 50us. */ 90 kPMU_AonDigVoltageStepInc100us = 0x3U, /*!< AON DIG LDO voltage step time selected as 100us. */ 91 } pmu_aon_dig_voltage_step_time_t; 92 93 /*! 94 * @brief The target output voltage of AON DIG LDO. 95 */ 96 typedef enum _pmu_aon_dig_target_output_voltage 97 { 98 kPMU_AonDigTargetStableVoltage0P631V = 0x0U, /*!< The target voltage selected as 0.631V */ 99 kPMU_AonDigTargetStableVoltage0P65V = 0x1U, /*!< The target voltage selected as 0.65V */ 100 kPMU_AonDigTargetStableVoltage0P67V = 0x2U, /*!< The target voltage selected as 0.67V */ 101 kPMU_AonDigTargetStableVoltage0P689V = 0x3U, /*!< The target voltage selected as 0.689V */ 102 kPMU_AonDigTargetStableVoltage0P709V = 0x4U, /*!< The target voltage selected as 0.709V */ 103 kPMU_AonDigTargetStableVoltage0P728V = 0x5U, /*!< The target voltage selected as 0.728V */ 104 kPMU_AonDigTargetStableVoltage0P748V = 0x6U, /*!< The target voltage selected as 0.748V */ 105 kPMU_AonDigTargetStableVoltage0P767V = 0x7U, /*!< The target voltage selected as 0.767V */ 106 kPMU_AonDigTargetStableVoltage0P786V = 0x8U, /*!< The target voltage selected as 0.786V */ 107 kPMU_AonDigTargetStableVoltage0P806V = 0x9U, /*!< The target voltage selected as 0.806V */ 108 kPMU_AonDigTargetStableVoltage0P825V = 0xAU, /*!< The target voltage selected as 0.825V */ 109 kPMU_AonDigTargetStableVoltage0P845V = 0xBU, /*!< The target voltage selected as 0.845V */ 110 kPMU_AonDigTargetStableVoltage0P864V = 0xCU, /*!< The target voltage selected as 0.864V */ 111 kPMU_AonDigTargetStableVoltage0P883V = 0xDU, /*!< The target voltage selected as 0.883V */ 112 kPMU_AonDigTargetStableVoltage0P903V = 0xEU, /*!< The target voltage selected as 0.903V */ 113 kPMU_AonDigTargetStableVoltage0P922V = 0xFU, /*!< The target voltage selected as 0.922V */ 114 kPMU_AonDigTargetStableVoltage0P942V = 0x10U, /*!< The target voltage selected as 0.942V */ 115 kPMU_AonDigTargetStableVoltage0P961V = 0x11U, /*!< The target voltage selected as 0.961V */ 116 kPMU_AonDigTargetStableVoltage0P981V = 0x12U, /*!< The target voltage selected as 0.981V */ 117 kPMU_AonDigTargetStableVoltage1P0V = 0x13U, /*!< The target voltage selected as 1.0V */ 118 kPMU_AonDigTargetStableVoltage1P019V = 0x14U, /*!< The target voltage selected as 1.019V */ 119 kPMU_AonDigTargetStableVoltage1P039V = 0x15U, /*!< The target voltage selected as 1.039V */ 120 kPMU_AonDigTargetStableVoltage1P058V = 0x16U, /*!< The target voltage selected as 1.058V */ 121 kPMU_AonDigTargetStableVoltage1P078V = 0x17U, /*!< The target voltage selected as 1.078V */ 122 kPMU_AonDigTargetStableVoltage1P097V = 0x18U, /*!< The target voltage selected as 1.097V */ 123 kPMU_AonDigTargetStableVoltage1P117V = 0x19U, /*!< The target voltage selected as 1.117V */ 124 kPMU_AonDigTargetStableVoltage1P136V = 0x1AU, /*!< The target voltage selected as 1.136V */ 125 kPMU_AonDigTargetStableVoltage1P155V = 0x1BU, /*!< The target voltage selected as 1.155V */ 126 kPMU_AonDigTargetStableVoltage1P175V = 0x1CU, /*!< The target voltage selected as 1.175V */ 127 kPMU_AonDigTargetStableVoltage1P194V = 0x1DU, /*!< The target voltage selected as 1.194V */ 128 kPMU_AonDigTargetStableVoltage1P214V = 0x1EU, /*!< The target voltage selected as 1.214V */ 129 kPMU_AonDigTargetStableVoltage1P233V = 0x1FU, /*!< The target voltage selected as 1.233V */ 130 } pmu_aon_dig_target_output_voltage_t; 131 132 /*! 133 * @brief The enumeration of the BBSM DIG LDO's charge pump current. 134 */ 135 typedef enum _pmu_bbsm_dig_charge_pump_current 136 { 137 kPMU_BbsmDigChargePump12P5nA = 0U, /*!< The current of BBSM DIG LDO's charge pump is selected as 12.5nA. */ 138 kPMU_BbsmDigChargePump6P25nA = 1U, /*!< The current of BBSM DIG LDO's charge pump is selected as 6.25nA. */ 139 kPMU_BbsmDigChargePump18P75nA = 2U, /*!< The current of BBSM DIG LDO's charge pump is selected as 18.75nA. */ 140 } pmu_bbsm_dig_charge_pump_current_t; 141 142 /*! 143 * @brief The enumeration of the BBSM DIG LDO's discharge resistor. 144 */ 145 typedef enum _pmu_bbsm_dig_discharge_resistor_value 146 { 147 kPMU_BbsmDigDischargeResistor15K = 0U, /*!< The Discharge Resistor is selected as 15K ohm */ 148 kPMU_BbsmDigDischargeResistor30K = 1U, /*!< The Discharge Resistor is selected as 30K ohm */ 149 kPMU_BbsmDigDischargeResistor9K = 2U, /*!< The Discharge Resistor is selected as 9K ohm */ 150 } pmu_bbsm_dig_discharge_resistor_value_t; 151 152 /*! 153 * @brief The enumeration of bandgap power down option. 154 */ 155 enum _pmu_static_bandgap_power_down_option 156 { 157 kPMU_PowerDownBandgapFully = 1U << 0U, /*!< Fully power down the bandgap module. */ 158 kPMU_PowerDownVoltageReferenceOutputOnly = 1U << 1U, /*!< Power down only the reference output 159 section of the bandgap */ 160 kPMU_PowerDownBandgapVBGUPDetector = 1U << 2U, /*!< Power down the VBGUP detector of the bandgap without 161 affecting any additional functionality. */ 162 }; 163 164 /*! 165 * @brief The enumeration of output VBG voltage. 166 */ 167 typedef enum _pmu_bandgap_output_VBG_voltage_value 168 { 169 kPMU_BandgapOutputVBGVoltageNominal = 0x0U, /*!< Output nominal voltage. */ 170 kPMU_BandgapOutputVBGVoltagePlus10mV = 0x1U, /*!< Output VBG voltage Plus 10mV. */ 171 kPMU_BandgapOutputVBGVoltagePlus20mV = 0x2U, /*!< Output VBG voltage Plus 20mV. */ 172 kPMU_BandgapOutputVBGVoltagePlus30mV = 0x3U, /*!< Output VBG voltage Plus 30mV. */ 173 kPMU_BandgapOutputVBGVoltageMinus10mV = 0x4U, /*!< Output VBG voltage Minus 10mV. */ 174 kPMU_BandgapOutputVBGVoltageMinus20mV = 0x5U, /*!< Output VBG voltage Minus 20mV. */ 175 kPMU_BandgapOutputVBGVoltageMinus30mV = 0x6U, /*!< Output VBG voltage Minus 30mV. */ 176 kPMU_BandgapOutputVBGVoltageMinus40mV = 0x7U, /*!< Output VBG voltage Minus 40mV. */ 177 } pmu_bandgap_output_VBG_voltage_value_t; 178 179 /*! 180 * @brief The enumeration of output current. 181 */ 182 typedef enum _pmu_bandgap_output_current_value 183 { 184 kPMU_OutputCurrent11P5uA = 0x0U, /*!< Output 11.5uA current from the bandgap. */ 185 kPMU_OutputCurrent11P8uA = 0x1U, /*!< Output 11.8uA current from the bandgap. */ 186 kPMU_OutputCurrent12P1uA = 0x2U, /*!< Output 12.1uA current from the bandgap. */ 187 kPMU_OutputCurrent12P4uA = 0x4U, /*!< Output 12.4uA current from the bandgap. */ 188 kPMU_OutputCurrent12P7uA = 0x5U, /*!< Output 12.7uA current from the bandgap. */ 189 kPMU_OutputCurrent13P0uA = 0x6U, /*!< Output 13.0uA current from the bandgap. */ 190 kPMU_OutputCurrent13P3uA = 0x7U, /*!< Output 13.3uA current from the bandgap. */ 191 } pmu_bandgap_output_current_value_t; 192 193 /*! 194 * @brief The enumerator of well bias power source. 195 */ 196 typedef enum _pmu_well_bias_power_source 197 { 198 kPMU_WellBiasPowerFromAonDigLdo = 0U, /*!< AON Dig LDO supplies the power stage and NWELL sampler. */ 199 kPMU_WellBiasPowerFromDCDC, /*!< DCDC supplies the power stage and NWELL sampler. */ 200 } pmu_well_bias_power_source_t; 201 202 /*! 203 * @brief The enumerator of bias area size. 204 */ 205 typedef enum _pmu_bias_area_size 206 { 207 kPMU_180uA_6mm2At125C = 0U, /*!< Imax = 180uA; Areamax-RVT = 6.00mm2 at 125C */ 208 kPMU_150uA_5mm2At125C, /*!< Imax = 150uA; Areamax-RVT = 5.00mm2 at 125C */ 209 kPMU_120uA_4mm2At125C, /*!< Imax = 120uA; Areamax-RVT = 4.00mm2 at 125C */ 210 kPMU_90uA_3mm2At125C, /*!< Imax = 90uA; Areamax-RVT = 3.00mm2 at 125C */ 211 kPMU_60uA_2mm2At125C, /*!< Imax = 60uA; Areamax-RVT = 2.00mm2 at 125C */ 212 kPMU_45uA_1P5mm2At125C, /*!< Imax = 45uA; Areamax-RVT = 1P5mm2 at 125C */ 213 kPMU_30uA_1mm2At125C, /*!< Imax = 30uA; Areamax-RVT = 1.00mm2 at 125C */ 214 kPMU_15uA_0P5mm2At125C, /*!< Imax = 15uA; Areamax-RVT = 0.50mm2 at 125C */ 215 } pmu_bias_area_size_t; 216 217 /*! 218 * @brief The enumerator of well bias typical frequency. 219 */ 220 typedef enum _pmu_well_bias_typical_freq 221 { 222 kPMU_OscFreqDiv128 = 0U, /*!< Typical frequency = osc_freq / 128. */ 223 kPMU_OscFreqDiv64 = 1U, /*!< Typical frequency = osc_freq / 64. */ 224 kPMU_OscFreqDiv32 = 2U, /*!< Typical frequency = osc_freq / 32. */ 225 kPMU_OscFreqDiv16 = 3U, /*!< Typical frequency = osc_freq / 16. */ 226 kPMU_OscFreqDiv8 = 4U, /*!< Typical frequency = osc_freq / 8. */ 227 kPMU_OscFreqDiv2 = 6U, /*!< Typical frequency = osc_freq / 2. */ 228 kPMU_OscFreq = 7U, /*!< Typical frequency = oscillator frequency. */ 229 } pmu_well_bias_typical_freq_t; 230 231 /*! 232 * @brief The enumerator of well bias adaptive clock source. 233 */ 234 typedef enum _pmu_adaptive_clock_source 235 { 236 kPMU_AdaptiveClkSourceOscClk = 0U, /*!< The adaptive clock source is oscillator clock. */ 237 kPMU_AdaptiveClkSourceChargePumpClk, /*!< The adaptive clock source is charge pump clock. */ 238 } pmu_adaptive_clock_source_t; 239 240 /*! 241 * @brief The enumerator of frequency reduction due to cap increment. 242 */ 243 typedef enum _pmu_freq_reduction 244 { 245 kPMU_FreqReductionNone = 0U, /*!< No frequency reduction. */ 246 kPMU_FreqReduction30PCT, /*!< 30% frequency reduction due to cap increment. */ 247 kPMU_FreqReduction40PCT, /*!< 40% frequency reduction due to cap increment. */ 248 kPMU_FreqReduction50PCT, /*!< 50% frequency reduction due to cap increment. */ 249 } pmu_freq_reduction_t; 250 251 /*! 252 * @brief The enumerator of well bias 1P8 adjustment. 253 */ 254 typedef enum _pmu_well_bias_1P8_adjustment 255 { 256 kPMU_Cref0fFCspl0fFDeltaC0fF = 0U, /*!< Cref = 0fF, Cspl = 0fF, DeltaC = 0fF. */ 257 kPMU_Cref0fFCspl30fFDeltaCN30fF, /*!< Cref = 0fF, Cspl = 30fF, DeltaC = -30fF. */ 258 kPMU_Cref0fFCspl43fFDeltaCN43fF, /*!< Cref = 0fF, Cspl = 43fF, DeltaC = -43fF. */ 259 kPMU_Cref0fFCspl62fFDeltaCN62fF, /*!< Cref = 0fF, Cspl = 62fF, DeltaC = -62fF. */ 260 kPMU_Cref0fFCspl105fFDeltaCN105fF, /*!< Cref = 0fF, Cspl = 105fF, DeltaC = -105fF. */ 261 kPMU_Cref30fFCspl0fFDeltaC30fF, /*!< Cref = 30fF, Cspl = 0fF, DeltaC = 30fF. */ 262 kPMU_Cref30fFCspl43fFDeltaCN12fF, /*!< Cref = 30fF, Cspl = 43fF, DeltaC = -12fF. */ 263 kPMU_Cref30fFCspl105fFDeltaCN75fF, /*!< Cref = 30fF, Cspl = 105fF, DeltaC = -75fF. */ 264 kPMU_Cref43fFCspl0fFDeltaC43fF, /*!< Cref = 43fF, Cspl = 0fF, DeltaC = 43fF. */ 265 kPMU_Cref43fFCspl30fFDeltaC13fF, /*!< Cref = 43fF, Cspl = 30fF, DeltaC = 13fF. */ 266 kPMU_Cref43fFCspl62fFDeltaCN19fF, /*!< Cref = 43fF, Cspl = 62fF, DeltaC = -19fF. */ 267 kPMU_Cref62fFCspl0fFDeltaC62fF, /*!< Cref = 62fF, Cspl = 0fF, DeltaC = 62fF. */ 268 kPMU_Cref62fFCspl43fFDeltaC19fF, /*!< Cref = 62fF, Cspl = 43fF, DeltaC = 19fF. */ 269 kPMU_Cref105fFCspl0fFDeltaC105fF, /*!< Cref = 105fF, Cspl = 0fF, DeltaC = 105fF. */ 270 kPMU_Cref105fFCspl30fFDeltaC75fF, /*!< Cref = 105fF, Cspl = 30fF, DeltaC = 75fF. */ 271 } pmu_well_bias_1P8_adjustment_t; 272 273 /*! 274 * @brief AON ANA LDO config. 275 */ 276 typedef struct _pmu_static_aon_ana_ldo_config 277 { 278 pmu_ldo_operate_mode_t mode; /*!< The operate mode of AON ANA LDO. */ 279 bool enable2mALoad; /*!< Enable/Disable 2mA load. 280 - \b true Enables 2mA loading to prevent overshoot; 281 - \b false Disables 2mA loading.*/ 282 bool enable4mALoad; /*!< Enable/Disable 4mA load. 283 - \b true Enables 4mA loading to prevent dramatic voltage drop; 284 - \b false Disables 4mA load. */ 285 bool enable20uALoad; /*!< Enable/Disable 20uA load. 286 - \b true Enables 20uA loading to prevent overshoot; 287 - \b false Disables 20uA load. */ 288 bool enableStandbyMode; /*!< Enable/Disable Standby Mode. 289 - \b true Enables Standby mode, if the STBY assert, the AON ANA LDO enter LP mode 290 - \b false Disables Standby mode. */ 291 } pmu_static_aon_ana_ldo_config_t; 292 293 /*! 294 * @brief AON DIG LDO Config in Static/Software Mode. 295 */ 296 typedef struct _pmu_static_aon_dig_config 297 { 298 bool enableStableDetect; /*!< Enable/Disable Stable Detect. 299 - \b true Enables Stable Detect. 300 - \b false Disables Stable Detect. */ 301 pmu_aon_dig_voltage_step_time_t voltageStepTime; /*!< Step time. */ 302 pmu_aon_dig_target_output_voltage_t targetVoltage; /*!< The target output voltage. */ 303 } pmu_static_aon_dig_config_t; 304 305 /*! 306 * @brief BBSM DIG LDO config. 307 */ 308 typedef struct _pmu_bbsm_dig_config 309 { 310 pmu_ldo_operate_mode_t mode; /*!< The operate mode the BBSM DIG LDO. */ 311 pmu_bbsm_dig_charge_pump_current_t chargePumpCurrent; /*!< The current of BBSM DIG LDO's charge pump current. */ 312 pmu_bbsm_dig_discharge_resistor_value_t dischargeResistorValue; /*!< The value of BBSM DIG LDO's 313 Discharge Resistor. */ 314 uint8_t trimValue; /*!< The trim value. */ 315 bool enablePullDown; /*!< Enable/Disable Pull down. 316 - \b true Enables the feature of using 1M ohm resistor to discharge the LDO output. 317 - \b false Disables the feature of using 1M ohm resistor to discharge the LDO output. */ 318 bool enableLdoStable; /*!< Enable/Disable BBSM DIG LDO Stable. */ 319 } pmu_bbsm_dig_config_t; 320 321 /*! 322 * @brief Bandgap config in static mode. 323 */ 324 typedef struct _pmu_static_bandgap_config 325 { 326 uint8_t powerDownOption; /*!< The OR'ed value of @ref _pmu_static_bandgap_power_down_option. Please refer to @ref 327 _pmu_static_bandgap_power_down_option. */ 328 bool enableLowPowerMode; /*!< Turn on/off the Low power mode. 329 - \b true Turns on the low power operation of the bandgap. 330 - \b false Turns off the low power operation of the bandgap. */ 331 pmu_bandgap_output_VBG_voltage_value_t outputVoltage; /*!< The output VBG voltage of Bandgap. */ 332 pmu_bandgap_output_current_value_t outputCurrent; /*!< The output current from the bandgap to 333 the temperature sensors. */ 334 } pmu_static_bandgap_config_t; 335 336 /*! 337 * @brief The union of well bias basic options, such as clock source, power source and so on. 338 */ 339 typedef union _pmu_well_bias_option 340 { 341 uint16_t wellBiasData; /*!< well bias configuration data. */ 342 struct 343 { 344 uint16_t enablePWellOnly : 1U; /*!< Turn on both PWELL and NWELL, or only trun on PWELL. 345 - \b 1b0 PWELL and NEWLL are both turned on. 346 - \b 1b1 PWELL is turned on only. */ 347 uint16_t reserved1 : 1U; /*!< Reserved. */ 348 uint16_t biasAreaSize : 3U; /*!< Select size of bias area, please refer to @ref pmu_bias_area_size_t */ 349 uint16_t disableAdaptiveFreq : 1U; /*!< Enable/Disable adaptive frequency. 350 - \b 1b0 Frequency change after each half cycle minimum frequency 351 determined by typical frequency. 352 - \b 1b1 Adaptive frequency disabled. Frequency determined by typical 353 frequency. */ 354 uint16_t wellBiasFreq : 3U; /*!< Set well bias typical frequency, please refer to @ref 355 pmu_well_bias_typical_freq_t. */ 356 uint16_t clkSource : 1U; /*!< Config the adaptive clock source, please @ref pmu_adaptive_clock_source_t. */ 357 uint16_t freqReduction : 2U; /*!< Config the percent of frequency reduction due to cap increment, 358 please refer to @ref pmu_freq_reduction_t. */ 359 uint16_t enablePullDownOption : 1U; /*!< Enable/Disable pull down option. 360 - \b false Pull down option is disabled. 361 - \b true Pull down option is enabled. */ 362 uint16_t reserved2 : 1U; /*!< Reserved. */ 363 uint16_t powerSource : 1U; /*!< Set power source, please refer to @ref pmu_well_bias_power_source_t. */ 364 uint16_t reserved3 : 1U; /*!< Reserved. */ 365 } wellBiasStruct; 366 } pmu_well_bias_option_t; 367 368 /*! 369 * @brief The structure of well bias configuration. 370 */ 371 typedef struct _pmu_well_bias_config 372 { 373 pmu_well_bias_option_t wellBiasOption; /*!< Well bias basic function, please 374 refer to @ref pmu_well_bias_option_t. */ 375 pmu_well_bias_1P8_adjustment_t adjustment; /*!< Well bias adjustment 1P8, please 376 refer to @ref pmu_well_bias_1P8_adjustment_t. */ 377 } pmu_well_bias_config_t; 378 379 /******************************************************************************* 380 * API 381 ******************************************************************************/ 382 #if defined(__cplusplus) 383 extern "C" { 384 #endif 385 386 /*! 387 * @name LDOs Control APIs 388 * @{ 389 */ 390 391 /*! 392 * brief Selects the control mode of the PLL LDO. 393 * 394 * param base PMU peripheral base address. 395 * param mode The control mode of the PLL LDO. Please refer to pmu_control_mode_t. 396 */ 397 void PMU_SetPllLdoControlMode(ANADIG_PMU_Type *base, pmu_control_mode_t mode); 398 399 /*! 400 * @brief Enables PLL LDO via AI interface in Static/Software mode. 401 * 402 * @param base PMU peripheral base address. 403 */ 404 void PMU_StaticEnablePllLdo(ANADIG_PMU_Type *base); 405 406 /*! 407 * @brief Disables PLL LDO via AI interface in Static/Software mode. 408 */ 409 void PMU_StaticDisablePllLdo(void); 410 411 /*! 412 * @brief Fill the AON ANA LDO configuration structure with default settings. 413 * 414 * The default values are: 415 * @code 416 * config->mode = kPMU_HighPowerMode; 417 config->enable2mALoad = true; 418 config->enable20uALoad = false; 419 config->enable4mALoad = true; 420 config->enableStandbyMode = false; 421 config->driverStrength = kPMU_AonAnaLdoDriverStrength0; 422 config->brownOutDetectorConfig = kPMU_AonAnaLdoBrownOutDetectorDisable; 423 config->chargePumpCurrent = kPMU_AonAnaChargePump300nA; 424 config->outputRange = kPMU_AonAnaLdoOutputFrom1P77To1P83; 425 * @endcode 426 * 427 * @param config Pointer to the structure @ref pmu_static_aon_ana_ldo_config_t. 428 */ 429 void PMU_StaticGetAonAnaLdoDefaultConfig(pmu_static_aon_ana_ldo_config_t *config); 430 431 /*! 432 * @brief Initialize the AON ANA LDO in Static/Sofware Mode. 433 * 434 * @param base ANADIG_LDO_BBSM peripheral base address. 435 * @param config Pointer to the structure @ref pmu_static_aon_ana_ldo_config_t. 436 */ 437 void PMU_StaticAonAnaLdoInit(ANADIG_LDO_BBSM_Type *base, const pmu_static_aon_ana_ldo_config_t *config); 438 439 /*! 440 * @brief Disable the output of AON ANA LDO. 441 * 442 * @param base ANADIG_LDO_BBSM peripheral base address. 443 */ 444 void PMU_StaticAonAnaLdoDeinit(ANADIG_LDO_BBSM_Type *base); 445 446 /*! 447 * @brief Gets the default configuration of AON DIG LDO. 448 * 449 * The default values are: 450 * @code 451 * config->enableStableDetect = false; 452 * config->voltageStepTime = kPMU_AonDigVoltageStepInc50us; 453 * config->brownOutConfig = kPMU_AonDigBrownOutDisable; 454 * config->targetVoltage = kPMU_AonDigTargetStableVoltage1P0V; 455 * config->mode = kPMU_HighPowerMode; 456 * @endcode 457 * @param config Pointer to the structure @ref pmu_static_aon_dig_config_t. 458 */ 459 void PMU_StaticGetAonDigLdoDefaultConfig(pmu_static_aon_dig_config_t *config); 460 461 /*! 462 * @brief Initialize the AON DIG LDO in static mode. 463 * 464 * @param base ANADIG_LDO_BBSM peripheral base address. 465 * @param config Pointer to the structure @ref pmu_static_aon_dig_config_t. 466 */ 467 void PMU_StaticAonDigLdoInit(ANADIG_LDO_BBSM_Type *base, const pmu_static_aon_dig_config_t *config); 468 469 /*! 470 * @brief Disable the AON DIG LDO. 471 * 472 * @param base ANADIG_LDO_BBSM peripheral base address. 473 */ 474 void PMU_StaticAonDigLdoDeinit(ANADIG_LDO_BBSM_Type *base); 475 476 /*! 477 * @brief Gets the default config of the BBSM DIG LDO. 478 * 479 * The default values are: 480 * @code 481 * config->mode = kPMU_LowPowerMode; 482 * config->chargePumpCurrent = kPMU_BbsmDigChargePump12P5nA; 483 * config->dischargeResistorValue = kPMU_BbsmDigDischargeResistor15K; 484 * config->trimValue = 0U; 485 * config->enablePullDown = true; 486 * config->enableLdoStable = false; 487 * @endcode 488 * 489 * @param config Pointer to @ref pmu_bbsm_dig_config_t. 490 */ 491 void PMU_GetBbsmDigLdoDefaultConfig(pmu_bbsm_dig_config_t *config); 492 493 /*! 494 * brief When STBY assert, enable/disable the selected LDO enter it's Low power mode. 495 * 496 * param name The name of the selected ldo. Please see the enumeration pmu_ldo_name_t for details. 497 * param enable Enable GPC standby mode or not. 498 */ 499 void PMU_EnableLdoStandbyMode(pmu_ldo_name_t name, bool enable); 500 501 /*! 502 * @} 503 */ 504 505 /*! 506 * @name Bandgap Control APIs 507 * @{ 508 */ 509 510 /*! 511 * @brief Disables Bandgap self bias for best noise performance. 512 * 513 * This function should be invoked after powering up. This function will wait for the bandgap stable and disable the 514 * bandgap self bias. After powering up, it need to wait for the bandgap to get stable and then disable Bandgap Self 515 * bias for best noise performance. 516 */ 517 void PMU_DisableBandgapSelfBiasAfterPowerUp(void); 518 519 /*! 520 * @brief Enables Bandgap self bias before power down. 521 * 522 * This function will enable Bandgap self bias feature before powering down or there 523 * will be risk of Bandgap not starting properly. 524 */ 525 void PMU_EnableBandgapSelfBiasBeforePowerDown(void); 526 527 /*! 528 * @brief Initialize Bandgap. 529 * 530 * @param config Pointer to the structure @ref pmu_static_bandgap_config_t. 531 */ 532 void PMU_StaticBandgapInit(const pmu_static_bandgap_config_t *config); 533 534 /*! 535 * @} 536 */ 537 538 /*! 539 * @name Body Bias Control APIs 540 * @{ 541 */ 542 543 /*! 544 * @brief Configures Well bias, such as power source, clock source and so on. 545 * 546 * @param base PMU peripheral base address. 547 * @param config Pointer to the @ref pmu_well_bias_config_t structure. 548 */ 549 void PMU_WellBiasInit(ANADIG_PMU_Type *base, const pmu_well_bias_config_t *config); 550 551 /*! 552 * @brief Gets the default configuration of well bias. 553 * 554 * @param config The pointer to the @ref pmu_well_bias_config_t structure. 555 */ 556 void PMU_GetWellBiasDefaultConfig(pmu_well_bias_config_t *config); 557 558 /*! 559 * brief Enables/disables FBB. 560 * 561 * param base PMU peripheral base address. 562 * param enable Used to turn on/off FBB. 563 */ 564 void PMU_EnableFBB(ANADIG_PMU_Type *base, bool enable); 565 566 /*! 567 * brief Controls the ON/OFF of FBB when GPC send standby request. 568 * 569 * param base PMU peripheral base address. 570 * param enable Enable GPC standby mode or not. 571 */ 572 void PMU_EnableFBBStandbyMode(ANADIG_PMU_Type *base, bool enable); 573 574 /*! 575 * @} 576 */ 577 578 #if defined(__cplusplus) 579 } 580 #endif 581 /*! 582 * @} 583 */ 584 585 #endif /* _FSL_PMU_H_ */ 586
