1 /*
2 ** ###################################################################
3 **     Processors:          MIMXRT1181CVP2B
4 **                          MIMXRT1181XVP2B
5 **
6 **     Compilers:           GNU C Compiler
7 **                          IAR ANSI C/C++ Compiler for ARM
8 **                          Keil ARM C/C++ Compiler
9 **                          MCUXpresso Compiler
10 **
11 **     Reference manual:    IMXRT1180RM, Rev 2, 12/2022
12 **     Version:             rev. 0.1, 2021-03-09
13 **     Build:               b231213
14 **
15 **     Abstract:
16 **         Provides a system configuration function and a global variable that
17 **         contains the system frequency. It configures the device and initializes
18 **         the oscillator (PLL) that is part of the microcontroller device.
19 **
20 **     Copyright 2016 Freescale Semiconductor, Inc.
21 **     Copyright 2016-2023 NXP
22 **     SPDX-License-Identifier: BSD-3-Clause
23 **
24 **     http:                 www.nxp.com
25 **     mail:                 support@nxp.com
26 **
27 **     Revisions:
28 **     - rev. 0.1 (2021-03-09)
29 **         Initial version.
30 **
31 ** ###################################################################
32 */
33 
34 /*!
35  * @file MIMXRT1181
36  * @version 1.0
37  * @date 2023-12-13
38  * @brief Device specific configuration file for MIMXRT1181 (implementation file)
39  *
40  * Provides a system configuration function and a global variable that contains
41  * the system frequency. It configures the device and initializes the oscillator
42  * (PLL) that is part of the microcontroller device.
43  */
44 
45 #include <stdint.h>
46 #include "fsl_device_registers.h"
47 
48 /* ----------------------------------------------------------------------------
49    -- Core clock
50    ---------------------------------------------------------------------------- */
51 
52 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
53 
54 /* ----------------------------------------------------------------------------
55    -- SystemInit()
56    ---------------------------------------------------------------------------- */
57 
SystemInit(void)58 void SystemInit(void)
59 {
60 #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
61     SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10, CP11 Full Access */
62 #endif                                                 /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
63 
64 #if defined(__MCUXPRESSO)
65     extern uint32_t g_pfnVectors[]; // Vector table defined in startup code
66     SCB->VTOR = (uint32_t)g_pfnVectors;
67 #endif
68 
69     /* Watchdog disable */
70 
71 #if (DISABLE_WDOG)
72     if ((RTWDOG1->CS & RTWDOG_CS_CMD32EN_MASK) != 0U)
73     {
74         RTWDOG1->CNT = 0xD928C520U; /* 0xD928C520U is the update key */
75     }
76     else
77     {
78         RTWDOG1->CNT = 0xC520U;
79         RTWDOG1->CNT = 0xD928U;
80     }
81     RTWDOG1->TOVAL = 0xFFFF;
82     RTWDOG1->CS    = (uint32_t)((RTWDOG1->CS) & ~RTWDOG_CS_EN_MASK) | RTWDOG_CS_UPDATE_MASK;
83 
84     if ((RTWDOG2->CS & RTWDOG_CS_CMD32EN_MASK) != 0U)
85     {
86         RTWDOG2->CNT = 0xD928C520U; /* 0xD928C520U is the update key */
87     }
88     else
89     {
90         RTWDOG2->CNT = 0xC520U;
91         RTWDOG2->CNT = 0xD928U;
92     }
93     RTWDOG2->TOVAL = 0xFFFF;
94     RTWDOG2->CS    = (uint32_t)((RTWDOG2->CS) & ~RTWDOG_CS_EN_MASK) | RTWDOG_CS_UPDATE_MASK;
95 
96     if ((RTWDOG3->CS & RTWDOG_CS_CMD32EN_MASK) != 0U)
97     {
98         RTWDOG3->CNT = 0xD928C520U; /* 0xD928C520U is the update key */
99     }
100     else
101     {
102         RTWDOG3->CNT = 0xC520U;
103         RTWDOG3->CNT = 0xD928U;
104     }
105     RTWDOG3->TOVAL = 0xFFFF;
106     RTWDOG3->CS    = (uint32_t)((RTWDOG3->CS) & ~RTWDOG_CS_EN_MASK) | RTWDOG_CS_UPDATE_MASK;
107 
108     if ((RTWDOG4->CS & RTWDOG_CS_CMD32EN_MASK) != 0U)
109     {
110         RTWDOG4->CNT = 0xD928C520U; /* 0xD928C520U is the update key */
111     }
112     else
113     {
114         RTWDOG4->CNT = 0xC520U;
115         RTWDOG4->CNT = 0xD928U;
116     }
117     RTWDOG4->TOVAL = 0xFFFF;
118     RTWDOG4->CS    = (uint32_t)((RTWDOG4->CS) & ~RTWDOG_CS_EN_MASK) | RTWDOG_CS_UPDATE_MASK;
119 
120     if ((RTWDOG5->CS & RTWDOG_CS_CMD32EN_MASK) != 0U)
121     {
122         RTWDOG5->CNT = 0xD928C520U; /* 0xD928C520U is the update key */
123     }
124     else
125     {
126         RTWDOG5->CNT = 0xC520U;
127         RTWDOG5->CNT = 0xD928U;
128     }
129     RTWDOG5->TOVAL = 0xFFFF;
130     RTWDOG5->CS    = (uint32_t)((RTWDOG5->CS) & ~RTWDOG_CS_EN_MASK) | RTWDOG_CS_UPDATE_MASK;
131 
132 #endif /* (DISABLE_WDOG) */
133 
134     /* Disable Systick which might be enabled by bootrom */
135     if ((SysTick->CTRL & SysTick_CTRL_ENABLE_Msk) != 0U)
136     {
137         SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
138     }
139 
140     if ((XCACHE_PC->CCR & XCACHE_CCR_ENCACHE_MASK) == 0U) /* set XCACHE if not configured */
141     {
142         /* set command to invalidate all ways and write GO bit to initiate command */
143         XCACHE_PC->CCR = XCACHE_CCR_INVW1_MASK | XCACHE_CCR_INVW0_MASK;
144         XCACHE_PC->CCR |= XCACHE_CCR_GO_MASK;
145         /* Wait until the command completes */
146         while ((XCACHE_PC->CCR & XCACHE_CCR_GO_MASK) != 0U)
147         {
148         }
149         /* Enable cache */
150         XCACHE_PC->CCR = XCACHE_CCR_ENCACHE_MASK;
151 
152         __ISB();
153         __DSB();
154     }
155 
156     /* Enable entry to thread mode when divide by zero */
157     SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk;
158     __DSB();
159     __ISB();
160 
161     SystemInitHook();
162 }
163 
164 /* ----------------------------------------------------------------------------
165    -- SystemCoreClockUpdate()
166    ---------------------------------------------------------------------------- */
167 
SystemCoreClockUpdate(void)168 void SystemCoreClockUpdate(void)
169 {
170     /* The functionaliy has been implemented in clock_config.c */
171 }
172 
173 /* ----------------------------------------------------------------------------
174    -- SystemInitHook()
175    ---------------------------------------------------------------------------- */
176 
SystemInitHook(void)177 __attribute__((weak)) void SystemInitHook(void)
178 {
179     /* Void implementation of the weak function. */
180 }
181