1 /* 2 * Copyright 2017-2021 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef _FSL_ROMAPI_H_ 9 #define _FSL_ROMAPI_H_ 10 11 #include "fsl_common.h" 12 13 /*! 14 * @addtogroup romapi 15 * @{ 16 */ 17 18 /*! @brief ROM API version 1.1.1. */ 19 #define FSL_ROM_ROMAPI_VERSION (MAKE_VERSION(1U, 1U, 1U)) 20 /*! @brief ROM FLEXSPI NOR driver version 1.7.0. */ 21 #define FSL_ROM_FLEXSPINOR_DRIVER_VERSION (MAKE_VERSION(1U, 7U, 0U)) 22 23 /*! 24 * @name Common ROMAPI features info defines 25 * @{ 26 */ 27 /*! @brief ROM has FLEXSPI NOR API. */ 28 #define FSL_ROM_HAS_FLEXSPINOR_API (1) 29 /*! @brief ROM has run bootloader API. */ 30 #define FSL_ROM_HAS_RUNBOOTLOADER_API (1) 31 /*! @brief ROM has FLEXSPI NOR get config API. */ 32 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG (1) 33 /*! @brief ROM has flash init API. */ 34 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_FLASH_INIT (1) 35 /*! @brief ROM has erase API. */ 36 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE (1) 37 /*! @brief ROM has erase sector API. */ 38 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR (1) 39 /*! @brief ROM has erase block API. */ 40 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK (1) 41 /*! @brief ROM has erase all API. */ 42 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL (1) 43 /*! @brief ROM has read API. */ 44 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ (1) 45 /*! @brief ROM has update lut API. */ 46 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT (1) 47 /*! @brief ROM has FLEXSPI command API. */ 48 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER (1) 49 50 /*@}*/ 51 52 #define kROM_StatusGroup_FLEXSPINOR 201U /*!< ROM FLEXSPI NOR status group number.*/ 53 54 #define FSL_ROM_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \ 55 (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \ 56 FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) 57 58 /*! @brief Generate bit mask */ 59 #define FSL_ROM_FLEXSPI_BITMASK(bit_offset) (1U << (bit_offset)) 60 61 /*! @brief FLEXSPI memory config block related definitions */ 62 #define FLEXSPI_CFG_BLK_TAG (0x42464346UL) /*!< ascii "FCFB" Big Endian */ 63 #define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) /*!< V1.4.0 */ 64 65 #define CMD_SDR 0x01U 66 #define CMD_DDR 0x21U 67 #define RADDR_SDR 0x02U 68 #define RADDR_DDR 0x22U 69 #define CADDR_SDR 0x03U 70 #define CADDR_DDR 0x23U 71 #define MODE1_SDR 0x04U 72 #define MODE1_DDR 0x24U 73 #define MODE2_SDR 0x05U 74 #define MODE2_DDR 0x25U 75 #define MODE4_SDR 0x06U 76 #define MODE4_DDR 0x26U 77 #define MODE8_SDR 0x07U 78 #define MODE8_DDR 0x27U 79 #define WRITE_SDR 0x08U 80 #define WRITE_DDR 0x28U 81 #define READ_SDR 0x09U 82 #define READ_DDR 0x29U 83 #define LEARN_SDR 0x0AU 84 #define LEARN_DDR 0x2AU 85 #define DATSZ_SDR 0x0BU 86 #define DATSZ_DDR 0x2BU 87 #define DUMMY_SDR 0x0CU 88 #define DUMMY_DDR 0x2CU 89 #define DUMMY_RWDS_SDR 0x0DU 90 #define DUMMY_RWDS_DDR 0x2DU 91 #define JMP_ON_CS 0x1FU 92 #define STOP 0U 93 94 #define FLEXSPI_1PAD 0U 95 #define FLEXSPI_2PAD 1U 96 #define FLEXSPI_4PAD 2U 97 #define FLEXSPI_8PAD 3U 98 99 /*! 100 * NOR LUT sequence index used for default LUT assignment. 101 * 102 * @note It will take effect if the lut sequences are not customized. 103 */ 104 #define NOR_CMD_LUT_SEQ_IDX_READ 0U /*!< READ LUT sequence id in lookupTable stored in config block */ 105 #define NOR_CMD_LUT_SEQ_IDX_READSTATUS 1U /*!< Read Status LUT sequence id in lookupTable stored in config block */ 106 #define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \ 107 2U /*!< Read status DPI/QPI/OPI sequence id in lookupTable stored in config block */ 108 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 3U /*!< Write Enable sequence id in lookupTable stored in config block */ 109 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \ 110 4U /*!< Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block */ 111 #define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5U /*!< Erase Sector sequence id in lookupTable stored in config block */ 112 #define NOR_CMD_LUT_SEQ_IDX_READID 7U 113 #define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8U /*!< Erase Block sequence id in lookupTable stored in config block */ 114 #define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM 9U /*!< Program sequence id in lookupTable stored in config block */ 115 #define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11U /*!< Chip Erase sequence in lookupTable id stored in config block */ 116 #define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13U /*!< Read SFDP sequence in lookupTable id stored in config block */ 117 #define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \ 118 14U /*!< Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */ 119 #define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \ 120 15U /*!< Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */ 121 122 /*! 123 * @name Configuration Option 124 * @{ 125 */ 126 /*! @brief Serial NOR Configuration Option. */ 127 typedef struct _serial_nor_config_option 128 { 129 union 130 { 131 struct 132 { 133 uint32_t max_freq : 4; /*!< Maximum supported Frequency */ 134 uint32_t misc_mode : 4; /*!< miscellaneous mode */ 135 uint32_t quad_mode_setting : 4; /*!< Quad mode setting */ 136 uint32_t cmd_pads : 4; /*!< Command pads */ 137 uint32_t query_pads : 4; /*!< SFDP read pads */ 138 uint32_t device_type : 4; /*!< Device type */ 139 uint32_t option_size : 4; /*!< Option size, in terms of uint32_t, size = (option_size + 1) * 4 */ 140 uint32_t tag : 4; /*!< Tag, must be 0x0E */ 141 } B; 142 uint32_t U; 143 } option0; 144 145 union 146 { 147 struct 148 { 149 uint32_t dummy_cycles : 8; /*!< Dummy cycles before read */ 150 uint32_t status_override : 8; /*!< Override status register value during device mode configuration */ 151 uint32_t pinmux_group : 4; /*!< The pinmux group selection */ 152 uint32_t dqs_pinmux_group : 4; /*!< The DQS Pinmux Group Selection */ 153 uint32_t drive_strength : 4; /*!< The Drive Strength of FlexSPI Pads */ 154 uint32_t flash_connection : 4; /*!< Flash connection option: 0 - Single Flash connected to port A, 1 - 155 Parallel mode, 2 - Single Flash connected to Port B */ 156 } B; 157 uint32_t U; 158 } option1; 159 160 } serial_nor_config_option_t; 161 162 /*@}*/ 163 164 /*! 165 * @name Support for init FLEXSPI NOR configuration 166 * @{ 167 */ 168 /*! @brief Flash Pad Definitions */ 169 enum 170 { 171 kSerialFlash_1Pad = 1U, /*!< 1-wire communication */ 172 kSerialFlash_2Pads = 2U, /*!< 2-wire communication */ 173 kSerialFlash_4Pads = 4U, /*!< 4-wire communication */ 174 kSerialFlash_8Pads = 8U, /*!< 8-wire communication */ 175 }; 176 177 /*! @brief FLEXSPI clock configuration type */ 178 enum 179 { 180 kFLEXSPIClk_SDR, /*!< Clock configure for SDR mode */ 181 kFLEXSPIClk_DDR, /*!< Clock configure for DDR mode */ 182 }; 183 184 /*! @brief FLEXSPI Read Sample Clock Source definition */ 185 enum _flexspi_read_sample_clk 186 { 187 kFLEXSPIReadSampleClk_LoopbackInternally = 0U, /*!< FLEXSPI Read Sample Clock Source from the Internal loopback */ 188 kFLEXSPIReadSampleClk_LoopbackFromDqsPad = 1U, /*!< FLEXSPI Read Sample Clock Source from the Dqs Pad loopback */ 189 kFLEXSPIReadSampleClk_LoopbackFromSckPad = 2U, /*!< FLEXSPI Read Sample Clock Source from the Sck Pad loopback */ 190 kFLEXSPIReadSampleClk_ExternalInputFromDqsPad = 3U, /*!< FLEXSPI Read Sample Clock Source from the External Input 191 by the Dqs Pad */ 192 }; 193 194 /*! @brief Flash Type Definition */ 195 enum 196 { 197 kFLEXSPIDeviceType_SerialNOR = 1U, /*!< Flash device is Serial NOR */ 198 }; 199 200 /*! @brief Flash Configuration Command Type */ 201 enum 202 { 203 kDeviceConfigCmdType_Generic, /*!< Generic command, for example: configure dummy cycles, drive strength, etc. */ 204 kDeviceConfigCmdType_QuadEnable, /*!< Quad Enable command */ 205 kDeviceConfigCmdType_Spi2Xpi, /*!< Switch from SPI to DPI/QPI/OPI mode */ 206 kDeviceConfigCmdType_Xpi2Spi, /*!< Switch from DPI/QPI/OPI to SPI mode */ 207 kDeviceConfigCmdType_Spi2NoCmd, /*!< Switch to 0-4-4/0-8-8 mode */ 208 kDeviceConfigCmdType_Reset, /*!< Reset device command */ 209 }; 210 211 /*! @brief Definitions for FLEXSPI Serial Clock Frequency */ 212 enum _flexspi_serial_clk_freq 213 { 214 kFLEXSPISerialClk_NoChange = 0U, /*!< FlexSPI serial clock no changed */ 215 kFLEXSPISerialClk_30MHz = 1U, /*!< FlexSPI serial clock 30MHz */ 216 kFLEXSPISerialClk_50MHz = 2U, /*!< FlexSPI serial clock 50MHz */ 217 kFLEXSPISerialClk_60MHz = 3U, /*!< FlexSPI serial clock 60MHz */ 218 kFLEXSPISerialClk_75MHz = 4U, /*!< FlexSPI serial clock 75MHz */ 219 kFLEXSPISerialClk_80MHz = 5U, /*!< FlexSPI serial clock 80MHz */ 220 kFLEXSPISerialClk_100MHz = 6U, /*!< FlexSPI serial clock 100MHz */ 221 kFLEXSPISerialClk_133MHz = 7U, /*!< FlexSPI serial clock 133MHz */ 222 kFLEXSPISerialClk_166MHz = 8U, /*!< FlexSPI serial clock 166MHz */ 223 }; 224 225 /*! @brief Misc feature bit definitions */ 226 enum 227 { 228 kFLEXSPIMiscOffset_DiffClkEnable = 0U, /*!< Bit for Differential clock enable */ 229 kFLEXSPIMiscOffset_Ck2Enable = 1U, /*!< Bit for CK2 enable */ 230 kFLEXSPIMiscOffset_ParallelEnable = 2U, /*!< Bit for Parallel mode enable */ 231 kFLEXSPIMiscOffset_WordAddressableEnable = 3U, /*!< Bit for Word Addressable enable */ 232 kFLEXSPIMiscOffset_SafeConfigFreqEnable = 4U, /*!< Bit for Safe Configuration Frequency enable */ 233 kFLEXSPIMiscOffset_PadSettingOverrideEnable = 5U, /*!< Bit for Pad setting override enable */ 234 kFLEXSPIMiscOffset_DdrModeEnable = 6U, /*!< Bit for DDR clock configuration indication. */ 235 kFLEXSPIMiscOffset_UseValidTimeForAllFreq = 7U, /*!< Bit for DLLCR settings under all modes */ 236 }; 237 238 /*@}*/ 239 240 /*! @brief Manufacturer ID */ 241 enum 242 { 243 kSerialFlash_ISSI_ManufacturerID = 0x9DU, /*!< Manufacturer ID of the ISSI serial flash */ 244 kSerialFlash_Adesto_ManufacturerID = 0x1F, /*!< Manufacturer ID of the Adesto Technologies serial flash*/ 245 kSerialFlash_Winbond_ManufacturerID = 0xEFU, /*!< Manufacturer ID of the Winbond serial flash */ 246 kSerialFlash_Cypress_ManufacturerID = 0x01U, /*!< Manufacturer ID for Cypress */ 247 }; 248 249 /*! @brief ROM FLEXSPI NOR flash status */ 250 enum _flexspi_nor_status 251 { 252 kStatus_ROM_FLEXSPI_SequenceExecutionTimeout = 253 MAKE_STATUS(kStatusGroup_FLEXSPI, 0), /*!< Status for Sequence Execution timeout */ 254 kStatus_ROM_FLEXSPI_InvalidSequence = MAKE_STATUS(kStatusGroup_FLEXSPI, 1), /*!< Status for Invalid Sequence */ 255 kStatus_ROM_FLEXSPI_DeviceTimeout = MAKE_STATUS(kStatusGroup_FLEXSPI, 2), /*!< Status for Device timeout */ 256 kStatus_ROM_FLEXSPINOR_SFDP_NotFound = 257 MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 7), /*!< Status for SFDP read failure */ 258 kStatus_ROM_FLEXSPINOR_Flash_NotFound = 259 MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 9), /*!< Status for Flash detection failure */ 260 kStatus_FLEXSPINOR_DTRRead_DummyProbeFailed = 261 MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 10), /*!< Status for DDR Read dummy probe failure */ 262 }; 263 264 /*! 265 * @name FLEXSPI NOR Configuration 266 * @{ 267 */ 268 269 /*! @brief FLEXSPI LUT Sequence structure */ 270 typedef struct _flexspi_lut_seq 271 { 272 uint8_t seqNum; /*!< Sequence Number, valid number: 1-16 */ 273 uint8_t seqId; /*!< Sequence Index, valid number: 0-15 */ 274 uint16_t reserved; 275 } flexspi_lut_seq_t; 276 277 /*! @brief FLEXSPI DLL time */ 278 typedef struct 279 { 280 uint8_t time_100ps; /*!< Data valid time, in terms of 100ps */ 281 uint8_t delay_cells; /*!< Data valid time, in terms of delay cells */ 282 } flexspi_dll_time_t; 283 284 /*! @brief FLEXSPI Memory Configuration Block */ 285 typedef struct _flexspi_mem_config 286 { 287 uint32_t tag; /*!< [0x000-0x003] Tag, fixed value 0x42464346UL */ 288 uint32_t version; /*!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix */ 289 uint32_t reserved0; /*!< [0x008-0x00b] Reserved for future use */ 290 uint8_t readSampleClkSrc; /*!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 */ 291 uint8_t csHoldTime; /*!< [0x00d-0x00d] Data hold time, default value: 3 */ 292 uint8_t csSetupTime; /*!< [0x00e-0x00e] Date setup time, default value: 3 */ 293 uint8_t columnAddressWidth; /*!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For 294 Serial NAND, need to refer to datasheet */ 295 uint8_t deviceModeCfgEnable; /*!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable */ 296 uint8_t deviceModeType; /*!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch, 297 Generic configuration, etc. */ 298 uint16_t waitTimeCfgCommands; /*!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for 299 DPI/QPI/OPI switch or reset command */ 300 flexspi_lut_seq_t deviceModeSeq; /*!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt 301 sequence number, [31:16] Reserved */ 302 uint32_t deviceModeArg; /*!< [0x018-0x01b] Argument/Parameter for device configuration */ 303 uint8_t configCmdEnable; /*!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable */ 304 uint8_t configModeType[3]; /*!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe */ 305 flexspi_lut_seq_t 306 configCmdSeqs[3]; /*!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq */ 307 uint32_t reserved1; /*!< [0x02c-0x02f] Reserved for future use */ 308 uint32_t configCmdArgs[3]; /*!< [0x030-0x03b] Arguments/Parameters for device Configuration commands */ 309 uint32_t reserved2; /*!< [0x03c-0x03f] Reserved for future use */ 310 uint32_t controllerMiscOption; /*!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more 311 details */ 312 uint8_t deviceType; /*!< [0x044-0x044] Device Type: See Flash Type Definition for more details */ 313 uint8_t sflashPadType; /*!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal */ 314 uint8_t serialClkFreq; /*!< [0x046-0x046] Serial Flash Frequency, device specific definitions. See System Boot 315 Chapter for more details */ 316 uint8_t 317 lutCustomSeqEnable; /*!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot 318 be done using 1 LUT sequence, currently, only applicable to HyperFLASH */ 319 uint32_t reserved3[2]; /*!< [0x048-0x04f] Reserved for future use */ 320 uint32_t sflashA1Size; /*!< [0x050-0x053] Size of Flash connected to A1 */ 321 uint32_t sflashA2Size; /*!< [0x054-0x057] Size of Flash connected to A2 */ 322 uint32_t sflashB1Size; /*!< [0x058-0x05b] Size of Flash connected to B1 */ 323 uint32_t sflashB2Size; /*!< [0x05c-0x05f] Size of Flash connected to B2 */ 324 uint32_t csPadSettingOverride; /*!< [0x060-0x063] CS pad setting override value */ 325 uint32_t sclkPadSettingOverride; /*!< [0x064-0x067] SCK pad setting override value */ 326 uint32_t dataPadSettingOverride; /*!< [0x068-0x06b] data pad setting override value */ 327 uint32_t dqsPadSettingOverride; /*!< [0x06c-0x06f] DQS pad setting override value */ 328 uint32_t timeoutInMs; /*!< [0x070-0x073] Timeout threshold for read status command */ 329 uint32_t commandInterval; /*!< [0x074-0x077] CS deselect interval between two commands */ 330 flexspi_dll_time_t dataValidTime[2]; /*!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B */ 331 uint16_t busyOffset; /*!< [0x07c-0x07d] Busy offset, valid value: 0-31 */ 332 uint16_t busyBitPolarity; /*!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 - 333 busy flag is 0 when flash device is busy */ 334 uint32_t lookupTable[64]; /*!< [0x080-0x17f] Lookup table holds Flash command sequences */ 335 flexspi_lut_seq_t lutCustomSeq[12]; /*!< [0x180-0x1af] Customizable LUT Sequences */ 336 uint32_t reserved4[4]; /*!< [0x1b0-0x1bf] Reserved for future use */ 337 } flexspi_mem_config_t; 338 339 /*! @brief Serial NOR configuration block */ 340 typedef struct _flexspi_nor_config 341 { 342 flexspi_mem_config_t memConfig; /*!< Common memory configuration info via FLEXSPI */ 343 uint32_t pageSize; /*!< Page size of Serial NOR */ 344 uint32_t sectorSize; /*!< Sector size of Serial NOR */ 345 uint8_t ipcmdSerialClkFreq; /*!< Clock frequency for IP command */ 346 uint8_t isUniformBlockSize; /*!< Sector/Block size is the same */ 347 uint8_t isDataOrderSwapped; /*!< Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2) */ 348 uint8_t reserved0[1]; /*!< Reserved for future use */ 349 uint8_t serialNorType; /*!< Serial NOR Flash type: 0/1/2/3 */ 350 uint8_t needExitNoCmdMode; /*!< Need to exit NoCmd mode before other IP command */ 351 uint8_t halfClkForNonReadCmd; /*!< Half the Serial Clock for non-read command: true/false */ 352 uint8_t needRestoreNoCmdMode; /*!< Need to Restore NoCmd mode after IP command execution */ 353 uint32_t blockSize; /*!< Block size */ 354 uint32_t reserve2[11]; /*!< Reserved for future use */ 355 } flexspi_nor_config_t; 356 357 /*@}*/ 358 359 /*! @brief FLEXSPI Operation Context */ 360 typedef enum _flexspi_operation 361 { 362 kFLEXSPIOperation_Command, /*!< FLEXSPI operation: Only command, both TX and RX buffer are ignored. */ 363 kFLEXSPIOperation_Config, /*!< FLEXSPI operation: Configure device mode, the TX FIFO size is fixed in LUT. */ 364 kFLEXSPIOperation_Write, /*!< FLEXSPI operation: Write, only TX buffer is effective */ 365 kFLEXSPIOperation_Read, /*!< FLEXSPI operation: Read, only Rx Buffer is effective. */ 366 } flexspi_operation_t; 367 368 #define kFLEXSPIOperation_End kFLEXSPIOperation_Read 369 370 /*! @brief FLEXSPI Transfer Context */ 371 typedef struct _flexspi_xfer 372 { 373 flexspi_operation_t operation; /*!< FLEXSPI operation */ 374 uint32_t baseAddress; /*!< FLEXSPI operation base address */ 375 uint32_t seqId; /*!< Sequence Id */ 376 uint32_t seqNum; /*!< Sequence Number */ 377 bool isParallelModeEnable; /*!< Is a parallel transfer */ 378 uint32_t *txBuffer; /*!< Tx buffer */ 379 uint32_t txSize; /*!< Tx size in bytes */ 380 uint32_t *rxBuffer; /*!< Rx buffer */ 381 uint32_t rxSize; /*!< Rx size in bytes */ 382 } flexspi_xfer_t; 383 384 /*! @brief convert the type for MISRA */ 385 #define MISRA_CAST(to_type, to_var, from_type, from_var) \ 386 do \ 387 { \ 388 union \ 389 { \ 390 to_type to_var_tmp; \ 391 from_type from_var_tmp; \ 392 } type_converter_var = {.from_var_tmp = (from_var)}; \ 393 (to_var) = type_converter_var.to_var_tmp; \ 394 } while (false) 395 396 #ifdef __cplusplus 397 extern "C" { 398 #endif 399 400 #if defined(FSL_FEATURE_BOOT_ROM_HAS_ROMAPI) && FSL_FEATURE_BOOT_ROM_HAS_ROMAPI 401 402 /*! 403 * @name Enter Bootloader 404 * @{ 405 */ 406 407 #if defined(FSL_ROM_HAS_RUNBOOTLOADER_API) && FSL_ROM_HAS_RUNBOOTLOADER_API 408 /*! 409 * @brief Enter Bootloader. 410 * 411 * @param arg A pointer to the storage for the bootloader param. 412 * refer to System Boot Chapter in device reference manual for details. 413 */ 414 void ROM_RunBootloader(void *arg); 415 #endif /* FSL_ROM_HAS_RUNBOOTLOADER_API */ 416 417 /*@}*/ 418 419 /*! 420 * @name GetConfig 421 * @{ 422 */ 423 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG 424 /*! 425 * @brief Get FLEXSPI NOR Configuration Block based on specified option. 426 * 427 * @param instance storage the instance of FLEXSPI. 428 * @param config A pointer to the storage for the driver runtime state. 429 * @param option A pointer to the storage Serial NOR Configuration Option Context. 430 * 431 * @retval kStatus_Success Api was executed successfully. 432 * @retval kStatus_InvalidArgument A invalid argument is provided. 433 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 434 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 435 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 436 */ 437 status_t ROM_FLEXSPI_NorFlash_GetConfig(uint32_t instance, 438 flexspi_nor_config_t *config, 439 serial_nor_config_option_t *option); 440 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG */ 441 442 /*! 443 * @name Initialization 444 * @{ 445 */ 446 447 /*! 448 * @brief Initialize Serial NOR devices via FLEXSPI 449 * 450 * This function checks and initializes the FLEXSPI module for the other FLEXSPI APIs. 451 * 452 * @param instance storage the instance of FLEXSPI. 453 * @param config A pointer to the storage for the driver runtime state. 454 * 455 * @retval kStatus_Success Api was executed successfully. 456 * @retval kStatus_InvalidArgument A invalid argument is provided. 457 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 458 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 459 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 460 */ 461 status_t ROM_FLEXSPI_NorFlash_Init(uint32_t instance, flexspi_nor_config_t *config); 462 463 /*@}*/ 464 465 /*! 466 * @name Programming 467 * @{ 468 */ 469 470 /*! 471 * @brief Program data to Serial NOR via FLEXSPI. 472 * 473 * This function programs the NOR flash memory with the dest address for a given 474 * flash area as determined by the dst address and the length. 475 * 476 * @param instance storage the instance of FLEXSPI. 477 * @param config A pointer to the storage for the driver runtime state. 478 * @param dst_addr A pointer to the desired flash memory to be programmed. 479 * @note It is recommended that use page aligned access; 480 * If the dst_addr is not aligned to page, the driver automatically 481 * aligns address down with the page address. 482 * @param src A pointer to the source buffer of data that is to be programmed 483 * into the NOR flash. 484 * 485 * @retval kStatus_Success Api was executed successfully. 486 * @retval kStatus_InvalidArgument A invalid argument is provided. 487 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 488 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 489 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 490 */ 491 status_t ROM_FLEXSPI_NorFlash_ProgramPage(uint32_t instance, 492 flexspi_nor_config_t *config, 493 uint32_t dst_addr, 494 const uint32_t *src); 495 496 /*@}*/ 497 498 /*! 499 * @name Reading 500 * @{ 501 */ 502 503 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ 504 /*! 505 * @brief Read data from Serial NOR via FLEXSPI. 506 * 507 * This function read the NOR flash memory with the start address for a given 508 * flash area as determined by the dst address and the length. 509 * 510 * @param instance storage the instance of FLEXSPI. 511 * @param config A pointer to the storage for the driver runtime state. 512 * @param dst A pointer to the dest buffer of data that is to be read from the NOR flash. 513 * @note It is recommended that use page aligned access; 514 * If the dstAddr is not aligned to page, the driver automatically 515 * aligns address down with the page address. 516 * @param start The start address of the desired NOR flash memory to be read. 517 * @param lengthInBytes The length, given in bytes to be read. 518 * 519 * @retval kStatus_Success Api was executed successfully. 520 * @retval kStatus_InvalidArgument A invalid argument is provided. 521 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 522 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 523 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 524 */ 525 status_t ROM_FLEXSPI_NorFlash_Read( 526 uint32_t instance, flexspi_nor_config_t *config, uint32_t *dst, uint32_t start, uint32_t lengthInBytes); 527 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ */ 528 529 /*@}*/ 530 531 /*! 532 * @name Erasing 533 * @{ 534 */ 535 536 /*! 537 * @brief Erase Flash Region specified by address and length 538 * 539 * This function erases the appropriate number of flash sectors based on the 540 * desired start address and length. 541 * 542 * @param instance storage the index of FLEXSPI. 543 * @param config A pointer to the storage for the driver runtime state. 544 * @param start The start address of the desired NOR flash memory to be erased. 545 * @note It is recommended that use sector-aligned access nor device; 546 * If dstAddr is not aligned with the sector,the driver automatically 547 * aligns address down with the sector address. 548 * @param length The length, given in bytes to be erased. 549 * @note It is recommended that use sector-aligned access nor device; 550 * If length is not aligned with the sector,the driver automatically 551 * aligns up with the sector. 552 * @retval kStatus_Success Api was executed successfully. 553 * @retval kStatus_InvalidArgument A invalid argument is provided. 554 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 555 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 556 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 557 */ 558 status_t ROM_FLEXSPI_NorFlash_Erase(uint32_t instance, flexspi_nor_config_t *config, uint32_t start, uint32_t length); 559 560 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR 561 /*! 562 * @brief Erase one sector specified by address 563 * 564 * This function erases one of NOR flash sectors based on the desired address. 565 * 566 * @param instance storage the index of FLEXSPI. 567 * @param config A pointer to the storage for the driver runtime state. 568 * @param start The start address of the desired NOR flash memory to be erased. 569 * @note It is recommended that use sector-aligned access nor device; 570 * If dstAddr is not aligned with the sector, the driver automatically 571 * aligns address down with the sector address. 572 * 573 * @retval kStatus_Success Api was executed successfully. 574 * @retval kStatus_InvalidArgument A invalid argument is provided. 575 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 576 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 577 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 578 */ 579 status_t ROM_FLEXSPI_NorFlash_EraseSector(uint32_t instance, flexspi_nor_config_t *config, uint32_t start); 580 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR */ 581 582 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK 583 /*! 584 * @brief Erase one block specified by address 585 * 586 * This function erases one block of NOR flash based on the desired address. 587 * 588 * @param instance storage the index of FLEXSPI. 589 * @param config A pointer to the storage for the driver runtime state. 590 * @param start The start address of the desired NOR flash memory to be erased. 591 * @note It is recommended that use block-aligned access nor device; 592 * If dstAddr is not aligned with the block, the driver automatically 593 * aligns address down with the block address. 594 * 595 * @retval kStatus_Success Api was executed successfully. 596 * @retval kStatus_InvalidArgument A invalid argument is provided. 597 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 598 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 599 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 600 */ 601 status_t ROM_FLEXSPI_NorFlash_EraseBlock(uint32_t instance, flexspi_nor_config_t *config, uint32_t start); 602 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK */ 603 604 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL 605 /*! 606 * @brief Erase all the Serial NOR devices connected on FLEXSPI. 607 * 608 * @param instance storage the instance of FLEXSPI. 609 * @param config A pointer to the storage for the driver runtime state. 610 * 611 * @retval kStatus_Success Api was executed successfully. 612 * @retval kStatus_InvalidArgument A invalid argument is provided. 613 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 614 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 615 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 616 */ 617 status_t ROM_FLEXSPI_NorFlash_EraseAll(uint32_t instance, flexspi_nor_config_t *config); 618 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL */ 619 620 /*@}*/ 621 622 /*! 623 * @name Command 624 * @{ 625 */ 626 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER 627 /*! 628 * @brief FLEXSPI command 629 * 630 * This function is used to perform the command write sequence to the NOR device. 631 * 632 * @param instance storage the index of FLEXSPI. 633 * @param xfer A pointer to the storage FLEXSPI Transfer Context. 634 * 635 * @retval kStatus_Success Api was executed successfully. 636 * @retval kStatus_InvalidArgument A invalid argument is provided. 637 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 638 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 639 */ 640 status_t ROM_FLEXSPI_NorFlash_CommandXfer(uint32_t instance, flexspi_xfer_t *xfer); 641 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER */ 642 /*@}*/ 643 644 /*! 645 * @name UpdateLut 646 * @{ 647 */ 648 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT 649 /*! 650 * @brief Configure FLEXSPI Lookup table 651 * 652 * @param instance storage the index of FLEXSPI. 653 * @param seqIndex storage the sequence Id. 654 * @param lutBase A pointer to the look-up-table for command sequences. 655 * @param seqNumber storage sequence number. 656 * 657 * @retval kStatus_Success Api was executed successfully. 658 * @retval kStatus_InvalidArgument A invalid argument is provided. 659 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 660 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 661 */ 662 status_t ROM_FLEXSPI_NorFlash_UpdateLut(uint32_t instance, 663 uint32_t seqIndex, 664 const uint32_t *lutBase, 665 uint32_t seqNumber); 666 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT */ 667 668 /*@}*/ 669 670 /*! 671 * @name Device status 672 * @{ 673 */ 674 /*! 675 * @brief Wait until device is idle. 676 * 677 * @param instance Indicates the index of FLEXSPI. 678 * @param config A pointer to the storage for the driver runtime state 679 * @param isParallelMode Indicates whether NOR flash is in parallel mode. 680 * @param address Indicates the operation(erase/program/read) address for serial NOR flash. 681 * 682 * @retval kStatus_Success Api was executed successfully. 683 * @retval kStatus_InvalidArgument A invalid argument is provided. 684 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 685 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 686 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout Device timeout. 687 */ 688 status_t ROM_FLEXSPI_NorFlash_WaitBusy(uint32_t instance, 689 flexspi_nor_config_t *config, 690 bool isParallelMode, 691 uint32_t address); 692 /*@}*/ 693 694 /*! 695 * @name ClearCache 696 * @{ 697 */ 698 699 /*! 700 * @name ClearCache 701 * @{ 702 */ 703 704 /*! 705 * @brief Software reset for the FLEXSPI logic. 706 * 707 * This function sets the software reset flags for both AHB and buffer domain and 708 * resets both AHB buffer and also IP FIFOs. 709 * 710 * @param instance storage the index of FLEXSPI. 711 */ 712 void ROM_FLEXSPI_NorFlash_ClearCache(uint32_t instance); 713 714 /*@}*/ 715 716 #endif /* FSL_FEATURE_BOOT_ROM_HAS_ROMAPI */ 717 718 #ifdef __cplusplus 719 } 720 #endif 721 722 /*! @}*/ 723 724 #endif /* _FSL_ROMAPI_H_ */ 725
