1 /*
2  * Copyright 2019-2021 NXP
3  * All rights reserved.
4  *
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #include "fsl_flexram_allocate.h"
10 
11 /*******************************************************************************
12  * Definitions
13  ******************************************************************************/
14 
15 /* Component ID definition, used by tools. */
16 #ifndef FSL_COMPONENT_ID
17 #define FSL_COMPONENT_ID "platform.drivers.soc_flexram_allocate"
18 #endif
19 
20 /*******************************************************************************
21  * Prototypes
22  ******************************************************************************/
23 
24 /*******************************************************************************
25  * Variables
26  ******************************************************************************/
27 
28 /*******************************************************************************
29  * Code
30  ******************************************************************************/
31 /*!
32  * brief FLEXRAM allocate on-chip ram for OCRAM,ITCM,DTCM
33  * This function is independent of FLEXRAM_Init, it can be called directly if ram re-allocate
34  * is needed.
35  * param config allocate configuration.
36  * retval kStatus_InvalidArgument the argument is invalid
37  * 		   kStatus_Success allocate success
38  */
FLEXRAM_AllocateRam(flexram_allocate_ram_t * config)39 status_t FLEXRAM_AllocateRam(flexram_allocate_ram_t *config)
40 {
41     assert(config != NULL);
42 
43     uint8_t dtcmBankNum  = config->dtcmBankNum;
44     uint8_t itcmBankNum  = config->itcmBankNum;
45     uint8_t ocramBankNum = config->ocramBankNum;
46     uint8_t i            = 0U;
47     uint32_t bankCfg     = 0U;
48     status_t status      = kStatus_Success;
49     uint32_t tempGPR17   = 0U;
50     uint32_t tempGPR18   = 0U;
51 
52     /* check the arguments */
53     if ((uint8_t)FSL_FEATURE_FLEXRAM_INTERNAL_RAM_TOTAL_BANK_NUMBERS < (dtcmBankNum + itcmBankNum + ocramBankNum))
54     {
55         status = kStatus_InvalidArgument;
56     }
57     else
58     {
59         /* flexram bank config value */
60         for (i = 0U; i < (uint8_t)FSL_FEATURE_FLEXRAM_INTERNAL_RAM_TOTAL_BANK_NUMBERS; i++)
61         {
62             if (i < ocramBankNum)
63             {
64                 bankCfg |= ((uint32_t)kFLEXRAM_BankOCRAM) << (i * 2U);
65                 continue;
66             }
67 
68             if (i < (dtcmBankNum + ocramBankNum))
69             {
70                 bankCfg |= ((uint32_t)kFLEXRAM_BankDTCM) << (i * 2U);
71                 continue;
72             }
73 
74             if (i < (dtcmBankNum + ocramBankNum + itcmBankNum))
75             {
76                 bankCfg |= ((uint32_t)kFLEXRAM_BankITCM) << (i * 2U);
77                 continue;
78             }
79         }
80 
81         tempGPR17 = IOMUXC_GPR->GPR17;
82         tempGPR18 = IOMUXC_GPR->GPR18;
83 
84         IOMUXC_GPR->GPR17 = (tempGPR17 & ~IOMUXC_GPR_GPR17_FLEXRAM_BANK_CFG_LOW_MASK) | (bankCfg & 0xFFFFU);
85         IOMUXC_GPR->GPR18 = (tempGPR18 & ~IOMUXC_GPR_GPR18_FLEXRAM_BANK_CFG_HIGH_MASK) | ((bankCfg >> 16) & 0xFFFFU);
86 
87         /* select ram allocate source from FLEXRAM_BANK_CFG */
88         FLEXRAM_SetAllocateRamSrc(kFLEXRAM_BankAllocateThroughBankCfg);
89     }
90 
91     return status;
92 }
93