1/*
2** ###################################################################
3**     Processors:          MIMXRT1165CVM5A_cm7
4**                          MIMXRT1165DVM6A_cm7
5**                          MIMXRT1165XVM5A_cm7
6**
7**     Compiler:            GNU C Compiler
8**     Reference manual:    IMXRT1160RM, Rev 0, 03/2021
9**     Version:             rev. 0.2, 2023-02-27
10**     Build:               b230302
11**
12**     Abstract:
13**         Linker file for the GNU C Compiler
14**
15**     Copyright 2016 Freescale Semiconductor, Inc.
16**     Copyright 2016-2023 NXP
17**     All rights reserved.
18**
19**     SPDX-License-Identifier: BSD-3-Clause
20**
21**     http:                 www.nxp.com
22**     mail:                 support@nxp.com
23**
24** ###################################################################
25*/
26
27/* Entry Point */
28ENTRY(Reset_Handler)
29
30HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
31STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
32RPMSG_SHMEM_SIZE = DEFINED(__use_shmem__) ? 0x2000 : 0;
33VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x00000400 : 0;
34TEXT_SIZE = 0x00FBDC00;
35CORE1IMAGE_START = 0x30FC0000;
36
37/* Specify the memory areas */
38MEMORY
39{
40  m_flash_config        (RX)  : ORIGIN = 0x30000400, LENGTH = 0x00000C00
41  m_ivt                 (RX)  : ORIGIN = 0x30001000, LENGTH = 0x00001000
42  m_interrupts          (RX)  : ORIGIN = 0x30002000, LENGTH = 0x00000400
43  m_text                (RX)  : ORIGIN = 0x30002400, LENGTH = TEXT_SIZE
44  m_qacode              (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
45  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00040000
46  m_data2               (RW)  : ORIGIN = 0x202C0000 + RPMSG_SHMEM_SIZE, LENGTH = 0x00010000 - RPMSG_SHMEM_SIZE
47  rpmsg_sh_mem          (RW)  : ORIGIN = 0x202C0000, LENGTH = RPMSG_SHMEM_SIZE
48  m_core1_image         (RX)  : ORIGIN = CORE1IMAGE_START, LENGTH = 0x00040000
49}
50
51/* Define output sections */
52SECTIONS
53{
54  __NCACHE_REGION_START = ORIGIN(rpmsg_sh_mem);
55  __NCACHE_REGION_SIZE  = LENGTH(rpmsg_sh_mem);
56
57  .flash_config :
58  {
59    . = ALIGN(4);
60    __FLASH_BASE = .;
61    KEEP(* (.boot_hdr.conf))     /* flash config section */
62    . = ALIGN(4);
63  } > m_flash_config
64
65  ivt_begin = ORIGIN(m_flash_config) + LENGTH(m_flash_config);
66
67  .ivt : AT(ivt_begin)
68  {
69    . = ALIGN(4);
70    KEEP(* (.boot_hdr.ivt))           /* ivt section */
71    KEEP(* (.boot_hdr.boot_data))     /* boot section */
72    KEEP(* (.boot_hdr.dcd_data))      /* dcd section */
73    . = ALIGN(4);
74  } > m_ivt
75
76  /* section for storing the secondary core image */
77  .core1_code :
78  {
79     . = ALIGN(4) ;
80    KEEP (*(.core1_code))
81     *(.core1_code*)
82     . = ALIGN(4) ;
83  } > m_core1_image
84
85  /* NOINIT section for rpmsg_sh_mem */
86  .noinit_rpmsg_sh_mem (NOLOAD) : ALIGN(4)
87  {
88     __RPMSG_SH_MEM_START__ = .;
89     *(.noinit.$rpmsg_sh_mem*)
90     . = ALIGN(4) ;
91     __RPMSG_SH_MEM_END__ = .;
92  } > rpmsg_sh_mem
93
94  /* The startup code goes first into internal RAM */
95  .interrupts :
96  {
97    __VECTOR_TABLE = .;
98    __Vectors = .;
99    . = ALIGN(4);
100    KEEP(*(.isr_vector))     /* Startup code */
101    . = ALIGN(4);
102  } > m_interrupts
103
104  /* The program code and other data goes into internal RAM */
105  .text :
106  {
107    . = ALIGN(4);
108    *(.text)                 /* .text sections (code) */
109    *(.text*)                /* .text* sections (code) */
110    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
111    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
112    *(.glue_7)               /* glue arm to thumb code */
113    *(.glue_7t)              /* glue thumb to arm code */
114    *(.eh_frame)
115    KEEP (*(.init))
116    KEEP (*(.fini))
117    . = ALIGN(4);
118  } > m_text
119
120  .ARM.extab :
121  {
122    *(.ARM.extab* .gnu.linkonce.armextab.*)
123  } > m_text
124
125  .ARM :
126  {
127    __exidx_start = .;
128    *(.ARM.exidx*)
129    __exidx_end = .;
130  } > m_text
131
132 .ctors :
133  {
134    __CTOR_LIST__ = .;
135    /* gcc uses crtbegin.o to find the start of
136       the constructors, so we make sure it is
137       first.  Because this is a wildcard, it
138       doesn't matter if the user does not
139       actually link against crtbegin.o; the
140       linker won't look for a file to match a
141       wildcard.  The wildcard also means that it
142       doesn't matter which directory crtbegin.o
143       is in.  */
144    KEEP (*crtbegin.o(.ctors))
145    KEEP (*crtbegin?.o(.ctors))
146    /* We don't want to include the .ctor section from
147       from the crtend.o file until after the sorted ctors.
148       The .ctor section from the crtend file contains the
149       end of ctors marker and it must be last */
150    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
151    KEEP (*(SORT(.ctors.*)))
152    KEEP (*(.ctors))
153    __CTOR_END__ = .;
154  } > m_text
155
156  .dtors :
157  {
158    __DTOR_LIST__ = .;
159    KEEP (*crtbegin.o(.dtors))
160    KEEP (*crtbegin?.o(.dtors))
161    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
162    KEEP (*(SORT(.dtors.*)))
163    KEEP (*(.dtors))
164    __DTOR_END__ = .;
165  } > m_text
166
167  .preinit_array :
168  {
169    PROVIDE_HIDDEN (__preinit_array_start = .);
170    KEEP (*(.preinit_array*))
171    PROVIDE_HIDDEN (__preinit_array_end = .);
172  } > m_text
173
174  .init_array :
175  {
176    PROVIDE_HIDDEN (__init_array_start = .);
177    KEEP (*(SORT(.init_array.*)))
178    KEEP (*(.init_array*))
179    PROVIDE_HIDDEN (__init_array_end = .);
180  } > m_text
181
182  .fini_array :
183  {
184    PROVIDE_HIDDEN (__fini_array_start = .);
185    KEEP (*(SORT(.fini_array.*)))
186    KEEP (*(.fini_array*))
187    PROVIDE_HIDDEN (__fini_array_end = .);
188  } > m_text
189
190  __etext = .;    /* define a global symbol at end of code */
191  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
192
193  .interrupts_ram :
194  {
195    . = ALIGN(4);
196    __VECTOR_RAM__ = .;
197    __interrupts_ram_start__ = .; /* Create a global symbol at data start */
198    *(.m_interrupts_ram)     /* This is a user defined section */
199    . += VECTOR_RAM_SIZE;
200    . = ALIGN(4);
201    __interrupts_ram_end__ = .; /* Define a global symbol at data end */
202  } > m_data
203
204  __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
205  __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
206
207  .data : AT(__DATA_ROM)
208  {
209    . = ALIGN(4);
210    __DATA_RAM = .;
211    __data_start__ = .;      /* create a global symbol at data start */
212    *(m_usb_dma_init_data)
213    *(.data)                 /* .data sections */
214    *(.data*)                /* .data* sections */
215    *(DataQuickAccess)       /* quick access data section */
216    KEEP(*(.jcr*))
217    . = ALIGN(4);
218    __data_end__ = .;        /* define a global symbol at data end */
219  } > m_data
220
221  __ram_function_flash_start = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for TCM data initialization */
222
223  .ram_function : AT(__ram_function_flash_start)
224  {
225    . = ALIGN(32);
226    __ram_function_start__ = .;
227    *(CodeQuickAccess)
228    . = ALIGN(128);
229    __ram_function_end__ = .;
230  } > m_qacode
231
232  __NDATA_ROM = __ram_function_flash_start + (__ram_function_end__ - __ram_function_start__);
233  .ncache.init : AT(__NDATA_ROM)
234  {
235    __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
236    *(NonCacheable.init)
237    . = ALIGN(4);
238    __noncachedata_init_end__ = .;   /* create a global symbol at initialized ncache data end */
239  } > m_data
240  . = __noncachedata_init_end__;
241  .ncache :
242  {
243    *(NonCacheable)
244    . = ALIGN(4);
245    __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
246  } > m_data
247
248  __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
249  text_end = ORIGIN(m_text) + LENGTH(m_text);
250  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
251
252  /* Uninitialized data section */
253  .bss :
254  {
255    /* This is used by the startup in order to initialize the .bss section */
256    . = ALIGN(4);
257    __START_BSS = .;
258    __bss_start__ = .;
259    *(m_usb_dma_noninit_data)
260    *(.bss)
261    *(.bss*)
262    *(COMMON)
263    . = ALIGN(4);
264    __bss_end__ = .;
265    __END_BSS = .;
266  } > m_data
267
268  .heap :
269  {
270    . = ALIGN(8);
271    __end__ = .;
272    PROVIDE(end = .);
273    __HeapBase = .;
274    . += HEAP_SIZE;
275    __HeapLimit = .;
276    __heap_limit = .; /* Add for _sbrk */
277  } > m_data
278
279  .stack :
280  {
281    . = ALIGN(8);
282    . += STACK_SIZE;
283  } > m_data
284
285  /* Initializes stack on the end of block */
286  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
287  __StackLimit = __StackTop - STACK_SIZE;
288  PROVIDE(__stack = __StackTop);
289
290  .ARM.attributes 0 : { *(.ARM.attributes) }
291
292  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
293}
294