1 /*
2 * Copyright 2020 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #ifndef _FSL_IOMUXC_H_
9 #define _FSL_IOMUXC_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup iomuxc_driver
15 * @{
16 */
17
18 /*! @file */
19
20 /*******************************************************************************
21 * Definitions
22 ******************************************************************************/
23
24 /*! @name Driver version */
25 /*@{*/
26 /*! @brief IOMUXC driver version 2.0.0. */
27 #define FSL_IOMUXC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
28 /*@}*/
29
30 /*!
31 * @name Pin function ID
32 * The pin function ID is a tuple of \<muxRegister muxMode inputRegister inputDaisy configRegister\>
33 *
34 * @{
35 */
36 #define IOMUXC_PTA0_CMP1_IN2 0x280A1000, 0X0, 0x00000000, 0x0, 0x280A1000
37 #define IOMUXC_PTA0_PTA0 0x280A1000, 0X1, 0x00000000, 0x0, 0x280A1000
38 #define IOMUXC_PTA0_LPSPI0_PCS1 0x280A1000, 0X3, 0x00000000, 0x0, 0x280A1000
39 #define IOMUXC_PTA0_LPUART0_CTS_B 0x280A1000, 0X4, 0x280A1990, 0X1, 0x280A1000
40 #define IOMUXC_PTA0_LPI2C0_SCL 0x280A1000, 0X5, 0x280A197C, 0X1, 0x280A1000
41 #define IOMUXC_PTA0_TPM0_CLKIN 0x280A1000, 0X6, 0x280A1958, 0X1, 0x280A1000
42 #define IOMUXC_PTA0_I2S0_RX_BCLK 0x280A1000, 0X7, 0x280A19B8, 0X1, 0x280A1000
43 #define IOMUXC_PTA0_LPTMR0_ALT1 0x280A1000, 0XC, 0x280A1928, 0X1, 0x280A1000
44 #define IOMUXC_PTA0_WUU0_P0 0x280A1000, 0XD, 0x00000000, 0x0, 0x280A1000
45 #define IOMUXC_PTA1_CMP1_IN3 0x280A1004, 0X0, 0x00000000, 0x0, 0x280A1004
46 #define IOMUXC_PTA1_PTA1 0x280A1004, 0X1, 0x00000000, 0x0, 0x280A1004
47 #define IOMUXC_PTA1_LPSPI0_PCS2 0x280A1004, 0X3, 0x00000000, 0x0, 0x280A1004
48 #define IOMUXC_PTA1_LPUART0_RTS_B 0x280A1004, 0X4, 0x00000000, 0x0, 0x280A1004
49 #define IOMUXC_PTA1_LPI2C0_SDA 0x280A1004, 0X5, 0x280A1980, 0X1, 0x280A1004
50 #define IOMUXC_PTA1_TPM0_CH0 0x280A1004, 0X6, 0x280A1940, 0X1, 0x280A1004
51 #define IOMUXC_PTA1_I2S0_RX_FS 0x280A1004, 0X7, 0x280A19BC, 0X1, 0x280A1004
52 #define IOMUXC_PTA1_EWM0_OUT_B 0x280A1004, 0XC, 0x00000000, 0x0, 0x280A1004
53 #define IOMUXC_PTA1_RTC_CLKOUT_B 0x280A1004, 0XD, 0x00000000, 0x0, 0x280A1004
54 #define IOMUXC_PTA2_CMP1_IN4 0x280A1008, 0X0, 0x00000000, 0x0, 0x280A1008
55 #define IOMUXC_PTA2_PTA2 0x280A1008, 0X1, 0x00000000, 0x0, 0x280A1008
56 #define IOMUXC_PTA2_LPSPI0_PCS3 0x280A1008, 0X3, 0x00000000, 0x0, 0x280A1008
57 #define IOMUXC_PTA2_LPUART0_TX 0x280A1008, 0X4, 0x280A1998, 0X1, 0x280A1008
58 #define IOMUXC_PTA2_LPI2C0_HREQ 0x280A1008, 0X5, 0x280A1978, 0X1, 0x280A1008
59 #define IOMUXC_PTA2_TPM0_CH1 0x280A1008, 0X6, 0x280A1944, 0X1, 0x280A1008
60 #define IOMUXC_PTA2_I2S0_RXD0 0x280A1008, 0X7, 0x280A19A8, 0X1, 0x280A1008
61 #define IOMUXC_PTA2_WDOG0_RST 0x280A1008, 0XA, 0x00000000, 0x0, 0x280A1008
62 #define IOMUXC_PTA2_LPTMR0_ALT2 0x280A1008, 0XC, 0x280A192C, 0X1, 0x280A1008
63 #define IOMUXC_PTA2_RTC_CLKOUT 0x280A1008, 0XD, 0x00000000, 0x0, 0x280A1008
64 #define IOMUXC_PTA3_CMP1_IN5 0x280A100C, 0X0, 0x00000000, 0x0, 0x280A100C
65 #define IOMUXC_PTA3_PTA3 0x280A100C, 0X1, 0x00000000, 0x0, 0x280A100C
66 #define IOMUXC_PTA3_LPUART0_RX 0x280A100C, 0X4, 0x280A1994, 0X1, 0x280A100C
67 #define IOMUXC_PTA3_LPI2C1_HREQ 0x280A100C, 0X5, 0x280A1984, 0X1, 0x280A100C
68 #define IOMUXC_PTA3_TPM0_CH2 0x280A100C, 0X6, 0x280A1948, 0X1, 0x280A100C
69 #define IOMUXC_PTA3_I2S0_RXD1 0x280A100C, 0X7, 0x280A19AC, 0X1, 0x280A100C
70 #define IOMUXC_PTA3_PMIC0_MODE2 0x280A100C, 0XA, 0x00000000, 0x0, 0x280A100C
71 #define IOMUXC_PTA3_CMP0_OUT 0x280A100C, 0XC, 0x00000000, 0x0, 0x280A100C
72 #define IOMUXC_PTA3_WUU0_P1 0x280A100C, 0XD, 0x00000000, 0x0, 0x280A100C
73 #define IOMUXC_PTA4_CMP0_IN2 0x280A1010, 0X0, 0x00000000, 0x0, 0x280A1010
74 #define IOMUXC_PTA4_PTA4 0x280A1010, 0X1, 0x00000000, 0x0, 0x280A1010
75 #define IOMUXC_PTA4_LPSPI0_SIN 0x280A1010, 0X3, 0x280A18B4, 0X1, 0x280A1010
76 #define IOMUXC_PTA4_LPUART1_CTS_B 0x280A1010, 0X4, 0x280A199C, 0X1, 0x280A1010
77 #define IOMUXC_PTA4_LPI2C1_SCL 0x280A1010, 0X5, 0x280A1988, 0X1, 0x280A1010
78 #define IOMUXC_PTA4_TPM0_CH3 0x280A1010, 0X6, 0x280A194C, 0X1, 0x280A1010
79 #define IOMUXC_PTA4_I2S0_MCLK 0x280A1010, 0X7, 0x00000000, 0x0, 0x280A1010
80 #define IOMUXC_PTA4_EXT_AUD_MCLK0 0x280A1010, 0X8, 0x280A180C, 0X1, 0x280A1010
81 #define IOMUXC_PTA4_CAN0_TX 0x280A1010, 0X9, 0x00000000, 0x0, 0x280A1010
82 #define IOMUXC_PTA4_PMIC0_MODE1 0x280A1010, 0XA, 0x00000000, 0x0, 0x280A1010
83 #define IOMUXC_PTA4_LPTMR0_ALT3 0x280A1010, 0XC, 0x280A1930, 0X1, 0x280A1010
84 #define IOMUXC_PTA4_WUU0_P2 0x280A1010, 0XD, 0x00000000, 0x0, 0x280A1010
85 #define IOMUXC_PTA5_CMP0_IN3 0x280A1014, 0X0, 0x00000000, 0x0, 0x280A1014
86 #define IOMUXC_PTA5_PTA5 0x280A1014, 0X1, 0x00000000, 0x0, 0x280A1014
87 #define IOMUXC_PTA5_LPSPI0_SOUT 0x280A1014, 0X3, 0x280A18B8, 0X1, 0x280A1014
88 #define IOMUXC_PTA5_LPUART1_RTS_B 0x280A1014, 0X4, 0x00000000, 0x0, 0x280A1014
89 #define IOMUXC_PTA5_LPI2C1_SDA 0x280A1014, 0X5, 0x280A198C, 0X1, 0x280A1014
90 #define IOMUXC_PTA5_TPM0_CH4 0x280A1014, 0X6, 0x00000000, 0x0, 0x280A1014
91 #define IOMUXC_PTA5_I2S0_TX_BCLK 0x280A1014, 0X7, 0x280A19C0, 0X1, 0x280A1014
92 #define IOMUXC_PTA5_CAN0_RX 0x280A1014, 0X9, 0x280A19E8, 0X1, 0x280A1014
93 #define IOMUXC_PTA5_LPTMR1_ALT1 0x280A1014, 0XC, 0x280A1934, 0X1, 0x280A1014
94 #define IOMUXC_PTA5_RTC_CLKOUT_B 0x280A1014, 0XD, 0x00000000, 0x0, 0x280A1014
95 #define IOMUXC_PTA6_CMP0_IN4 0x280A1018, 0X0, 0x00000000, 0x0, 0x280A1018
96 #define IOMUXC_PTA6_PTA6 0x280A1018, 0X1, 0x00000000, 0x0, 0x280A1018
97 #define IOMUXC_PTA6_LPSPI0_SCK 0x280A1018, 0X3, 0x280A18B0, 0X1, 0x280A1018
98 #define IOMUXC_PTA6_LPUART1_TX 0x280A1018, 0X4, 0x280A19A4, 0X1, 0x280A1018
99 #define IOMUXC_PTA6_I3C0_SCL 0x280A1018, 0X5, 0x280A1898, 0X1, 0x280A1018
100 #define IOMUXC_PTA6_TPM0_CH5 0x280A1018, 0X6, 0x00000000, 0x0, 0x280A1018
101 #define IOMUXC_PTA6_I2S0_TX_FS 0x280A1018, 0X7, 0x280A19C4, 0X1, 0x280A1018
102 #define IOMUXC_PTA6_SEC0_TX 0x280A1018, 0X9, 0x280A1AE8, 0X1, 0x280A1018
103 #define IOMUXC_PTA6_RTC_CLKOUT 0x280A1018, 0XC, 0x00000000, 0x0, 0x280A1018
104 #define IOMUXC_PTA6_WUU0_P3 0x280A1018, 0XD, 0x00000000, 0x0, 0x280A1018
105 #define IOMUXC_PTA7_CMP0_IN5 0x280A101C, 0X0, 0x00000000, 0x0, 0x280A101C
106 #define IOMUXC_PTA7_PTA7 0x280A101C, 0X1, 0x00000000, 0x0, 0x280A101C
107 #define IOMUXC_PTA7_LPSPI0_PCS0 0x280A101C, 0X3, 0x280A18A0, 0X1, 0x280A101C
108 #define IOMUXC_PTA7_LPUART1_RX 0x280A101C, 0X4, 0x280A19A0, 0X1, 0x280A101C
109 #define IOMUXC_PTA7_I3C0_SDA 0x280A101C, 0X5, 0x280A189C, 0X1, 0x280A101C
110 #define IOMUXC_PTA7_TPM1_CLKIN 0x280A101C, 0X6, 0x280A1974, 0X1, 0x280A101C
111 #define IOMUXC_PTA7_I2S0_TXD0 0x280A101C, 0X7, 0x00000000, 0x0, 0x280A101C
112 #define IOMUXC_PTA7_SEC0_RX 0x280A101C, 0X9, 0x280A1AE4, 0X1, 0x280A101C
113 #define IOMUXC_PTA7_WDOG1_RST 0x280A101C, 0XA, 0x00000000, 0x0, 0x280A101C
114 #define IOMUXC_PTA7_LPTMR1_ALT2 0x280A101C, 0XC, 0x280A1938, 0X1, 0x280A101C
115 #define IOMUXC_PTA7_WUU0_P4 0x280A101C, 0XD, 0x00000000, 0x0, 0x280A101C
116 #define IOMUXC_PTA8_ADC1_CH0A 0x280A1020, 0X0, 0x00000000, 0x0, 0x280A1020
117 #define IOMUXC_PTA8_PTA8 0x280A1020, 0X1, 0x00000000, 0x0, 0x280A1020
118 #define IOMUXC_PTA8_FXIO0_D0 0x280A1020, 0X2, 0x00000000, 0x0, 0x280A1020
119 #define IOMUXC_PTA8_LPSPI1_PCS1 0x280A1020, 0X3, 0x00000000, 0x0, 0x280A1020
120 #define IOMUXC_PTA8_LPUART1_CTS_B 0x280A1020, 0X4, 0x280A199C, 0X2, 0x280A1020
121 #define IOMUXC_PTA8_LPI2C0_SCL 0x280A1020, 0X5, 0x280A197C, 0X2, 0x280A1020
122 #define IOMUXC_PTA8_TPM1_CH0 0x280A1020, 0X6, 0x280A195C, 0X1, 0x280A1020
123 #define IOMUXC_PTA8_I2S0_TXD1 0x280A1020, 0X7, 0x00000000, 0x0, 0x280A1020
124 #define IOMUXC_PTA8_PMIC0_MODE0 0x280A1020, 0XA, 0x00000000, 0x0, 0x280A1020
125 #define IOMUXC_PTA8_LPTMR1_ALT3 0x280A1020, 0XC, 0x280A193C, 0X1, 0x280A1020
126 #define IOMUXC_PTA8_WUU0_P5 0x280A1020, 0XD, 0x00000000, 0x0, 0x280A1020
127 #define IOMUXC_PTA9_ADC1_CH0B 0x280A1024, 0X0, 0x00000000, 0x0, 0x280A1024
128 #define IOMUXC_PTA9_PTA9 0x280A1024, 0X1, 0x00000000, 0x0, 0x280A1024
129 #define IOMUXC_PTA9_FXIO0_D1 0x280A1024, 0X2, 0x00000000, 0x0, 0x280A1024
130 #define IOMUXC_PTA9_LPSPI1_PCS2 0x280A1024, 0X3, 0x00000000, 0x0, 0x280A1024
131 #define IOMUXC_PTA9_LPUART1_RTS_B 0x280A1024, 0X4, 0x00000000, 0x0, 0x280A1024
132 #define IOMUXC_PTA9_LPI2C0_SDA 0x280A1024, 0X5, 0x280A1980, 0X2, 0x280A1024
133 #define IOMUXC_PTA9_TPM1_CH1 0x280A1024, 0X6, 0x280A1960, 0X1, 0x280A1024
134 #define IOMUXC_PTA9_I2S1_RX_BCLK 0x280A1024, 0X7, 0x280A19D8, 0X1, 0x280A1024
135 #define IOMUXC_PTA9_NMI0_B 0x280A1024, 0XC, 0x00000000, 0x0, 0x280A1024
136 #define IOMUXC_PTA9_WUU0_P6 0x280A1024, 0XD, 0x00000000, 0x0, 0x280A1024
137 #define IOMUXC_PTA10_ADC1_CH1A 0x280A1028, 0X0, 0x00000000, 0x0, 0x280A1028
138 #define IOMUXC_PTA10_PTA10 0x280A1028, 0X1, 0x00000000, 0x0, 0x280A1028
139 #define IOMUXC_PTA10_FXIO0_D2 0x280A1028, 0X2, 0x00000000, 0x0, 0x280A1028
140 #define IOMUXC_PTA10_LPSPI1_PCS3 0x280A1028, 0X3, 0x00000000, 0x0, 0x280A1028
141 #define IOMUXC_PTA10_LPUART1_TX 0x280A1028, 0X4, 0x280A19A4, 0X2, 0x280A1028
142 #define IOMUXC_PTA10_LPI2C0_HREQ 0x280A1028, 0X5, 0x280A1978, 0X2, 0x280A1028
143 #define IOMUXC_PTA10_I3C0_PUR 0x280A1028, 0X6, 0x00000000, 0x0, 0x280A1028
144 #define IOMUXC_PTA10_I2S1_RX_FS 0x280A1028, 0X7, 0x280A19DC, 0X1, 0x280A1028
145 #define IOMUXC_PTA10_EWM0_IN 0x280A1028, 0XC, 0x280A1808, 0X1, 0x280A1028
146 #define IOMUXC_PTA10_WUU0_P7 0x280A1028, 0XD, 0x00000000, 0x0, 0x280A1028
147 #define IOMUXC_PTA11_ADC1_CH1B 0x280A102C, 0X0, 0x00000000, 0x0, 0x280A102C
148 #define IOMUXC_PTA11_PTA11 0x280A102C, 0X1, 0x00000000, 0x0, 0x280A102C
149 #define IOMUXC_PTA11_FXIO0_D3 0x280A102C, 0X2, 0x00000000, 0x0, 0x280A102C
150 #define IOMUXC_PTA11_LPUART1_RX 0x280A102C, 0X4, 0x280A19A0, 0X2, 0x280A102C
151 #define IOMUXC_PTA11_LPI2C1_HREQ 0x280A102C, 0X5, 0x280A1984, 0X2, 0x280A102C
152 #define IOMUXC_PTA11_I3C0_PUR 0x280A102C, 0X6, 0x00000000, 0x0, 0x280A102C
153 #define IOMUXC_PTA11_I2S1_RXD0 0x280A102C, 0X7, 0x280A19C8, 0X1, 0x280A102C
154 #define IOMUXC_PTA11_WDOG0_RST 0x280A102C, 0XA, 0x00000000, 0x0, 0x280A102C
155 #define IOMUXC_PTA11_LPTMR0_ALT1 0x280A102C, 0XC, 0x280A1928, 0X2, 0x280A102C
156 #define IOMUXC_PTA11_WUU0_P8 0x280A102C, 0XD, 0x00000000, 0x0, 0x280A102C
157 #define IOMUXC_PTA12_ADC1_CH2A 0x280A1030, 0X0, 0x00000000, 0x0, 0x280A1030
158 #define IOMUXC_PTA12_PTA12 0x280A1030, 0X1, 0x00000000, 0x0, 0x280A1030
159 #define IOMUXC_PTA12_FXIO0_D4 0x280A1030, 0X2, 0x00000000, 0x0, 0x280A1030
160 #define IOMUXC_PTA12_LPSPI1_SIN 0x280A1030, 0X3, 0x280A18D0, 0X1, 0x280A1030
161 #define IOMUXC_PTA12_LPUART0_CTS_B 0x280A1030, 0X4, 0x280A1990, 0X2, 0x280A1030
162 #define IOMUXC_PTA12_LPI2C1_SCL 0x280A1030, 0X5, 0x280A1988, 0X2, 0x280A1030
163 #define IOMUXC_PTA12_I2S1_RXD1 0x280A1030, 0X7, 0x280A19CC, 0X1, 0x280A1030
164 #define IOMUXC_PTA12_CAN0_TX 0x280A1030, 0X9, 0x00000000, 0x0, 0x280A1030
165 #define IOMUXC_PTA12_PMIC0_SDA 0x280A1030, 0XA, 0x280A1804, 0X1, 0x280A1030
166 #define IOMUXC_PTA12_EWM0_IN 0x280A1030, 0XC, 0x280A1808, 0X2, 0x280A1030
167 #define IOMUXC_PTA12_WUU0_P9 0x280A1030, 0XD, 0x00000000, 0x0, 0x280A1030
168 #define IOMUXC_PTA13_ADC1_CH2B 0x280A1034, 0X0, 0x00000000, 0x0, 0x280A1034
169 #define IOMUXC_PTA13_PTA13 0x280A1034, 0X1, 0x00000000, 0x0, 0x280A1034
170 #define IOMUXC_PTA13_FXIO0_D5 0x280A1034, 0X2, 0x00000000, 0x0, 0x280A1034
171 #define IOMUXC_PTA13_LPSPI1_SOUT 0x280A1034, 0X3, 0x280A18D4, 0X1, 0x280A1034
172 #define IOMUXC_PTA13_LPUART0_RTS_B 0x280A1034, 0X4, 0x00000000, 0x0, 0x280A1034
173 #define IOMUXC_PTA13_LPI2C1_SDA 0x280A1034, 0X5, 0x280A198C, 0X2, 0x280A1034
174 #define IOMUXC_PTA13_I2S1_MCLK 0x280A1034, 0X7, 0x00000000, 0x0, 0x280A1034
175 #define IOMUXC_PTA13_EXT_AUD_MCLK0 0x280A1034, 0X8, 0x280A180C, 0X2, 0x280A1034
176 #define IOMUXC_PTA13_CAN0_RX 0x280A1034, 0X9, 0x280A19E8, 0X2, 0x280A1034
177 #define IOMUXC_PTA13_PMIC0_SCL 0x280A1034, 0XA, 0x280A1800, 0X1, 0x280A1034
178 #define IOMUXC_PTA13_CMP0_OUT 0x280A1034, 0XC, 0x00000000, 0x0, 0x280A1034
179 #define IOMUXC_PTA13_WUU0_P10 0x280A1034, 0XD, 0x00000000, 0x0, 0x280A1034
180 #define IOMUXC_PTA14_ADC1_CH3A 0x280A1038, 0X0, 0x00000000, 0x0, 0x280A1038
181 #define IOMUXC_PTA14_PTA14 0x280A1038, 0X1, 0x00000000, 0x0, 0x280A1038
182 #define IOMUXC_PTA14_FXIO0_D6 0x280A1038, 0X2, 0x00000000, 0x0, 0x280A1038
183 #define IOMUXC_PTA14_LPSPI1_SCK 0x280A1038, 0X3, 0x280A18CC, 0X1, 0x280A1038
184 #define IOMUXC_PTA14_LPUART0_TX 0x280A1038, 0X4, 0x280A1998, 0X2, 0x280A1038
185 #define IOMUXC_PTA14_I3C0_SCL 0x280A1038, 0X5, 0x280A1898, 0X2, 0x280A1038
186 #define IOMUXC_PTA14_TPM0_CLKIN 0x280A1038, 0X6, 0x280A1958, 0X2, 0x280A1038
187 #define IOMUXC_PTA14_I2S1_TX_BCLK 0x280A1038, 0X7, 0x280A19E0, 0X1, 0x280A1038
188 #define IOMUXC_PTA14_SEC0_TX 0x280A1038, 0X9, 0x280A1AE8, 0X2, 0x280A1038
189 #define IOMUXC_PTA14_EWM0_OUT_B 0x280A1038, 0XC, 0x00000000, 0x0, 0x280A1038
190 #define IOMUXC_PTA14_WUU0_P11 0x280A1038, 0XD, 0x00000000, 0x0, 0x280A1038
191 #define IOMUXC_PTA15_ADC1_CH3B 0x280A103C, 0X0, 0x00000000, 0x0, 0x280A103C
192 #define IOMUXC_PTA15_PTA15 0x280A103C, 0X1, 0x00000000, 0x0, 0x280A103C
193 #define IOMUXC_PTA15_FXIO0_D7 0x280A103C, 0X2, 0x00000000, 0x0, 0x280A103C
194 #define IOMUXC_PTA15_LPSPI1_PCS0 0x280A103C, 0X3, 0x280A18BC, 0X1, 0x280A103C
195 #define IOMUXC_PTA15_LPUART0_RX 0x280A103C, 0X4, 0x280A1994, 0X2, 0x280A103C
196 #define IOMUXC_PTA15_I3C0_SDA 0x280A103C, 0X5, 0x280A189C, 0X2, 0x280A103C
197 #define IOMUXC_PTA15_TPM0_CH0 0x280A103C, 0X6, 0x280A1940, 0X2, 0x280A103C
198 #define IOMUXC_PTA15_I2S1_TX_FS 0x280A103C, 0X7, 0x280A19E4, 0X1, 0x280A103C
199 #define IOMUXC_PTA15_SEC0_RX 0x280A103C, 0X9, 0x280A1AE4, 0X2, 0x280A103C
200 #define IOMUXC_PTA15_CLKOUT0 0x280A103C, 0XA, 0x00000000, 0x0, 0x280A103C
201 #define IOMUXC_PTA15_CMP1_OUT 0x280A103C, 0XC, 0x00000000, 0x0, 0x280A103C
202 #define IOMUXC_PTA15_WUU0_P12 0x280A103C, 0XD, 0x00000000, 0x0, 0x280A103C
203 #define IOMUXC_PTA16_ADC1_CH4A 0x280A1040, 0X0, 0x00000000, 0x0, 0x280A1040
204 #define IOMUXC_PTA16_PTA16 0x280A1040, 0X1, 0x00000000, 0x0, 0x280A1040
205 #define IOMUXC_PTA16_FXIO0_D8 0x280A1040, 0X2, 0x00000000, 0x0, 0x280A1040
206 #define IOMUXC_PTA16_LPSPI1_SIN 0x280A1040, 0X3, 0x280A18D0, 0X2, 0x280A1040
207 #define IOMUXC_PTA16_LPUART0_CTS_B 0x280A1040, 0X4, 0x280A1990, 0X3, 0x280A1040
208 #define IOMUXC_PTA16_LPI2C0_SCL 0x280A1040, 0X5, 0x280A197C, 0X3, 0x280A1040
209 #define IOMUXC_PTA16_TPM0_CH1 0x280A1040, 0X6, 0x280A1944, 0X2, 0x280A1040
210 #define IOMUXC_PTA16_I2S1_TXD0 0x280A1040, 0X7, 0x00000000, 0x0, 0x280A1040
211 #define IOMUXC_PTA16_CAN0_TX 0x280A1040, 0X9, 0x00000000, 0x0, 0x280A1040
212 #define IOMUXC_PTA16_RTC_CLKOUT_B 0x280A1040, 0XC, 0x00000000, 0x0, 0x280A1040
213 #define IOMUXC_PTA16_WUU0_P13 0x280A1040, 0XD, 0x00000000, 0x0, 0x280A1040
214 #define IOMUXC_PTA17_ADC1_CH4B 0x280A1044, 0X0, 0x00000000, 0x0, 0x280A1044
215 #define IOMUXC_PTA17_PTA17 0x280A1044, 0X1, 0x00000000, 0x0, 0x280A1044
216 #define IOMUXC_PTA17_FXIO0_D9 0x280A1044, 0X2, 0x00000000, 0x0, 0x280A1044
217 #define IOMUXC_PTA17_LPSPI1_SOUT 0x280A1044, 0X3, 0x280A18D4, 0X2, 0x280A1044
218 #define IOMUXC_PTA17_LPUART0_RTS_B 0x280A1044, 0X4, 0x00000000, 0x0, 0x280A1044
219 #define IOMUXC_PTA17_LPI2C0_SDA 0x280A1044, 0X5, 0x280A1980, 0X3, 0x280A1044
220 #define IOMUXC_PTA17_TPM0_CH2 0x280A1044, 0X6, 0x280A1948, 0X2, 0x280A1044
221 #define IOMUXC_PTA17_I2S1_TXD1 0x280A1044, 0X7, 0x00000000, 0x0, 0x280A1044
222 #define IOMUXC_PTA17_CAN0_RX 0x280A1044, 0X9, 0x280A19E8, 0X3, 0x280A1044
223 #define IOMUXC_PTA17_WDOG1_RST 0x280A1044, 0XA, 0x00000000, 0x0, 0x280A1044
224 #define IOMUXC_PTA17_RTC_CLKOUT 0x280A1044, 0XC, 0x00000000, 0x0, 0x280A1044
225 #define IOMUXC_PTA17_WUU0_P14 0x280A1044, 0XD, 0x00000000, 0x0, 0x280A1044
226 #define IOMUXC_PTA18_ADC1_CH5A 0x280A1048, 0X0, 0x00000000, 0x0, 0x280A1048
227 #define IOMUXC_PTA18_PTA18 0x280A1048, 0X1, 0x00000000, 0x0, 0x280A1048
228 #define IOMUXC_PTA18_FXIO0_D10 0x280A1048, 0X2, 0x00000000, 0x0, 0x280A1048
229 #define IOMUXC_PTA18_LPSPI1_SCK 0x280A1048, 0X3, 0x280A18CC, 0X2, 0x280A1048
230 #define IOMUXC_PTA18_LPUART0_TX 0x280A1048, 0X4, 0x280A1998, 0X3, 0x280A1048
231 #define IOMUXC_PTA18_LPI2C0_HREQ 0x280A1048, 0X5, 0x280A1978, 0X3, 0x280A1048
232 #define IOMUXC_PTA18_TPM0_CH3 0x280A1048, 0X6, 0x280A194C, 0X2, 0x280A1048
233 #define IOMUXC_PTA18_I2S1_TXD2 0x280A1048, 0X7, 0x00000000, 0x0, 0x280A1048
234 #define IOMUXC_PTA18_NMI1_B 0x280A1048, 0XC, 0x00000000, 0x0, 0x280A1048
235 #define IOMUXC_PTA18_WUU0_P15 0x280A1048, 0XD, 0x00000000, 0x0, 0x280A1048
236 #define IOMUXC_PTA19_PTA19 0x280A104C, 0X1, 0x00000000, 0x0, 0x280A104C
237 #define IOMUXC_PTA19_FXIO0_D11 0x280A104C, 0X2, 0x00000000, 0x0, 0x280A104C
238 #define IOMUXC_PTA19_LPSPI1_PCS0 0x280A104C, 0X3, 0x280A18BC, 0X2, 0x280A104C
239 #define IOMUXC_PTA19_LPUART0_RX 0x280A104C, 0X4, 0x280A1994, 0X3, 0x280A104C
240 #define IOMUXC_PTA19_LPI2C1_HREQ 0x280A104C, 0X5, 0x280A1984, 0X3, 0x280A104C
241 #define IOMUXC_PTA19_TPM1_CLKIN 0x280A104C, 0X6, 0x280A1974, 0X2, 0x280A104C
242 #define IOMUXC_PTA19_I2S1_TXD3 0x280A104C, 0X7, 0x00000000, 0x0, 0x280A104C
243 #define IOMUXC_PTA19_MQS0_LEFT 0x280A104C, 0X8, 0x00000000, 0x0, 0x280A104C
244 #define IOMUXC_PTA19_JTAG0_TRST_B 0x280A104C, 0XA, 0x00000000, 0x0, 0x280A104C
245 #define IOMUXC_PTA19_LPTMR0_ALT2 0x280A104C, 0XC, 0x280A192C, 0X2, 0x280A104C
246 #define IOMUXC_PTA20_PTA20 0x280A1050, 0X1, 0x00000000, 0x0, 0x280A1050
247 #define IOMUXC_PTA20_FXIO0_D12 0x280A1050, 0X2, 0x00000000, 0x0, 0x280A1050
248 #define IOMUXC_PTA20_LPSPI0_SIN 0x280A1050, 0X3, 0x280A18B4, 0X2, 0x280A1050
249 #define IOMUXC_PTA20_LPUART1_CTS_B 0x280A1050, 0X4, 0x280A199C, 0X3, 0x280A1050
250 #define IOMUXC_PTA20_LPI2C1_SCL 0x280A1050, 0X5, 0x280A1988, 0X3, 0x280A1050
251 #define IOMUXC_PTA20_TPM1_CH0 0x280A1050, 0X6, 0x280A195C, 0X2, 0x280A1050
252 #define IOMUXC_PTA20_I2S1_RXD2 0x280A1050, 0X7, 0x280A19D0, 0X1, 0x280A1050
253 #define IOMUXC_PTA20_JTAG0_TMS_SWD0_DIO 0x280A1050, 0XA, 0x00000000, 0x0, 0x280A1050
254 #define IOMUXC_PTA20_LPTMR0_ALT3 0x280A1050, 0XC, 0x280A1930, 0X2, 0x280A1050
255 #define IOMUXC_PTA21_PTA21 0x280A1054, 0X1, 0x00000000, 0x0, 0x280A1054
256 #define IOMUXC_PTA21_FXIO0_D13 0x280A1054, 0X2, 0x00000000, 0x0, 0x280A1054
257 #define IOMUXC_PTA21_LPSPI0_SOUT 0x280A1054, 0X3, 0x280A18B8, 0X2, 0x280A1054
258 #define IOMUXC_PTA21_LPUART1_RTS_B 0x280A1054, 0X4, 0x00000000, 0x0, 0x280A1054
259 #define IOMUXC_PTA21_LPI2C1_SDA 0x280A1054, 0X5, 0x280A198C, 0X3, 0x280A1054
260 #define IOMUXC_PTA21_TPM1_CH1 0x280A1054, 0X6, 0x280A1960, 0X2, 0x280A1054
261 #define IOMUXC_PTA21_I2S1_RXD3 0x280A1054, 0X7, 0x280A19D4, 0X1, 0x280A1054
262 #define IOMUXC_PTA21_MQS0_RIGHT 0x280A1054, 0X8, 0x00000000, 0x0, 0x280A1054
263 #define IOMUXC_PTA21_JTAG0_TDO 0x280A1054, 0XA, 0x00000000, 0x0, 0x280A1054
264 #define IOMUXC_PTA22_PTA22 0x280A1058, 0X1, 0x00000000, 0x0, 0x280A1058
265 #define IOMUXC_PTA22_FXIO0_D14 0x280A1058, 0X2, 0x00000000, 0x0, 0x280A1058
266 #define IOMUXC_PTA22_LPSPI0_SCK 0x280A1058, 0X3, 0x280A18B0, 0X2, 0x280A1058
267 #define IOMUXC_PTA22_LPUART1_TX 0x280A1058, 0X4, 0x280A19A4, 0X3, 0x280A1058
268 #define IOMUXC_PTA22_I3C0_SCL 0x280A1058, 0X5, 0x280A1898, 0X3, 0x280A1058
269 #define IOMUXC_PTA22_MQS0_LEFT 0x280A1058, 0X8, 0x00000000, 0x0, 0x280A1058
270 #define IOMUXC_PTA22_JTAG0_TDI 0x280A1058, 0XA, 0x00000000, 0x0, 0x280A1058
271 #define IOMUXC_PTA23_PTA23 0x280A105C, 0X1, 0x00000000, 0x0, 0x280A105C
272 #define IOMUXC_PTA23_FXIO0_D15 0x280A105C, 0X2, 0x00000000, 0x0, 0x280A105C
273 #define IOMUXC_PTA23_LPSPI0_PCS0 0x280A105C, 0X3, 0x280A18A0, 0X2, 0x280A105C
274 #define IOMUXC_PTA23_LPUART1_RX 0x280A105C, 0X4, 0x280A19A0, 0X3, 0x280A105C
275 #define IOMUXC_PTA23_I3C0_SDA 0x280A105C, 0X5, 0x280A189C, 0X3, 0x280A105C
276 #define IOMUXC_PTA23_MQS0_RIGHT 0x280A105C, 0X8, 0x00000000, 0x0, 0x280A105C
277 #define IOMUXC_PTA23_JTAG0_TCLK_SWD0_CLK 0x280A105C, 0XA, 0x00000000, 0x0, 0x280A105C
278 #define IOMUXC_PTA24_ADC1_CH5B 0x280A1060, 0X0, 0x00000000, 0x0, 0x280A1060
279 #define IOMUXC_PTA24_PTA24 0x280A1060, 0X1, 0x00000000, 0x0, 0x280A1060
280 #define IOMUXC_PTA24_I3C0_PUR 0x280A1060, 0X5, 0x00000000, 0x0, 0x280A1060
281 #define IOMUXC_PTA24_EXT_AUD_MCLK0 0x280A1060, 0X8, 0x280A180C, 0X3, 0x280A1060
282 #define IOMUXC_PTA24_WDOG2_RST 0x280A1060, 0XA, 0x00000000, 0x0, 0x280A1060
283 #define IOMUXC_PTA24_LPTMR1_ALT1 0x280A1060, 0XC, 0x280A1934, 0X2, 0x280A1060
284 #define IOMUXC_PTA24_WUU0_P16 0x280A1060, 0XD, 0x00000000, 0x0, 0x280A1060
285 #define IOMUXC_PTB0_ADC0_CH0A 0x280A1080, 0X0, 0x00000000, 0x0, 0x280A1080
286 #define IOMUXC_PTB0_PTB0 0x280A1080, 0X1, 0x00000000, 0x0, 0x280A1080
287 #define IOMUXC_PTB0_FXIO0_D16 0x280A1080, 0X2, 0x00000000, 0x0, 0x280A1080
288 #define IOMUXC_PTB0_LPSPI2_PCS1 0x280A1080, 0X3, 0x280A1A60, 0X1, 0x280A1080
289 #define IOMUXC_PTB0_LPUART2_CTS_B 0x280A1080, 0X4, 0x280A1A44, 0X1, 0x280A1080
290 #define IOMUXC_PTB0_LPI2C2_SCL 0x280A1080, 0X5, 0x280A1A28, 0X1, 0x280A1080
291 #define IOMUXC_PTB0_TPM2_CLKIN 0x280A1080, 0X6, 0x280A1A04, 0X1, 0x280A1080
292 #define IOMUXC_PTB0_I2S2_RXD1 0x280A1080, 0X7, 0x00000000, 0x0, 0x280A1080
293 #define IOMUXC_PTB0_MQS0_LEFT 0x280A1080, 0X8, 0x00000000, 0x0, 0x280A1080
294 #define IOMUXC_PTB0_MICFIL0_CLK01 0x280A1080, 0X9, 0x00000000, 0x0, 0x280A1080
295 #define IOMUXC_PTB0_WUU0_P17 0x280A1080, 0XD, 0x00000000, 0x0, 0x280A1080
296 #define IOMUXC_PTB1_ADC0_CH0B 0x280A1084, 0X0, 0x00000000, 0x0, 0x280A1084
297 #define IOMUXC_PTB1_PTB1 0x280A1084, 0X1, 0x00000000, 0x0, 0x280A1084
298 #define IOMUXC_PTB1_FXIO0_D17 0x280A1084, 0X2, 0x00000000, 0x0, 0x280A1084
299 #define IOMUXC_PTB1_LPSPI2_PCS2 0x280A1084, 0X3, 0x280A1A64, 0X1, 0x280A1084
300 #define IOMUXC_PTB1_LPUART2_RTS_B 0x280A1084, 0X4, 0x00000000, 0x0, 0x280A1084
301 #define IOMUXC_PTB1_LPI2C2_SDA 0x280A1084, 0X5, 0x280A1A2C, 0X1, 0x280A1084
302 #define IOMUXC_PTB1_TPM2_CH0 0x280A1084, 0X6, 0x280A19EC, 0X1, 0x280A1084
303 #define IOMUXC_PTB1_I2S2_RX_BCLK 0x280A1084, 0X7, 0x00000000, 0x0, 0x280A1084
304 #define IOMUXC_PTB1_MICFIL0_DATA01 0x280A1084, 0X9, 0x280A1AD4, 0X1, 0x280A1084
305 #define IOMUXC_PTB1_WDOG2_RST 0x280A1084, 0XA, 0x00000000, 0x0, 0x280A1084
306 #define IOMUXC_PTB1_WUU0_P18 0x280A1084, 0XD, 0x00000000, 0x0, 0x280A1084
307 #define IOMUXC_PTB2_ADC0_CH1A 0x280A1088, 0X0, 0x00000000, 0x0, 0x280A1088
308 #define IOMUXC_PTB2_PTB2 0x280A1088, 0X1, 0x00000000, 0x0, 0x280A1088
309 #define IOMUXC_PTB2_FXIO0_D18 0x280A1088, 0X2, 0x00000000, 0x0, 0x280A1088
310 #define IOMUXC_PTB2_LPSPI2_PCS3 0x280A1088, 0X3, 0x280A1A68, 0X1, 0x280A1088
311 #define IOMUXC_PTB2_LPUART2_TX 0x280A1088, 0X4, 0x280A1A4C, 0X1, 0x280A1088
312 #define IOMUXC_PTB2_LPI2C2_HREQ 0x280A1088, 0X5, 0x280A1A24, 0X1, 0x280A1088
313 #define IOMUXC_PTB2_TPM2_CH1 0x280A1088, 0X6, 0x280A19F0, 0X1, 0x280A1088
314 #define IOMUXC_PTB2_I2S2_RX_FS 0x280A1088, 0X7, 0x00000000, 0x0, 0x280A1088
315 #define IOMUXC_PTB2_MICFIL0_CLK01 0x280A1088, 0X9, 0x00000000, 0x0, 0x280A1088
316 #define IOMUXC_PTB2_LPTMR0_ALT1 0x280A1088, 0XC, 0x280A1928, 0X3, 0x280A1088
317 #define IOMUXC_PTB2_WUU0_P19 0x280A1088, 0XD, 0x00000000, 0x0, 0x280A1088
318 #define IOMUXC_PTB3_ADC0_CH1B 0x280A108C, 0X0, 0x00000000, 0x0, 0x280A108C
319 #define IOMUXC_PTB3_PTB3 0x280A108C, 0X1, 0x00000000, 0x0, 0x280A108C
320 #define IOMUXC_PTB3_FXIO0_D19 0x280A108C, 0X2, 0x00000000, 0x0, 0x280A108C
321 #define IOMUXC_PTB3_LPSPI2_SIN 0x280A108C, 0X3, 0x280A1A70, 0X1, 0x280A108C
322 #define IOMUXC_PTB3_LPUART2_RX 0x280A108C, 0X4, 0x280A1A48, 0X1, 0x280A108C
323 #define IOMUXC_PTB3_LPI2C2_HREQ 0x280A108C, 0X5, 0x280A1A24, 0X2, 0x280A108C
324 #define IOMUXC_PTB3_I3C1_PUR 0x280A108C, 0X6, 0x00000000, 0x0, 0x280A108C
325 #define IOMUXC_PTB3_I2S2_RXD0 0x280A108C, 0X7, 0x00000000, 0x0, 0x280A108C
326 #define IOMUXC_PTB3_MICFIL0_DATA23 0x280A108C, 0X9, 0x280A1AD8, 0X1, 0x280A108C
327 #define IOMUXC_PTB3_LPTMR0_ALT2 0x280A108C, 0XC, 0x280A192C, 0X3, 0x280A108C
328 #define IOMUXC_PTB3_WUU0_P20 0x280A108C, 0XD, 0x00000000, 0x0, 0x280A108C
329 #define IOMUXC_PTB4_ADC0_CH2A 0x280A1090, 0X0, 0x00000000, 0x0, 0x280A1090
330 #define IOMUXC_PTB4_PTB4 0x280A1090, 0X1, 0x00000000, 0x0, 0x280A1090
331 #define IOMUXC_PTB4_FXIO0_D20 0x280A1090, 0X2, 0x00000000, 0x0, 0x280A1090
332 #define IOMUXC_PTB4_LPSPI2_SOUT 0x280A1090, 0X3, 0x280A1A74, 0X1, 0x280A1090
333 #define IOMUXC_PTB4_LPUART2_CTS_B 0x280A1090, 0X4, 0x280A1A44, 0X2, 0x280A1090
334 #define IOMUXC_PTB4_LPI2C2_SCL 0x280A1090, 0X5, 0x280A1A28, 0X2, 0x280A1090
335 #define IOMUXC_PTB4_I2S2_TX_BCLK 0x280A1090, 0X7, 0x00000000, 0x0, 0x280A1090
336 #define IOMUXC_PTB4_MICFIL0_CLK01 0x280A1090, 0X9, 0x00000000, 0x0, 0x280A1090
337 #define IOMUXC_PTB4_WDOG0_RST 0x280A1090, 0XA, 0x00000000, 0x0, 0x280A1090
338 #define IOMUXC_PTB4_LPTMR0_ALT3 0x280A1090, 0XC, 0x280A1930, 0X3, 0x280A1090
339 #define IOMUXC_PTB4_WUU0_P21 0x280A1090, 0XD, 0x00000000, 0x0, 0x280A1090
340 #define IOMUXC_PTB5_ADC0_CH2B 0x280A1094, 0X0, 0x00000000, 0x0, 0x280A1094
341 #define IOMUXC_PTB5_PTB5 0x280A1094, 0X1, 0x00000000, 0x0, 0x280A1094
342 #define IOMUXC_PTB5_FXIO0_D21 0x280A1094, 0X2, 0x00000000, 0x0, 0x280A1094
343 #define IOMUXC_PTB5_LPSPI2_SCK 0x280A1094, 0X3, 0x280A1A6C, 0X1, 0x280A1094
344 #define IOMUXC_PTB5_LPUART2_RTS_B 0x280A1094, 0X4, 0x00000000, 0x0, 0x280A1094
345 #define IOMUXC_PTB5_LPI2C2_SDA 0x280A1094, 0X5, 0x280A1A2C, 0X2, 0x280A1094
346 #define IOMUXC_PTB5_I2S2_TX_FS 0x280A1094, 0X7, 0x00000000, 0x0, 0x280A1094
347 #define IOMUXC_PTB5_MICFIL0_DATA45 0x280A1094, 0X9, 0x280A1ADC, 0X1, 0x280A1094
348 #define IOMUXC_PTB5_WDOG1_RST 0x280A1094, 0XA, 0x00000000, 0x0, 0x280A1094
349 #define IOMUXC_PTB5_WUU0_P22 0x280A1094, 0XD, 0x00000000, 0x0, 0x280A1094
350 #define IOMUXC_PTB6_ADC0_CH3A 0x280A1098, 0X0, 0x00000000, 0x0, 0x280A1098
351 #define IOMUXC_PTB6_PTB6 0x280A1098, 0X1, 0x00000000, 0x0, 0x280A1098
352 #define IOMUXC_PTB6_FXIO0_D22 0x280A1098, 0X2, 0x00000000, 0x0, 0x280A1098
353 #define IOMUXC_PTB6_LPSPI2_PCS0 0x280A1098, 0X3, 0x280A1A5C, 0X1, 0x280A1098
354 #define IOMUXC_PTB6_LPUART2_TX 0x280A1098, 0X4, 0x280A1A4C, 0X2, 0x280A1098
355 #define IOMUXC_PTB6_I3C1_SCL 0x280A1098, 0X5, 0x280A1A3C, 0X1, 0x280A1098
356 #define IOMUXC_PTB6_I2S2_TXD0 0x280A1098, 0X7, 0x00000000, 0x0, 0x280A1098
357 #define IOMUXC_PTB6_MICFIL0_CLK01 0x280A1098, 0X9, 0x00000000, 0x0, 0x280A1098
358 #define IOMUXC_PTB6_WUU0_P23 0x280A1098, 0XD, 0x00000000, 0x0, 0x280A1098
359 #define IOMUXC_PTB7_ADC0_CH3B 0x280A109C, 0X0, 0x00000000, 0x0, 0x280A109C
360 #define IOMUXC_PTB7_PTB7 0x280A109C, 0X1, 0x00000000, 0x0, 0x280A109C
361 #define IOMUXC_PTB7_FXIO0_D23 0x280A109C, 0X2, 0x00000000, 0x0, 0x280A109C
362 #define IOMUXC_PTB7_LPSPI3_PCS1 0x280A109C, 0X3, 0x280A1A7C, 0X1, 0x280A109C
363 #define IOMUXC_PTB7_LPUART2_RX 0x280A109C, 0X4, 0x280A1A48, 0X2, 0x280A109C
364 #define IOMUXC_PTB7_I3C1_SDA 0x280A109C, 0X5, 0x280A1A40, 0X1, 0x280A109C
365 #define IOMUXC_PTB7_TPM3_CLKIN 0x280A109C, 0X6, 0x280A1A20, 0X1, 0x280A109C
366 #define IOMUXC_PTB7_I2S2_MCLK 0x280A109C, 0X7, 0x00000000, 0x0, 0x280A109C
367 #define IOMUXC_PTB7_EXT_AUD_MCLK1 0x280A109C, 0X8, 0x280A1810, 0X1, 0x280A109C
368 #define IOMUXC_PTB7_MICFIL0_DATA67 0x280A109C, 0X9, 0x280A1AE0, 0X1, 0x280A109C
369 #define IOMUXC_PTB7_PMIC0_MODE2 0x280A109C, 0XA, 0x00000000, 0x0, 0x280A109C
370 #define IOMUXC_PTB8_ADC0_CH4A 0x280A10A0, 0X0, 0x00000000, 0x0, 0x280A10A0
371 #define IOMUXC_PTB8_PTB8 0x280A10A0, 0X1, 0x00000000, 0x0, 0x280A10A0
372 #define IOMUXC_PTB8_FXIO0_D24 0x280A10A0, 0X2, 0x00000000, 0x0, 0x280A10A0
373 #define IOMUXC_PTB8_LPSPI3_PCS2 0x280A10A0, 0X3, 0x280A1A80, 0X1, 0x280A10A0
374 #define IOMUXC_PTB8_LPUART3_CTS_B 0x280A10A0, 0X4, 0x280A1A50, 0X1, 0x280A10A0
375 #define IOMUXC_PTB8_LPI2C3_SCL 0x280A10A0, 0X5, 0x280A1A34, 0X1, 0x280A10A0
376 #define IOMUXC_PTB8_TPM3_CH0 0x280A10A0, 0X6, 0x280A1A08, 0X1, 0x280A10A0
377 #define IOMUXC_PTB8_I2S2_TXD1 0x280A10A0, 0X7, 0x00000000, 0x0, 0x280A10A0
378 #define IOMUXC_PTB8_MQS0_RIGHT 0x280A10A0, 0X8, 0x00000000, 0x0, 0x280A10A0
379 #define IOMUXC_PTB8_MICFIL0_CLK01 0x280A10A0, 0X9, 0x00000000, 0x0, 0x280A10A0
380 #define IOMUXC_PTB8_PMIC0_MODE1 0x280A10A0, 0XA, 0x00000000, 0x0, 0x280A10A0
381 #define IOMUXC_PTB9_ADC0_CH4B 0x280A10A4, 0X0, 0x00000000, 0x0, 0x280A10A4
382 #define IOMUXC_PTB9_PTB9 0x280A10A4, 0X1, 0x00000000, 0x0, 0x280A10A4
383 #define IOMUXC_PTB9_FXIO0_D25 0x280A10A4, 0X2, 0x00000000, 0x0, 0x280A10A4
384 #define IOMUXC_PTB9_LPSPI3_PCS3 0x280A10A4, 0X3, 0x280A1A84, 0X1, 0x280A10A4
385 #define IOMUXC_PTB9_LPUART3_RTS_B 0x280A10A4, 0X4, 0x00000000, 0x0, 0x280A10A4
386 #define IOMUXC_PTB9_LPI2C3_SDA 0x280A10A4, 0X5, 0x280A1A38, 0X1, 0x280A10A4
387 #define IOMUXC_PTB9_TPM3_CH1 0x280A10A4, 0X6, 0x280A1A0C, 0X1, 0x280A10A4
388 #define IOMUXC_PTB9_I2S3_TX_BCLK 0x280A10A4, 0X7, 0x00000000, 0x0, 0x280A10A4
389 #define IOMUXC_PTB9_MICFIL0_DATA01 0x280A10A4, 0X9, 0x280A1AD4, 0X2, 0x280A10A4
390 #define IOMUXC_PTB9_PMIC0_MODE0 0x280A10A4, 0XA, 0x00000000, 0x0, 0x280A10A4
391 #define IOMUXC_PTB10_ADC0_CH5A 0x280A10A8, 0X0, 0x00000000, 0x0, 0x280A10A8
392 #define IOMUXC_PTB10_PTB10 0x280A10A8, 0X1, 0x00000000, 0x0, 0x280A10A8
393 #define IOMUXC_PTB10_FXIO0_D26 0x280A10A8, 0X2, 0x00000000, 0x0, 0x280A10A8
394 #define IOMUXC_PTB10_LPSPI3_SIN 0x280A10A8, 0X3, 0x280A1A8C, 0X1, 0x280A10A8
395 #define IOMUXC_PTB10_LPUART3_RX 0x280A10A8, 0X4, 0x280A1A54, 0X1, 0x280A10A8
396 #define IOMUXC_PTB10_LPI2C3_HREQ 0x280A10A8, 0X5, 0x00000000, 0x0, 0x280A10A8
397 #define IOMUXC_PTB10_TPM3_CH2 0x280A10A8, 0X6, 0x280A1A10, 0X1, 0x280A10A8
398 #define IOMUXC_PTB10_I2S3_TX_FS 0x280A10A8, 0X7, 0x00000000, 0x0, 0x280A10A8
399 #define IOMUXC_PTB10_MICFIL0_CLK01 0x280A10A8, 0X9, 0x00000000, 0x0, 0x280A10A8
400 #define IOMUXC_PTB10_PMIC0_SDA 0x280A10A8, 0XA, 0x280A1804, 0X2, 0x280A10A8
401 #define IOMUXC_PTB11_ADC0_CH5B 0x280A10AC, 0X0, 0x00000000, 0x0, 0x280A10AC
402 #define IOMUXC_PTB11_PTB11 0x280A10AC, 0X1, 0x00000000, 0x0, 0x280A10AC
403 #define IOMUXC_PTB11_FXIO0_D27 0x280A10AC, 0X2, 0x00000000, 0x0, 0x280A10AC
404 #define IOMUXC_PTB11_LPSPI3_SOUT 0x280A10AC, 0X3, 0x280A1A90, 0X1, 0x280A10AC
405 #define IOMUXC_PTB11_LPUART3_TX 0x280A10AC, 0X4, 0x280A1A58, 0X1, 0x280A10AC
406 #define IOMUXC_PTB11_LPI2C3_SDA 0x280A10AC, 0X5, 0x280A1A38, 0X2, 0x280A10AC
407 #define IOMUXC_PTB11_TPM3_CH3 0x280A10AC, 0X6, 0x280A1A14, 0X1, 0x280A10AC
408 #define IOMUXC_PTB11_I2S3_TXD0 0x280A10AC, 0X7, 0x00000000, 0x0, 0x280A10AC
409 #define IOMUXC_PTB11_MICFIL0_DATA23 0x280A10AC, 0X9, 0x280A1AD8, 0X2, 0x280A10AC
410 #define IOMUXC_PTB11_PMIC0_SCL 0x280A10AC, 0XA, 0x280A1800, 0X2, 0x280A10AC
411 #define IOMUXC_PTB12_CMP1_IN0 0x280A10B0, 0X0, 0x00000000, 0x0, 0x280A10B0
412 #define IOMUXC_PTB12_PTB12 0x280A10B0, 0X1, 0x00000000, 0x0, 0x280A10B0
413 #define IOMUXC_PTB12_FXIO0_D28 0x280A10B0, 0X2, 0x00000000, 0x0, 0x280A10B0
414 #define IOMUXC_PTB12_LPSPI3_SCK 0x280A10B0, 0X3, 0x280A1A88, 0X1, 0x280A10B0
415 #define IOMUXC_PTB12_LPUART3_CTS_B 0x280A10B0, 0X4, 0x280A1A50, 0X2, 0x280A10B0
416 #define IOMUXC_PTB12_LPI2C3_SCL 0x280A10B0, 0X5, 0x280A1A34, 0X2, 0x280A10B0
417 #define IOMUXC_PTB12_TPM3_CH4 0x280A10B0, 0X6, 0x280A1A18, 0X1, 0x280A10B0
418 #define IOMUXC_PTB12_I2S3_RXD0 0x280A10B0, 0X7, 0x00000000, 0x0, 0x280A10B0
419 #define IOMUXC_PTB12_MICFIL0_CLK01 0x280A10B0, 0X9, 0x00000000, 0x0, 0x280A10B0
420 #define IOMUXC_PTB12_WUU0_P24 0x280A10B0, 0XD, 0x00000000, 0x0, 0x280A10B0
421 #define IOMUXC_PTB13_CMP1_IN1 0x280A10B4, 0X0, 0x00000000, 0x0, 0x280A10B4
422 #define IOMUXC_PTB13_PTB13 0x280A10B4, 0X1, 0x00000000, 0x0, 0x280A10B4
423 #define IOMUXC_PTB13_FXIO0_D29 0x280A10B4, 0X2, 0x00000000, 0x0, 0x280A10B4
424 #define IOMUXC_PTB13_LPSPI3_PCS0 0x280A10B4, 0X3, 0x280A1A78, 0X1, 0x280A10B4
425 #define IOMUXC_PTB13_LPUART3_RTS_B 0x280A10B4, 0X4, 0x00000000, 0x0, 0x280A10B4
426 #define IOMUXC_PTB13_I3C1_SCL 0x280A10B4, 0X5, 0x280A1A3C, 0X2, 0x280A10B4
427 #define IOMUXC_PTB13_TPM3_CH5 0x280A10B4, 0X6, 0x280A1A1C, 0X1, 0x280A10B4
428 #define IOMUXC_PTB13_I2S3_RX_BCLK 0x280A10B4, 0X7, 0x00000000, 0x0, 0x280A10B4
429 #define IOMUXC_PTB13_MICFIL0_DATA45 0x280A10B4, 0X9, 0x280A1ADC, 0X2, 0x280A10B4
430 #define IOMUXC_PTB13_WDOG2_RST 0x280A10B4, 0XA, 0x00000000, 0x0, 0x280A10B4
431 #define IOMUXC_PTB13_LPTMR1_ALT3 0x280A10B4, 0XC, 0x280A193C, 0X2, 0x280A10B4
432 #define IOMUXC_PTB13_WUU0_P25 0x280A10B4, 0XD, 0x00000000, 0x0, 0x280A10B4
433 #define IOMUXC_PTB14_CMP0_IN0 0x280A10B8, 0X0, 0x00000000, 0x0, 0x280A10B8
434 #define IOMUXC_PTB14_PTB14 0x280A10B8, 0X1, 0x00000000, 0x0, 0x280A10B8
435 #define IOMUXC_PTB14_FXIO0_D30 0x280A10B8, 0X2, 0x00000000, 0x0, 0x280A10B8
436 #define IOMUXC_PTB14_LPUART3_TX 0x280A10B8, 0X4, 0x280A1A58, 0X2, 0x280A10B8
437 #define IOMUXC_PTB14_I3C1_SDA 0x280A10B8, 0X5, 0x280A1A40, 0X2, 0x280A10B8
438 #define IOMUXC_PTB14_I2S3_RX_FS 0x280A10B8, 0X7, 0x00000000, 0x0, 0x280A10B8
439 #define IOMUXC_PTB14_MICFIL0_CLK01 0x280A10B8, 0X9, 0x00000000, 0x0, 0x280A10B8
440 #define IOMUXC_PTB14_LPTMR1_ALT2 0x280A10B8, 0XC, 0x280A1938, 0X2, 0x280A10B8
441 #define IOMUXC_PTB14_WUU0_P26 0x280A10B8, 0XD, 0x00000000, 0x0, 0x280A10B8
442 #define IOMUXC_PTB15_CMP0_IN1 0x280A10BC, 0X0, 0x00000000, 0x0, 0x280A10BC
443 #define IOMUXC_PTB15_PTB15 0x280A10BC, 0X1, 0x00000000, 0x0, 0x280A10BC
444 #define IOMUXC_PTB15_FXIO0_D31 0x280A10BC, 0X2, 0x00000000, 0x0, 0x280A10BC
445 #define IOMUXC_PTB15_LPUART3_RX 0x280A10BC, 0X4, 0x280A1A54, 0X2, 0x280A10BC
446 #define IOMUXC_PTB15_I3C1_PUR 0x280A10BC, 0X5, 0x00000000, 0x0, 0x280A10BC
447 #define IOMUXC_PTB15_I2S3_MCLK 0x280A10BC, 0X7, 0x00000000, 0x0, 0x280A10BC
448 #define IOMUXC_PTB15_EXT_AUD_MCLK1 0x280A10BC, 0X8, 0x280A1810, 0X2, 0x280A10BC
449 #define IOMUXC_PTB15_MICFIL0_DATA67 0x280A10BC, 0X9, 0x280A1AE0, 0X2, 0x280A10BC
450 #define IOMUXC_PTB15_LPTMR1_ALT1 0x280A10BC, 0XC, 0x280A1934, 0X3, 0x280A10BC
451 #define IOMUXC_PTB15_WUU0_P27 0x280A10BC, 0XD, 0x00000000, 0x0, 0x280A10BC
452 #define IOMUXC_PTC0_PTC0 0x280A1100, 0X1, 0x00000000, 0x0, 0x280A1100
453 #define IOMUXC_PTC0_LPSPI2_SIN 0x280A1100, 0X3, 0x280A1A70, 0X2, 0x280A1100
454 #define IOMUXC_PTC0_FLEXSPI1_B_DQS 0x280A1100, 0X4, 0x00000000, 0x0, 0x280A1100
455 #define IOMUXC_PTC0_TPM2_CLKIN 0x280A1100, 0X6, 0x280A1A04, 0X2, 0x280A1100
456 #define IOMUXC_PTC0_I2S3_RXD1 0x280A1100, 0X7, 0x00000000, 0x0, 0x280A1100
457 #define IOMUXC_PTC0_FLEXSPI0_A_DQS 0x280A1100, 0X8, 0x00000000, 0x0, 0x280A1100
458 #define IOMUXC_PTC0_MQS0_LEFT 0x280A1100, 0X9, 0x00000000, 0x0, 0x280A1100
459 #define IOMUXC_PTC0_LP_RTD_DBG_MUX_0 0x280A1100, 0XF, 0x00000000, 0x0, 0x280A1100
460 #define IOMUXC_PTC1_PTC1 0x280A1104, 0X1, 0x00000000, 0x0, 0x280A1104
461 #define IOMUXC_PTC1_LPSPI2_SOUT 0x280A1104, 0X3, 0x280A1A74, 0X2, 0x280A1104
462 #define IOMUXC_PTC1_FLEXSPI1_B_DATA7 0x280A1104, 0X4, 0x00000000, 0x0, 0x280A1104
463 #define IOMUXC_PTC1_TPM2_CH0 0x280A1104, 0X6, 0x280A19EC, 0X2, 0x280A1104
464 #define IOMUXC_PTC1_I2S3_TXD1 0x280A1104, 0X7, 0x00000000, 0x0, 0x280A1104
465 #define IOMUXC_PTC1_FLEXSPI0_A_DATA7 0x280A1104, 0X8, 0x00000000, 0x0, 0x280A1104
466 #define IOMUXC_PTC1_MQS0_RIGHT 0x280A1104, 0X9, 0x00000000, 0x0, 0x280A1104
467 #define IOMUXC_PTC1_LP_RTD_DBG_MUX_1 0x280A1104, 0XF, 0x00000000, 0x0, 0x280A1104
468 #define IOMUXC_PTC2_PTC2 0x280A1108, 0X1, 0x00000000, 0x0, 0x280A1108
469 #define IOMUXC_PTC2_LPSPI2_SCK 0x280A1108, 0X3, 0x280A1A6C, 0X2, 0x280A1108
470 #define IOMUXC_PTC2_FLEXSPI1_B_DATA6 0x280A1108, 0X4, 0x00000000, 0x0, 0x280A1108
471 #define IOMUXC_PTC2_TPM2_CH1 0x280A1108, 0X6, 0x280A19F0, 0X2, 0x280A1108
472 #define IOMUXC_PTC2_I2S0_RX_BCLK 0x280A1108, 0X7, 0x280A19B8, 0X2, 0x280A1108
473 #define IOMUXC_PTC2_FLEXSPI0_A_DATA6 0x280A1108, 0X8, 0x00000000, 0x0, 0x280A1108
474 #define IOMUXC_PTC2_LP_RTD_DBG_MUX_2 0x280A1108, 0XF, 0x00000000, 0x0, 0x280A1108
475 #define IOMUXC_PTC3_PTC3 0x280A110C, 0X1, 0x00000000, 0x0, 0x280A110C
476 #define IOMUXC_PTC3_LPSPI2_PCS0 0x280A110C, 0X3, 0x280A1A5C, 0X2, 0x280A110C
477 #define IOMUXC_PTC3_FLEXSPI1_B_DATA5 0x280A110C, 0X4, 0x00000000, 0x0, 0x280A110C
478 #define IOMUXC_PTC3_I2S0_RX_FS 0x280A110C, 0X7, 0x280A19BC, 0X2, 0x280A110C
479 #define IOMUXC_PTC3_FLEXSPI0_A_DATA5 0x280A110C, 0X8, 0x00000000, 0x0, 0x280A110C
480 #define IOMUXC_PTC3_LP_RTD_DBG_MUX_3 0x280A110C, 0XF, 0x00000000, 0x0, 0x280A110C
481 #define IOMUXC_PTC4_PTC4 0x280A1110, 0X1, 0x00000000, 0x0, 0x280A1110
482 #define IOMUXC_PTC4_LPSPI2_PCS1 0x280A1110, 0X3, 0x280A1A60, 0X2, 0x280A1110
483 #define IOMUXC_PTC4_FLEXSPI1_B_DATA4 0x280A1110, 0X4, 0x00000000, 0x0, 0x280A1110
484 #define IOMUXC_PTC4_I2S0_RXD0 0x280A1110, 0X7, 0x280A19A8, 0X2, 0x280A1110
485 #define IOMUXC_PTC4_FLEXSPI0_A_DATA4 0x280A1110, 0X8, 0x00000000, 0x0, 0x280A1110
486 #define IOMUXC_PTC4_LP_RTD_DBG_MUX_4 0x280A1110, 0XF, 0x00000000, 0x0, 0x280A1110
487 #define IOMUXC_PTC5_PTC5 0x280A1114, 0X1, 0x00000000, 0x0, 0x280A1114
488 #define IOMUXC_PTC5_LPSPI2_PCS2 0x280A1114, 0X3, 0x280A1A64, 0X2, 0x280A1114
489 #define IOMUXC_PTC5_FLEXSPI1_B_SS0_B 0x280A1114, 0X4, 0x00000000, 0x0, 0x280A1114
490 #define IOMUXC_PTC5_FLEXSPI1_B_SCLK_B 0x280A1114, 0X5, 0x00000000, 0x0, 0x280A1114
491 #define IOMUXC_PTC5_FLEXSPI1_A_SS0_B 0x280A1114, 0X6, 0x00000000, 0x0, 0x280A1114
492 #define IOMUXC_PTC5_I2S0_RXD1 0x280A1114, 0X7, 0x280A19AC, 0X2, 0x280A1114
493 #define IOMUXC_PTC5_FLEXSPI0_A_SS0_B 0x280A1114, 0X8, 0x00000000, 0x0, 0x280A1114
494 #define IOMUXC_PTC5_FLEXSPI0_A_SCLK_B 0x280A1114, 0X9, 0x00000000, 0x0, 0x280A1114
495 #define IOMUXC_PTC5_LP_RTD_DBG_MUX_5 0x280A1114, 0XF, 0x00000000, 0x0, 0x280A1114
496 #define IOMUXC_PTC6_PTC6 0x280A1118, 0X1, 0x00000000, 0x0, 0x280A1118
497 #define IOMUXC_PTC6_LPSPI2_PCS3 0x280A1118, 0X3, 0x280A1A68, 0X2, 0x280A1118
498 #define IOMUXC_PTC6_FLEXSPI1_B_SCLK 0x280A1118, 0X4, 0x00000000, 0x0, 0x280A1118
499 #define IOMUXC_PTC6_FLEXSPI1_A_SCLK 0x280A1118, 0X6, 0x280A18FC, 0X1, 0x280A1118
500 #define IOMUXC_PTC6_I2S0_TXD1 0x280A1118, 0X7, 0x00000000, 0x0, 0x280A1118
501 #define IOMUXC_PTC6_FLEXSPI0_A_SCLK 0x280A1118, 0X8, 0x00000000, 0x0, 0x280A1118
502 #define IOMUXC_PTC6_LP_RTD_DBG_MUX_6 0x280A1118, 0XF, 0x00000000, 0x0, 0x280A1118
503 #define IOMUXC_PTC7_PTC7 0x280A111C, 0X1, 0x00000000, 0x0, 0x280A111C
504 #define IOMUXC_PTC7_FLEXSPI1_B_DATA3 0x280A111C, 0X4, 0x00000000, 0x0, 0x280A111C
505 #define IOMUXC_PTC7_I2S0_TXD0 0x280A111C, 0X7, 0x00000000, 0x0, 0x280A111C
506 #define IOMUXC_PTC7_FLEXSPI0_A_DATA3 0x280A111C, 0X8, 0x00000000, 0x0, 0x280A111C
507 #define IOMUXC_PTC7_LP_RTD_DBG_MUX_7 0x280A111C, 0XF, 0x00000000, 0x0, 0x280A111C
508 #define IOMUXC_PTC8_PTC8 0x280A1120, 0X1, 0x00000000, 0x0, 0x280A1120
509 #define IOMUXC_PTC8_FLEXSPI1_B_DATA2 0x280A1120, 0X4, 0x00000000, 0x0, 0x280A1120
510 #define IOMUXC_PTC8_I2S0_TX_BCLK 0x280A1120, 0X7, 0x280A19C0, 0X2, 0x280A1120
511 #define IOMUXC_PTC8_FLEXSPI0_A_DATA2 0x280A1120, 0X8, 0x00000000, 0x0, 0x280A1120
512 #define IOMUXC_PTC8_LP_RTD_DBG_MUX_8 0x280A1120, 0XF, 0x00000000, 0x0, 0x280A1120
513 #define IOMUXC_PTC9_PTC9 0x280A1124, 0X1, 0x00000000, 0x0, 0x280A1124
514 #define IOMUXC_PTC9_FLEXSPI1_B_DATA1 0x280A1124, 0X4, 0x00000000, 0x0, 0x280A1124
515 #define IOMUXC_PTC9_I2S0_TX_FS 0x280A1124, 0X7, 0x280A19C4, 0X2, 0x280A1124
516 #define IOMUXC_PTC9_FLEXSPI0_A_DATA1 0x280A1124, 0X8, 0x00000000, 0x0, 0x280A1124
517 #define IOMUXC_PTC9_LP_RTD_DBG_MUX_9 0x280A1124, 0XF, 0x00000000, 0x0, 0x280A1124
518 #define IOMUXC_PTC10_PTC10 0x280A1128, 0X1, 0x00000000, 0x0, 0x280A1128
519 #define IOMUXC_PTC10_FLEXSPI1_B_DATA0 0x280A1128, 0X4, 0x00000000, 0x0, 0x280A1128
520 #define IOMUXC_PTC10_I2S0_MCLK 0x280A1128, 0X7, 0x00000000, 0x0, 0x280A1128
521 #define IOMUXC_PTC10_FLEXSPI0_A_DATA0 0x280A1128, 0X8, 0x00000000, 0x0, 0x280A1128
522 #define IOMUXC_PTC10_EXT_AUD_MCLK1 0x280A1128, 0X9, 0x280A1810, 0X3, 0x280A1128
523 #define IOMUXC_PTC10_LP_RTD_DBG_MUX_10 0x280A1128, 0XF, 0x00000000, 0x0, 0x280A1128
524 #define IOMUXC_PTC11_PTC11 0x280A112C, 0X1, 0x00000000, 0x0, 0x280A112C
525 #define IOMUXC_PTC11_FLEXSPI1_B_SS0_B 0x280A112C, 0X4, 0x00000000, 0x0, 0x280A112C
526 #define IOMUXC_PTC11_FLEXSPI1_B_SS1_B 0x280A112C, 0X5, 0x00000000, 0x0, 0x280A112C
527 #define IOMUXC_PTC11_TPM3_CLKIN 0x280A112C, 0X6, 0x280A1A20, 0X2, 0x280A112C
528 #define IOMUXC_PTC11_I2S1_RXD3 0x280A112C, 0X7, 0x280A19D4, 0X2, 0x280A112C
529 #define IOMUXC_PTC11_FLEXSPI0_A_SS0_B 0x280A112C, 0X8, 0x00000000, 0x0, 0x280A112C
530 #define IOMUXC_PTC11_FLEXSPI0_A_SS1_B 0x280A112C, 0X9, 0x00000000, 0x0, 0x280A112C
531 #define IOMUXC_PTC11_CLKOUT0 0x280A112C, 0XA, 0x00000000, 0x0, 0x280A112C
532 #define IOMUXC_PTC11_LP_RTD_DBG_MUX_11 0x280A112C, 0XF, 0x00000000, 0x0, 0x280A112C
533 #define IOMUXC_PTC12_PTC12 0x280A1130, 0X1, 0x00000000, 0x0, 0x280A1130
534 #define IOMUXC_PTC12_FLEXSPI1_A_DQS 0x280A1130, 0X4, 0x00000000, 0x0, 0x280A1130
535 #define IOMUXC_PTC12_TPM3_CH0 0x280A1130, 0X6, 0x280A1A08, 0X2, 0x280A1130
536 #define IOMUXC_PTC12_I2S1_RXD2 0x280A1130, 0X7, 0x280A19D0, 0X2, 0x280A1130
537 #define IOMUXC_PTC12_FLEXSPI0_B_DQS 0x280A1130, 0X8, 0x00000000, 0x0, 0x280A1130
538 #define IOMUXC_PTC12_TRACE0_CLKOUT 0x280A1130, 0XA, 0x00000000, 0x0, 0x280A1130
539 #define IOMUXC_PTC12_LP_RTD_DBG_MUX_12 0x280A1130, 0XF, 0x00000000, 0x0, 0x280A1130
540 #define IOMUXC_PTC13_PTC13 0x280A1134, 0X1, 0x00000000, 0x0, 0x280A1134
541 #define IOMUXC_PTC13_LPSPI3_SIN 0x280A1134, 0X3, 0x280A1A8C, 0X2, 0x280A1134
542 #define IOMUXC_PTC13_FLEXSPI1_A_DATA7 0x280A1134, 0X4, 0x00000000, 0x0, 0x280A1134
543 #define IOMUXC_PTC13_TPM3_CH1 0x280A1134, 0X6, 0x280A1A0C, 0X2, 0x280A1134
544 #define IOMUXC_PTC13_I2S1_TXD3 0x280A1134, 0X7, 0x00000000, 0x0, 0x280A1134
545 #define IOMUXC_PTC13_FLEXSPI0_B_DATA7 0x280A1134, 0X8, 0x00000000, 0x0, 0x280A1134
546 #define IOMUXC_PTC13_TRACE0_D0 0x280A1134, 0XA, 0x00000000, 0x0, 0x280A1134
547 #define IOMUXC_PTC13_LP_RTD_DBG_MUX_13 0x280A1134, 0XF, 0x00000000, 0x0, 0x280A1134
548 #define IOMUXC_PTC14_PTC14 0x280A1138, 0X1, 0x00000000, 0x0, 0x280A1138
549 #define IOMUXC_PTC14_LPSPI3_SOUT 0x280A1138, 0X3, 0x280A1A90, 0X2, 0x280A1138
550 #define IOMUXC_PTC14_FLEXSPI1_A_DATA6 0x280A1138, 0X4, 0x00000000, 0x0, 0x280A1138
551 #define IOMUXC_PTC14_TPM3_CH2 0x280A1138, 0X6, 0x280A1A10, 0X2, 0x280A1138
552 #define IOMUXC_PTC14_I2S1_TXD2 0x280A1138, 0X7, 0x00000000, 0x0, 0x280A1138
553 #define IOMUXC_PTC14_FLEXSPI0_B_DATA6 0x280A1138, 0X8, 0x00000000, 0x0, 0x280A1138
554 #define IOMUXC_PTC14_TRACE0_D1 0x280A1138, 0XA, 0x00000000, 0x0, 0x280A1138
555 #define IOMUXC_PTC14_LP_RTD_DBG_MUX_14 0x280A1138, 0XF, 0x00000000, 0x0, 0x280A1138
556 #define IOMUXC_PTC15_PTC15 0x280A113C, 0X1, 0x00000000, 0x0, 0x280A113C
557 #define IOMUXC_PTC15_LPSPI3_SCK 0x280A113C, 0X3, 0x280A1A88, 0X2, 0x280A113C
558 #define IOMUXC_PTC15_FLEXSPI1_A_DATA5 0x280A113C, 0X4, 0x00000000, 0x0, 0x280A113C
559 #define IOMUXC_PTC15_TPM3_CH3 0x280A113C, 0X6, 0x280A1A14, 0X2, 0x280A113C
560 #define IOMUXC_PTC15_I2S1_RX_BCLK 0x280A113C, 0X7, 0x280A19D8, 0X2, 0x280A113C
561 #define IOMUXC_PTC15_FLEXSPI0_B_DATA5 0x280A113C, 0X8, 0x00000000, 0x0, 0x280A113C
562 #define IOMUXC_PTC15_TRACE0_D2 0x280A113C, 0XA, 0x00000000, 0x0, 0x280A113C
563 #define IOMUXC_PTC15_LP_RTD_DBG_MUX_15 0x280A113C, 0XF, 0x00000000, 0x0, 0x280A113C
564 #define IOMUXC_PTC16_PTC16 0x280A1140, 0X1, 0x00000000, 0x0, 0x280A1140
565 #define IOMUXC_PTC16_LPSPI3_PCS0 0x280A1140, 0X3, 0x280A1A78, 0X2, 0x280A1140
566 #define IOMUXC_PTC16_FLEXSPI1_A_DATA4 0x280A1140, 0X4, 0x00000000, 0x0, 0x280A1140
567 #define IOMUXC_PTC16_TPM3_CH4 0x280A1140, 0X6, 0x280A1A18, 0X2, 0x280A1140
568 #define IOMUXC_PTC16_I2S1_RX_FS 0x280A1140, 0X7, 0x280A19DC, 0X2, 0x280A1140
569 #define IOMUXC_PTC16_FLEXSPI0_B_DATA4 0x280A1140, 0X8, 0x00000000, 0x0, 0x280A1140
570 #define IOMUXC_PTC16_TRACE0_D3 0x280A1140, 0XA, 0x00000000, 0x0, 0x280A1140
571 #define IOMUXC_PTC16_LP_RTD_DBG_MUX_16 0x280A1140, 0XF, 0x00000000, 0x0, 0x280A1140
572 #define IOMUXC_PTC17_PTC17 0x280A1144, 0X1, 0x00000000, 0x0, 0x280A1144
573 #define IOMUXC_PTC17_LPSPI3_PCS1 0x280A1144, 0X3, 0x280A1A7C, 0X2, 0x280A1144
574 #define IOMUXC_PTC17_FLEXSPI1_A_SS0_B 0x280A1144, 0X4, 0x00000000, 0x0, 0x280A1144
575 #define IOMUXC_PTC17_FLEXSPI1_A_SCLK_B 0x280A1144, 0X5, 0x00000000, 0x0, 0x280A1144
576 #define IOMUXC_PTC17_TPM3_CH5 0x280A1144, 0X6, 0x280A1A1C, 0X2, 0x280A1144
577 #define IOMUXC_PTC17_I2S1_RXD0 0x280A1144, 0X7, 0x280A19C8, 0X2, 0x280A1144
578 #define IOMUXC_PTC17_FLEXSPI0_B_SS0_B 0x280A1144, 0X8, 0x00000000, 0x0, 0x280A1144
579 #define IOMUXC_PTC17_FLEXSPI0_B_SCLK_B 0x280A1144, 0X9, 0x00000000, 0x0, 0x280A1144
580 #define IOMUXC_PTC17_LP_RTD_DBG_MUX_17 0x280A1144, 0XF, 0x00000000, 0x0, 0x280A1144
581 #define IOMUXC_PTC18_PTC18 0x280A1148, 0X1, 0x00000000, 0x0, 0x280A1148
582 #define IOMUXC_PTC18_LPSPI3_PCS2 0x280A1148, 0X3, 0x280A1A80, 0X2, 0x280A1148
583 #define IOMUXC_PTC18_FLEXSPI1_A_SCLK 0x280A1148, 0X4, 0x280A18FC, 0X2, 0x280A1148
584 #define IOMUXC_PTC18_I2S1_RXD1 0x280A1148, 0X7, 0x280A19CC, 0X2, 0x280A1148
585 #define IOMUXC_PTC18_FLEXSPI0_B_SCLK 0x280A1148, 0X8, 0x00000000, 0x0, 0x280A1148
586 #define IOMUXC_PTC18_LP_RTD_DBG_MUX_18 0x280A1148, 0XF, 0x00000000, 0x0, 0x280A1148
587 #define IOMUXC_PTC19_PTC19 0x280A114C, 0X1, 0x00000000, 0x0, 0x280A114C
588 #define IOMUXC_PTC19_LPSPI3_PCS3 0x280A114C, 0X3, 0x280A1A84, 0X2, 0x280A114C
589 #define IOMUXC_PTC19_FLEXSPI1_A_DATA3 0x280A114C, 0X4, 0x00000000, 0x0, 0x280A114C
590 #define IOMUXC_PTC19_I2S1_TXD1 0x280A114C, 0X7, 0x00000000, 0x0, 0x280A114C
591 #define IOMUXC_PTC19_FLEXSPI0_B_DATA3 0x280A114C, 0X8, 0x00000000, 0x0, 0x280A114C
592 #define IOMUXC_PTC19_TRACE0_D4 0x280A114C, 0XA, 0x00000000, 0x0, 0x280A114C
593 #define IOMUXC_PTC19_LP_RTD_DBG_MUX_19 0x280A114C, 0XF, 0x00000000, 0x0, 0x280A114C
594 #define IOMUXC_PTC20_PTC20 0x280A1150, 0X1, 0x00000000, 0x0, 0x280A1150
595 #define IOMUXC_PTC20_FLEXSPI1_A_DATA2 0x280A1150, 0X4, 0x00000000, 0x0, 0x280A1150
596 #define IOMUXC_PTC20_I2S1_TXD0 0x280A1150, 0X7, 0x00000000, 0x0, 0x280A1150
597 #define IOMUXC_PTC20_FLEXSPI0_B_DATA2 0x280A1150, 0X8, 0x00000000, 0x0, 0x280A1150
598 #define IOMUXC_PTC20_TRACE0_D5 0x280A1150, 0XA, 0x00000000, 0x0, 0x280A1150
599 #define IOMUXC_PTC21_PTC21 0x280A1154, 0X1, 0x00000000, 0x0, 0x280A1154
600 #define IOMUXC_PTC21_FLEXSPI1_A_DATA1 0x280A1154, 0X4, 0x00000000, 0x0, 0x280A1154
601 #define IOMUXC_PTC21_I2S1_TX_BCLK 0x280A1154, 0X7, 0x280A19E0, 0X2, 0x280A1154
602 #define IOMUXC_PTC21_FLEXSPI0_B_DATA1 0x280A1154, 0X8, 0x00000000, 0x0, 0x280A1154
603 #define IOMUXC_PTC21_TRACE0_D6 0x280A1154, 0XA, 0x00000000, 0x0, 0x280A1154
604 #define IOMUXC_PTC22_PTC22 0x280A1158, 0X1, 0x00000000, 0x0, 0x280A1158
605 #define IOMUXC_PTC22_FLEXSPI1_A_DATA0 0x280A1158, 0X4, 0x00000000, 0x0, 0x280A1158
606 #define IOMUXC_PTC22_I2S1_TX_FS 0x280A1158, 0X7, 0x280A19E4, 0X2, 0x280A1158
607 #define IOMUXC_PTC22_FLEXSPI0_B_DATA0 0x280A1158, 0X8, 0x00000000, 0x0, 0x280A1158
608 #define IOMUXC_PTC22_TRACE0_D7 0x280A1158, 0XA, 0x00000000, 0x0, 0x280A1158
609 #define IOMUXC_PTC23_PTC23 0x280A115C, 0X1, 0x00000000, 0x0, 0x280A115C
610 #define IOMUXC_PTC23_FLEXSPI1_A_SS0_B 0x280A115C, 0X4, 0x00000000, 0x0, 0x280A115C
611 #define IOMUXC_PTC23_FLEXSPI1_A_SS1_B 0x280A115C, 0X5, 0x00000000, 0x0, 0x280A115C
612 #define IOMUXC_PTC23_I2S1_MCLK 0x280A115C, 0X7, 0x00000000, 0x0, 0x280A115C
613 #define IOMUXC_PTC23_FLEXSPI0_B_SS0_B 0x280A115C, 0X8, 0x00000000, 0x0, 0x280A115C
614 #define IOMUXC_PTC23_FLEXSPI0_B_SS1_B 0x280A115C, 0X9, 0x00000000, 0x0, 0x280A115C
615 #define IOMUXC_PTC23_CLKOUT0 0x280A115C, 0XA, 0x00000000, 0x0, 0x280A115C
616 #define IOMUXC_PTD0_PTD0 0x298C0000, 0X1, 0x00000000, 0x0, 0x298C0000
617 #define IOMUXC_PTD0_I2S6_RX_BCLK 0x298C0000, 0X7, 0x298C0B44, 0X1, 0x298C0000
618 #define IOMUXC_PTD0_SDHC0_RESET_B 0x298C0000, 0X8, 0x00000000, 0x0, 0x298C0000
619 #define IOMUXC_PTD0_FLEXSPI2_B_DQS 0x298C0000, 0X9, 0x298C0974, 0X1, 0x298C0000
620 #define IOMUXC_PTD0_CLKOUT2 0x298C0000, 0XA, 0x00000000, 0x0, 0x298C0000
621 #define IOMUXC_PTD0_EPDC0_SDCLK_B 0x298C0000, 0XB, 0x00000000, 0x0, 0x298C0000
622 #define IOMUXC_PTD0_LP_APD_DBG_MUX_0 0x298C0000, 0XC, 0x00000000, 0x0, 0x298C0000
623 #define IOMUXC_PTD0_CLKOUT1 0x298C0000, 0XD, 0x00000000, 0x0, 0x298C0000
624 #define IOMUXC_PTD0_DEBUG_MUX0_0 0x298C0000, 0XE, 0x00000000, 0x0, 0x298C0000
625 #define IOMUXC_PTD0_DEBUG_MUX1_0 0x298C0000, 0XF, 0x00000000, 0x0, 0x298C0000
626 #define IOMUXC_PTD1_PTD1 0x298C0004, 0X1, 0x00000000, 0x0, 0x298C0004
627 #define IOMUXC_PTD1_I2S6_RX_FS 0x298C0004, 0X7, 0x298C0B48, 0X1, 0x298C0004
628 #define IOMUXC_PTD1_SDHC0_CMD 0x298C0004, 0X8, 0x00000000, 0x0, 0x298C0004
629 #define IOMUXC_PTD1_FLEXSPI2_B_DATA7 0x298C0004, 0X9, 0x298C0970, 0X1, 0x298C0004
630 #define IOMUXC_PTD1_EPDC0_SDCLK 0x298C0004, 0XB, 0x00000000, 0x0, 0x298C0004
631 #define IOMUXC_PTD1_DPI0_PCLK 0x298C0004, 0XC, 0x00000000, 0x0, 0x298C0004
632 #define IOMUXC_PTD1_LP_APD_DBG_MUX_1 0x298C0004, 0XD, 0x00000000, 0x0, 0x298C0004
633 #define IOMUXC_PTD1_DEBUG_MUX0_1 0x298C0004, 0XE, 0x00000000, 0x0, 0x298C0004
634 #define IOMUXC_PTD1_DEBUG_MUX1_1 0x298C0004, 0XF, 0x00000000, 0x0, 0x298C0004
635 #define IOMUXC_PTD2_PTD2 0x298C0008, 0X1, 0x00000000, 0x0, 0x298C0008
636 #define IOMUXC_PTD2_I2S6_RXD0 0x298C0008, 0X7, 0x298C0B34, 0X1, 0x298C0008
637 #define IOMUXC_PTD2_SDHC0_CLK 0x298C0008, 0X8, 0x00000000, 0x0, 0x298C0008
638 #define IOMUXC_PTD2_FLEXSPI2_B_DATA6 0x298C0008, 0X9, 0x298C096C, 0X1, 0x298C0008
639 #define IOMUXC_PTD2_EPDC0_SDLE 0x298C0008, 0XB, 0x00000000, 0x0, 0x298C0008
640 #define IOMUXC_PTD2_DPI0_HSYNC 0x298C0008, 0XC, 0x00000000, 0x0, 0x298C0008
641 #define IOMUXC_PTD2_LP_APD_DBG_MUX_2 0x298C0008, 0XD, 0x00000000, 0x0, 0x298C0008
642 #define IOMUXC_PTD2_DEBUG_MUX0_2 0x298C0008, 0XE, 0x00000000, 0x0, 0x298C0008
643 #define IOMUXC_PTD2_DEBUG_MUX1_2 0x298C0008, 0XF, 0x00000000, 0x0, 0x298C0008
644 #define IOMUXC_PTD3_PTD3 0x298C000C, 0X1, 0x00000000, 0x0, 0x298C000C
645 #define IOMUXC_PTD3_I2S6_RXD1 0x298C000C, 0X7, 0x298C0B38, 0X1, 0x298C000C
646 #define IOMUXC_PTD3_SDHC0_D7 0x298C000C, 0X8, 0x00000000, 0x0, 0x298C000C
647 #define IOMUXC_PTD3_FLEXSPI2_B_DATA5 0x298C000C, 0X9, 0x298C0968, 0X1, 0x298C000C
648 #define IOMUXC_PTD3_EPDC0_GDSP 0x298C000C, 0XB, 0x00000000, 0x0, 0x298C000C
649 #define IOMUXC_PTD3_DPI0_VSYNC 0x298C000C, 0XC, 0x00000000, 0x0, 0x298C000C
650 #define IOMUXC_PTD3_LP_APD_DBG_MUX_3 0x298C000C, 0XD, 0x00000000, 0x0, 0x298C000C
651 #define IOMUXC_PTD3_DEBUG_MUX0_3 0x298C000C, 0XE, 0x00000000, 0x0, 0x298C000C
652 #define IOMUXC_PTD3_DEBUG_MUX1_3 0x298C000C, 0XF, 0x00000000, 0x0, 0x298C000C
653 #define IOMUXC_PTD4_PTD4 0x298C0010, 0X1, 0x00000000, 0x0, 0x298C0010
654 #define IOMUXC_PTD4_EXT_AUD_MCLK3 0x298C0010, 0X4, 0x298C0B14, 0X1, 0x298C0010
655 #define IOMUXC_PTD4_SDHC0_VS 0x298C0010, 0X5, 0x00000000, 0x0, 0x298C0010
656 #define IOMUXC_PTD4_TPM8_CH5 0x298C0010, 0X6, 0x298C0B2C, 0X1, 0x298C0010
657 #define IOMUXC_PTD4_I2S6_MCLK 0x298C0010, 0X7, 0x00000000, 0x0, 0x298C0010
658 #define IOMUXC_PTD4_SDHC0_D6 0x298C0010, 0X8, 0x00000000, 0x0, 0x298C0010
659 #define IOMUXC_PTD4_FLEXSPI2_B_DATA4 0x298C0010, 0X9, 0x298C0964, 0X1, 0x298C0010
660 #define IOMUXC_PTD4_EPDC0_SDCE0 0x298C0010, 0XB, 0x00000000, 0x0, 0x298C0010
661 #define IOMUXC_PTD4_DPI0_DE 0x298C0010, 0XC, 0x00000000, 0x0, 0x298C0010
662 #define IOMUXC_PTD4_LP_APD_DBG_MUX_4 0x298C0010, 0XD, 0x00000000, 0x0, 0x298C0010
663 #define IOMUXC_PTD4_DEBUG_MUX0_4 0x298C0010, 0XE, 0x00000000, 0x0, 0x298C0010
664 #define IOMUXC_PTD4_DEBUG_MUX1_4 0x298C0010, 0XF, 0x00000000, 0x0, 0x298C0010
665 #define IOMUXC_PTD5_PTD5 0x298C0014, 0X1, 0x00000000, 0x0, 0x298C0014
666 #define IOMUXC_PTD5_SDHC0_CD 0x298C0014, 0X5, 0x00000000, 0x0, 0x298C0014
667 #define IOMUXC_PTD5_TPM8_CH4 0x298C0014, 0X6, 0x298C0B28, 0X1, 0x298C0014
668 #define IOMUXC_PTD5_I2S6_TX_BCLK 0x298C0014, 0X7, 0x298C0B4C, 0X1, 0x298C0014
669 #define IOMUXC_PTD5_SDHC0_D5 0x298C0014, 0X8, 0x00000000, 0x0, 0x298C0014
670 #define IOMUXC_PTD5_FLEXSPI2_B_SS0_B 0x298C0014, 0X9, 0x00000000, 0x0, 0x298C0014
671 #define IOMUXC_PTD5_FLEXSPI2_B_SCLK_B 0x298C0014, 0XA, 0x00000000, 0x0, 0x298C0014
672 #define IOMUXC_PTD5_EPDC0_D0 0x298C0014, 0XB, 0x00000000, 0x0, 0x298C0014
673 #define IOMUXC_PTD5_DPI0_D0 0x298C0014, 0XC, 0x00000000, 0x0, 0x298C0014
674 #define IOMUXC_PTD5_LP_APD_DBG_MUX_5 0x298C0014, 0XD, 0x00000000, 0x0, 0x298C0014
675 #define IOMUXC_PTD5_DEBUG_MUX0_5 0x298C0014, 0XE, 0x00000000, 0x0, 0x298C0014
676 #define IOMUXC_PTD5_DEBUG_MUX1_5 0x298C0014, 0XF, 0x00000000, 0x0, 0x298C0014
677 #define IOMUXC_PTD6_PTD6 0x298C0018, 0X1, 0x00000000, 0x0, 0x298C0018
678 #define IOMUXC_PTD6_SDHC0_WP 0x298C0018, 0X5, 0x00000000, 0x0, 0x298C0018
679 #define IOMUXC_PTD6_TPM8_CH3 0x298C0018, 0X6, 0x298C0B24, 0X1, 0x298C0018
680 #define IOMUXC_PTD6_I2S6_TX_FS 0x298C0018, 0X7, 0x298C0B50, 0X1, 0x298C0018
681 #define IOMUXC_PTD6_SDHC0_D4 0x298C0018, 0X8, 0x00000000, 0x0, 0x298C0018
682 #define IOMUXC_PTD6_FLEXSPI2_B_SCLK 0x298C0018, 0X9, 0x298C0978, 0X1, 0x298C0018
683 #define IOMUXC_PTD6_EPDC0_D1 0x298C0018, 0XB, 0x00000000, 0x0, 0x298C0018
684 #define IOMUXC_PTD6_DPI0_D1 0x298C0018, 0XC, 0x00000000, 0x0, 0x298C0018
685 #define IOMUXC_PTD6_LP_APD_DBG_MUX_6 0x298C0018, 0XD, 0x00000000, 0x0, 0x298C0018
686 #define IOMUXC_PTD6_DEBUG_MUX0_6 0x298C0018, 0XE, 0x00000000, 0x0, 0x298C0018
687 #define IOMUXC_PTD6_DEBUG_MUX1_6 0x298C0018, 0XF, 0x00000000, 0x0, 0x298C0018
688 #define IOMUXC_PTD7_PTD7 0x298C001C, 0X1, 0x00000000, 0x0, 0x298C001C
689 #define IOMUXC_PTD7_TPM8_CH2 0x298C001C, 0X6, 0x298C0B20, 0X1, 0x298C001C
690 #define IOMUXC_PTD7_I2S6_TXD0 0x298C001C, 0X7, 0x00000000, 0x0, 0x298C001C
691 #define IOMUXC_PTD7_SDHC0_D3 0x298C001C, 0X8, 0x00000000, 0x0, 0x298C001C
692 #define IOMUXC_PTD7_FLEXSPI2_B_DATA3 0x298C001C, 0X9, 0x298C0960, 0X1, 0x298C001C
693 #define IOMUXC_PTD7_EPDC0_D2 0x298C001C, 0XB, 0x00000000, 0x0, 0x298C001C
694 #define IOMUXC_PTD7_DPI0_D2 0x298C001C, 0XC, 0x00000000, 0x0, 0x298C001C
695 #define IOMUXC_PTD7_LP_APD_DBG_MUX_7 0x298C001C, 0XD, 0x00000000, 0x0, 0x298C001C
696 #define IOMUXC_PTD7_DEBUG_MUX0_7 0x298C001C, 0XE, 0x00000000, 0x0, 0x298C001C
697 #define IOMUXC_PTD7_DEBUG_MUX1_7 0x298C001C, 0XF, 0x00000000, 0x0, 0x298C001C
698 #define IOMUXC_PTD8_PTD8 0x298C0020, 0X1, 0x00000000, 0x0, 0x298C0020
699 #define IOMUXC_PTD8_TPM8_CH1 0x298C0020, 0X6, 0x298C0B1C, 0X1, 0x298C0020
700 #define IOMUXC_PTD8_I2S6_TXD1 0x298C0020, 0X7, 0x00000000, 0x0, 0x298C0020
701 #define IOMUXC_PTD8_SDHC0_D2 0x298C0020, 0X8, 0x00000000, 0x0, 0x298C0020
702 #define IOMUXC_PTD8_FLEXSPI2_B_DATA2 0x298C0020, 0X9, 0x298C095C, 0X1, 0x298C0020
703 #define IOMUXC_PTD8_EPDC0_D3 0x298C0020, 0XB, 0x00000000, 0x0, 0x298C0020
704 #define IOMUXC_PTD8_DPI0_D3 0x298C0020, 0XC, 0x00000000, 0x0, 0x298C0020
705 #define IOMUXC_PTD8_LP_APD_DBG_MUX_8 0x298C0020, 0XE, 0x00000000, 0x0, 0x298C0020
706 #define IOMUXC_PTD8_DEBUG_MUX1_8 0x298C0020, 0XF, 0x00000000, 0x0, 0x298C0020
707 #define IOMUXC_PTD9_PTD9 0x298C0024, 0X1, 0x00000000, 0x0, 0x298C0024
708 #define IOMUXC_PTD9_TPM8_CLKIN 0x298C0024, 0X6, 0x298C0B30, 0X1, 0x298C0024
709 #define IOMUXC_PTD9_I2S6_TXD2 0x298C0024, 0X7, 0x00000000, 0x0, 0x298C0024
710 #define IOMUXC_PTD9_SDHC0_D1 0x298C0024, 0X8, 0x00000000, 0x0, 0x298C0024
711 #define IOMUXC_PTD9_FLEXSPI2_B_DATA1 0x298C0024, 0X9, 0x298C0958, 0X1, 0x298C0024
712 #define IOMUXC_PTD9_EPDC0_D4 0x298C0024, 0XB, 0x00000000, 0x0, 0x298C0024
713 #define IOMUXC_PTD9_DPI0_D4 0x298C0024, 0XC, 0x00000000, 0x0, 0x298C0024
714 #define IOMUXC_PTD9_LP_APD_DBG_MUX_9 0x298C0024, 0XE, 0x00000000, 0x0, 0x298C0024
715 #define IOMUXC_PTD9_DEBUG_MUX1_9 0x298C0024, 0XF, 0x00000000, 0x0, 0x298C0024
716 #define IOMUXC_PTD10_PTD10 0x298C0028, 0X1, 0x00000000, 0x0, 0x298C0028
717 #define IOMUXC_PTD10_TPM8_CH0 0x298C0028, 0X6, 0x298C0B18, 0X1, 0x298C0028
718 #define IOMUXC_PTD10_I2S6_TXD3 0x298C0028, 0X7, 0x00000000, 0x0, 0x298C0028
719 #define IOMUXC_PTD10_SDHC0_D0 0x298C0028, 0X8, 0x00000000, 0x0, 0x298C0028
720 #define IOMUXC_PTD10_FLEXSPI2_B_DATA0 0x298C0028, 0X9, 0x298C0954, 0X1, 0x298C0028
721 #define IOMUXC_PTD10_EPDC0_D5 0x298C0028, 0XB, 0x00000000, 0x0, 0x298C0028
722 #define IOMUXC_PTD10_DPI0_D5 0x298C0028, 0XC, 0x00000000, 0x0, 0x298C0028
723 #define IOMUXC_PTD10_LP_APD_DBG_MUX_10 0x298C0028, 0XE, 0x00000000, 0x0, 0x298C0028
724 #define IOMUXC_PTD10_DEBUG_MUX1_10 0x298C0028, 0XF, 0x00000000, 0x0, 0x298C0028
725 #define IOMUXC_PTD11_PTD11 0x298C002C, 0X1, 0x00000000, 0x0, 0x298C002C
726 #define IOMUXC_PTD11_TPM8_CH5 0x298C002C, 0X6, 0x298C0B2C, 0X2, 0x298C002C
727 #define IOMUXC_PTD11_I2S6_RXD2 0x298C002C, 0X7, 0x298C0B3C, 0X1, 0x298C002C
728 #define IOMUXC_PTD11_SDHC0_DQS 0x298C002C, 0X8, 0x00000000, 0x0, 0x298C002C
729 #define IOMUXC_PTD11_FLEXSPI2_B_SS0_B 0x298C002C, 0X9, 0x00000000, 0x0, 0x298C002C
730 #define IOMUXC_PTD11_FLEXSPI2_A_SS1_B 0x298C002C, 0XA, 0x00000000, 0x0, 0x298C002C
731 #define IOMUXC_PTD11_EPDC0_D6 0x298C002C, 0XB, 0x00000000, 0x0, 0x298C002C
732 #define IOMUXC_PTD11_DPI0_D6 0x298C002C, 0XC, 0x00000000, 0x0, 0x298C002C
733 #define IOMUXC_PTD11_LP_APD_DBG_MUX_11 0x298C002C, 0XF, 0x00000000, 0x0, 0x298C002C
734 #define IOMUXC_PTD12_PTD12 0x298C0030, 0X1, 0x00000000, 0x0, 0x298C0030
735 #define IOMUXC_PTD12_USB0_ID 0x298C0030, 0X5, 0x298C0AC8, 0X1, 0x298C0030
736 #define IOMUXC_PTD12_SDHC2_D3 0x298C0030, 0X6, 0x298C0AA4, 0X1, 0x298C0030
737 #define IOMUXC_PTD12_I2S7_RX_BCLK 0x298C0030, 0X7, 0x298C0B64, 0X1, 0x298C0030
738 #define IOMUXC_PTD12_SDHC1_DQS 0x298C0030, 0X8, 0x298C0A84, 0X1, 0x298C0030
739 #define IOMUXC_PTD12_FLEXSPI2_A_SS0_B 0x298C0030, 0X9, 0x00000000, 0x0, 0x298C0030
740 #define IOMUXC_PTD12_FLEXSPI2_B_SS1_B 0x298C0030, 0XA, 0x00000000, 0x0, 0x298C0030
741 #define IOMUXC_PTD12_EPDC0_D7 0x298C0030, 0XB, 0x00000000, 0x0, 0x298C0030
742 #define IOMUXC_PTD12_DPI0_D7 0x298C0030, 0XC, 0x00000000, 0x0, 0x298C0030
743 #define IOMUXC_PTD12_LP_APD_DBG_MUX_12 0x298C0030, 0XF, 0x00000000, 0x0, 0x298C0030
744 #define IOMUXC_PTD13_PTD13 0x298C0034, 0X1, 0x00000000, 0x0, 0x298C0034
745 #define IOMUXC_PTD13_SPDIF_IN4 0x298C0034, 0X4, 0x298C0B80, 0X1, 0x298C0034
746 #define IOMUXC_PTD13_USB0_PWR 0x298C0034, 0X5, 0x00000000, 0x0, 0x298C0034
747 #define IOMUXC_PTD13_SDHC2_D2 0x298C0034, 0X6, 0x298C0AA0, 0X1, 0x298C0034
748 #define IOMUXC_PTD13_I2S7_RX_FS 0x298C0034, 0X7, 0x298C0B68, 0X1, 0x298C0034
749 #define IOMUXC_PTD13_SDHC1_RESET_B 0x298C0034, 0X8, 0x00000000, 0x0, 0x298C0034
750 #define IOMUXC_PTD13_FLEXSPI2_A_SCLK 0x298C0034, 0X9, 0x00000000, 0x0, 0x298C0034
751 #define IOMUXC_PTD13_CLKOUT2 0x298C0034, 0XA, 0x00000000, 0x0, 0x298C0034
752 #define IOMUXC_PTD13_EPDC0_D8 0x298C0034, 0XB, 0x00000000, 0x0, 0x298C0034
753 #define IOMUXC_PTD13_DPI0_D8 0x298C0034, 0XC, 0x00000000, 0x0, 0x298C0034
754 #define IOMUXC_PTD13_CLKOUT1 0x298C0034, 0XD, 0x00000000, 0x0, 0x298C0034
755 #define IOMUXC_PTD13_LP_APD_DBG_MUX_13 0x298C0034, 0XF, 0x00000000, 0x0, 0x298C0034
756 #define IOMUXC_PTD14_PTD14 0x298C0038, 0X1, 0x00000000, 0x0, 0x298C0038
757 #define IOMUXC_PTD14_SPDIF_SRCLK 0x298C0038, 0X4, 0x00000000, 0x0, 0x298C0038
758 #define IOMUXC_PTD14_USB0_OC 0x298C0038, 0X5, 0x298C0AC0, 0X1, 0x298C0038
759 #define IOMUXC_PTD14_SDHC2_D1 0x298C0038, 0X6, 0x298C0A9C, 0X1, 0x298C0038
760 #define IOMUXC_PTD14_I2S7_RXD0 0x298C0038, 0X7, 0x298C0B54, 0X1, 0x298C0038
761 #define IOMUXC_PTD14_SDHC1_D7 0x298C0038, 0X8, 0x298C0A80, 0X1, 0x298C0038
762 #define IOMUXC_PTD14_FLEXSPI2_A_DATA3 0x298C0038, 0X9, 0x00000000, 0x0, 0x298C0038
763 #define IOMUXC_PTD14_TRACE0_D7 0x298C0038, 0XA, 0x00000000, 0x0, 0x298C0038
764 #define IOMUXC_PTD14_EPDC0_D9 0x298C0038, 0XB, 0x00000000, 0x0, 0x298C0038
765 #define IOMUXC_PTD14_DPI0_D9 0x298C0038, 0XC, 0x00000000, 0x0, 0x298C0038
766 #define IOMUXC_PTD14_LP_APD_DBG_MUX_14 0x298C0038, 0XF, 0x00000000, 0x0, 0x298C0038
767 #define IOMUXC_PTD15_PTD15 0x298C003C, 0X1, 0x00000000, 0x0, 0x298C003C
768 #define IOMUXC_PTD15_SPDIF_IN3 0x298C003C, 0X4, 0x298C0B7C, 0X1, 0x298C003C
769 #define IOMUXC_PTD15_SDHC1_VS 0x298C003C, 0X5, 0x00000000, 0x0, 0x298C003C
770 #define IOMUXC_PTD15_SDHC2_D0 0x298C003C, 0X6, 0x298C0A98, 0X1, 0x298C003C
771 #define IOMUXC_PTD15_I2S7_TX_BCLK 0x298C003C, 0X7, 0x298C0B6C, 0X1, 0x298C003C
772 #define IOMUXC_PTD15_SDHC1_D6 0x298C003C, 0X8, 0x298C0A7C, 0X1, 0x298C003C
773 #define IOMUXC_PTD15_FLEXSPI2_A_DATA2 0x298C003C, 0X9, 0x00000000, 0x0, 0x298C003C
774 #define IOMUXC_PTD15_TRACE0_D6 0x298C003C, 0XA, 0x00000000, 0x0, 0x298C003C
775 #define IOMUXC_PTD15_EPDC0_D10 0x298C003C, 0XB, 0x00000000, 0x0, 0x298C003C
776 #define IOMUXC_PTD15_DPI0_D10 0x298C003C, 0XC, 0x00000000, 0x0, 0x298C003C
777 #define IOMUXC_PTD15_LP_APD_DBG_MUX_15 0x298C003C, 0XF, 0x00000000, 0x0, 0x298C003C
778 #define IOMUXC_PTD16_PTD16 0x298C0040, 0X1, 0x00000000, 0x0, 0x298C0040
779 #define IOMUXC_PTD16_FXIO1_D31 0x298C0040, 0X2, 0x298C08A0, 0X1, 0x298C0040
780 #define IOMUXC_PTD16_LPSPI4_PCS1 0x298C0040, 0X3, 0x298C08F8, 0X1, 0x298C0040
781 #define IOMUXC_PTD16_SPDIF_PLOCK 0x298C0040, 0X4, 0x00000000, 0x0, 0x298C0040
782 #define IOMUXC_PTD16_SDHC1_CD 0x298C0040, 0X5, 0x298C0A58, 0X1, 0x298C0040
783 #define IOMUXC_PTD16_SDHC2_CLK 0x298C0040, 0X6, 0x298C0A90, 0X1, 0x298C0040
784 #define IOMUXC_PTD16_I2S7_TX_FS 0x298C0040, 0X7, 0x298C0B70, 0X1, 0x298C0040
785 #define IOMUXC_PTD16_SDHC1_D5 0x298C0040, 0X8, 0x298C0A78, 0X1, 0x298C0040
786 #define IOMUXC_PTD16_FLEXSPI2_A_DATA1 0x298C0040, 0X9, 0x00000000, 0x0, 0x298C0040
787 #define IOMUXC_PTD16_TRACE0_D5 0x298C0040, 0XA, 0x00000000, 0x0, 0x298C0040
788 #define IOMUXC_PTD16_EPDC0_D11 0x298C0040, 0XB, 0x00000000, 0x0, 0x298C0040
789 #define IOMUXC_PTD16_DPI0_D11 0x298C0040, 0XC, 0x00000000, 0x0, 0x298C0040
790 #define IOMUXC_PTD16_LP_APD_DBG_MUX_16 0x298C0040, 0XF, 0x00000000, 0x0, 0x298C0040
791 #define IOMUXC_PTD17_PTD17 0x298C0044, 0X1, 0x00000000, 0x0, 0x298C0044
792 #define IOMUXC_PTD17_FXIO1_D30 0x298C0044, 0X2, 0x298C089C, 0X1, 0x298C0044
793 #define IOMUXC_PTD17_LPSPI4_PCS2 0x298C0044, 0X3, 0x298C08FC, 0X1, 0x298C0044
794 #define IOMUXC_PTD17_EXT_AUD_MCLK3 0x298C0044, 0X4, 0x298C0B14, 0X2, 0x298C0044
795 #define IOMUXC_PTD17_SDHC1_WP 0x298C0044, 0X5, 0x298C0A88, 0X1, 0x298C0044
796 #define IOMUXC_PTD17_SDHC2_CMD 0x298C0044, 0X6, 0x298C0A94, 0X1, 0x298C0044
797 #define IOMUXC_PTD17_I2S7_TXD0 0x298C0044, 0X7, 0x00000000, 0x0, 0x298C0044
798 #define IOMUXC_PTD17_SDHC1_D4 0x298C0044, 0X8, 0x298C0A74, 0X1, 0x298C0044
799 #define IOMUXC_PTD17_FLEXSPI2_A_DATA0 0x298C0044, 0X9, 0x00000000, 0x0, 0x298C0044
800 #define IOMUXC_PTD17_TRACE0_D4 0x298C0044, 0XA, 0x00000000, 0x0, 0x298C0044
801 #define IOMUXC_PTD17_EPDC0_D12 0x298C0044, 0XB, 0x00000000, 0x0, 0x298C0044
802 #define IOMUXC_PTD17_DPI0_D12 0x298C0044, 0XC, 0x00000000, 0x0, 0x298C0044
803 #define IOMUXC_PTD17_LP_APD_DBG_MUX_17 0x298C0044, 0XF, 0x00000000, 0x0, 0x298C0044
804 #define IOMUXC_PTD18_PTD18 0x298C0048, 0X1, 0x00000000, 0x0, 0x298C0048
805 #define IOMUXC_PTD18_FXIO1_D29 0x298C0048, 0X2, 0x298C0894, 0X1, 0x298C0048
806 #define IOMUXC_PTD18_LPSPI4_PCS3 0x298C0048, 0X3, 0x298C0900, 0X1, 0x298C0048
807 #define IOMUXC_PTD18_SPDIF_OUTCLK 0x298C0048, 0X4, 0x00000000, 0x0, 0x298C0048
808 #define IOMUXC_PTD18_EXT_AUD_MCLK3 0x298C0048, 0X5, 0x298C0B14, 0X3, 0x298C0048
809 #define IOMUXC_PTD18_TPM8_CH0 0x298C0048, 0X6, 0x298C0B18, 0X2, 0x298C0048
810 #define IOMUXC_PTD18_I2S7_MCLK 0x298C0048, 0X7, 0x00000000, 0x0, 0x298C0048
811 #define IOMUXC_PTD18_SDHC1_D3 0x298C0048, 0X8, 0x298C0A70, 0X1, 0x298C0048
812 #define IOMUXC_PTD18_FLEXSPI2_A_DQS 0x298C0048, 0X9, 0x00000000, 0x0, 0x298C0048
813 #define IOMUXC_PTD18_TRACE0_D3 0x298C0048, 0XA, 0x00000000, 0x0, 0x298C0048
814 #define IOMUXC_PTD18_EPDC0_D13 0x298C0048, 0XB, 0x00000000, 0x0, 0x298C0048
815 #define IOMUXC_PTD18_DPI0_D13 0x298C0048, 0XC, 0x00000000, 0x0, 0x298C0048
816 #define IOMUXC_PTD18_LP_APD_DBG_MUX_18 0x298C0048, 0XF, 0x00000000, 0x0, 0x298C0048
817 #define IOMUXC_PTD19_PTD19 0x298C004C, 0X1, 0x00000000, 0x0, 0x298C004C
818 #define IOMUXC_PTD19_FXIO1_D28 0x298C004C, 0X2, 0x298C0890, 0X1, 0x298C004C
819 #define IOMUXC_PTD19_SPDIF_IN1 0x298C004C, 0X4, 0x298C0B74, 0X1, 0x298C004C
820 #define IOMUXC_PTD19_TPM8_CH1 0x298C004C, 0X6, 0x298C0B1C, 0X2, 0x298C004C
821 #define IOMUXC_PTD19_I2S6_RXD3 0x298C004C, 0X7, 0x298C0B40, 0X1, 0x298C004C
822 #define IOMUXC_PTD19_SDHC1_D2 0x298C004C, 0X8, 0x298C0A6C, 0X1, 0x298C004C
823 #define IOMUXC_PTD19_FLEXSPI2_A_DATA7 0x298C004C, 0X9, 0x00000000, 0x0, 0x298C004C
824 #define IOMUXC_PTD19_TRACE0_D2 0x298C004C, 0XA, 0x00000000, 0x0, 0x298C004C
825 #define IOMUXC_PTD19_EPDC0_D14 0x298C004C, 0XB, 0x00000000, 0x0, 0x298C004C
826 #define IOMUXC_PTD19_DPI0_D14 0x298C004C, 0XC, 0x00000000, 0x0, 0x298C004C
827 #define IOMUXC_PTD19_LP_APD_DBG_MUX_19 0x298C004C, 0XF, 0x00000000, 0x0, 0x298C004C
828 #define IOMUXC_PTD20_PTD20 0x298C0050, 0X1, 0x00000000, 0x0, 0x298C0050
829 #define IOMUXC_PTD20_FXIO1_D27 0x298C0050, 0X2, 0x298C088C, 0X1, 0x298C0050
830 #define IOMUXC_PTD20_LPSPI4_SIN 0x298C0050, 0X3, 0x298C0908, 0X1, 0x298C0050
831 #define IOMUXC_PTD20_SPDIF_OUT1 0x298C0050, 0X4, 0x00000000, 0x0, 0x298C0050
832 #define IOMUXC_PTD20_TPM8_CLKIN 0x298C0050, 0X6, 0x298C0B30, 0X2, 0x298C0050
833 #define IOMUXC_PTD20_I2S7_RXD1 0x298C0050, 0X7, 0x298C0B58, 0X1, 0x298C0050
834 #define IOMUXC_PTD20_SDHC1_D1 0x298C0050, 0X8, 0x298C0A68, 0X1, 0x298C0050
835 #define IOMUXC_PTD20_FLEXSPI2_A_DATA6 0x298C0050, 0X9, 0x00000000, 0x0, 0x298C0050
836 #define IOMUXC_PTD20_TRACE0_D1 0x298C0050, 0XA, 0x00000000, 0x0, 0x298C0050
837 #define IOMUXC_PTD20_EPDC0_D15 0x298C0050, 0XB, 0x00000000, 0x0, 0x298C0050
838 #define IOMUXC_PTD20_DPI0_D15 0x298C0050, 0XC, 0x00000000, 0x0, 0x298C0050
839 #define IOMUXC_PTD20_LP_APD_DBG_MUX_20 0x298C0050, 0XF, 0x00000000, 0x0, 0x298C0050
840 #define IOMUXC_PTD21_PTD21 0x298C0054, 0X1, 0x00000000, 0x0, 0x298C0054
841 #define IOMUXC_PTD21_FXIO1_D26 0x298C0054, 0X2, 0x298C0888, 0X1, 0x298C0054
842 #define IOMUXC_PTD21_LPSPI4_SOUT 0x298C0054, 0X3, 0x298C090C, 0X1, 0x298C0054
843 #define IOMUXC_PTD21_SPDIF_IN2 0x298C0054, 0X4, 0x298C0B78, 0X1, 0x298C0054
844 #define IOMUXC_PTD21_USB1_PWR 0x298C0054, 0X5, 0x00000000, 0x0, 0x298C0054
845 #define IOMUXC_PTD21_TPM8_CH2 0x298C0054, 0X6, 0x298C0B20, 0X2, 0x298C0054
846 #define IOMUXC_PTD21_I2S7_TXD1 0x298C0054, 0X7, 0x00000000, 0x0, 0x298C0054
847 #define IOMUXC_PTD21_SDHC1_D0 0x298C0054, 0X8, 0x298C0A64, 0X1, 0x298C0054
848 #define IOMUXC_PTD21_FLEXSPI2_A_DATA5 0x298C0054, 0X9, 0x00000000, 0x0, 0x298C0054
849 #define IOMUXC_PTD21_TRACE0_D0 0x298C0054, 0XA, 0x00000000, 0x0, 0x298C0054
850 #define IOMUXC_PTD21_DPI0_D16 0x298C0054, 0XC, 0x00000000, 0x0, 0x298C0054
851 #define IOMUXC_PTD21_WDOG5_RST 0x298C0054, 0XD, 0x00000000, 0x0, 0x298C0054
852 #define IOMUXC_PTD21_LP_APD_DBG_MUX_21 0x298C0054, 0XF, 0x00000000, 0x0, 0x298C0054
853 #define IOMUXC_PTD22_PTD22 0x298C0058, 0X1, 0x00000000, 0x0, 0x298C0058
854 #define IOMUXC_PTD22_FXIO1_D25 0x298C0058, 0X2, 0x298C0884, 0X1, 0x298C0058
855 #define IOMUXC_PTD22_LPSPI4_SCK 0x298C0058, 0X3, 0x298C0904, 0X1, 0x298C0058
856 #define IOMUXC_PTD22_SPDIF_OUT2 0x298C0058, 0X4, 0x00000000, 0x0, 0x298C0058
857 #define IOMUXC_PTD22_USB1_OC 0x298C0058, 0X5, 0x298C0AC4, 0X1, 0x298C0058
858 #define IOMUXC_PTD22_TPM8_CH3 0x298C0058, 0X6, 0x298C0B24, 0X2, 0x298C0058
859 #define IOMUXC_PTD22_I2S7_TXD2 0x298C0058, 0X7, 0x00000000, 0x0, 0x298C0058
860 #define IOMUXC_PTD22_SDHC1_CLK 0x298C0058, 0X8, 0x298C0A5C, 0X1, 0x298C0058
861 #define IOMUXC_PTD22_FLEXSPI2_A_DATA4 0x298C0058, 0X9, 0x00000000, 0x0, 0x298C0058
862 #define IOMUXC_PTD22_TRACE0_CLKOUT 0x298C0058, 0XA, 0x00000000, 0x0, 0x298C0058
863 #define IOMUXC_PTD22_DPI0_D17 0x298C0058, 0XC, 0x00000000, 0x0, 0x298C0058
864 #define IOMUXC_PTD22_LP_APD_DBG_MUX_22 0x298C0058, 0XF, 0x00000000, 0x0, 0x298C0058
865 #define IOMUXC_PTD23_PTD23 0x298C005C, 0X1, 0x00000000, 0x0, 0x298C005C
866 #define IOMUXC_PTD23_FXIO1_D24 0x298C005C, 0X2, 0x298C0880, 0X1, 0x298C005C
867 #define IOMUXC_PTD23_LPSPI4_PCS0 0x298C005C, 0X3, 0x298C08F4, 0X1, 0x298C005C
868 #define IOMUXC_PTD23_USB1_ID 0x298C005C, 0X5, 0x298C0ACC, 0X1, 0x298C005C
869 #define IOMUXC_PTD23_TPM8_CH4 0x298C005C, 0X6, 0x298C0B28, 0X2, 0x298C005C
870 #define IOMUXC_PTD23_I2S7_TXD3 0x298C005C, 0X7, 0x00000000, 0x0, 0x298C005C
871 #define IOMUXC_PTD23_SDHC1_CMD 0x298C005C, 0X8, 0x298C0A60, 0X1, 0x298C005C
872 #define IOMUXC_PTD23_FLEXSPI2_A_SS0_B 0x298C005C, 0X9, 0x00000000, 0x0, 0x298C005C
873 #define IOMUXC_PTD23_FLEXSPI2_A_SCLK_B 0x298C005C, 0XA, 0x00000000, 0x0, 0x298C005C
874 #define IOMUXC_PTD23_DPI0_D18 0x298C005C, 0XC, 0x00000000, 0x0, 0x298C005C
875 #define IOMUXC_PTD23_LP_APD_DBG_MUX_23 0x298C005C, 0XF, 0x00000000, 0x0, 0x298C005C
876 #define IOMUXC_PTE0_PTE0 0x298C0080, 0X1, 0x00000000, 0x0, 0x298C0080
877 #define IOMUXC_PTE0_FXIO1_D23 0x298C0080, 0X2, 0x298C087C, 0X1, 0x298C0080
878 #define IOMUXC_PTE0_SPDIF_IN4 0x298C0080, 0X3, 0x298C0B80, 0X2, 0x298C0080
879 #define IOMUXC_PTE0_LPUART4_CTS_B 0x298C0080, 0X4, 0x298C08DC, 0X1, 0x298C0080
880 #define IOMUXC_PTE0_LPI2C4_SCL 0x298C0080, 0X5, 0x298C08C8, 0X1, 0x298C0080
881 #define IOMUXC_PTE0_TPM8_CLKIN 0x298C0080, 0X6, 0x298C0B30, 0X3, 0x298C0080
882 #define IOMUXC_PTE0_I2S7_RXD2 0x298C0080, 0X7, 0x298C0B5C, 0X1, 0x298C0080
883 #define IOMUXC_PTE0_SDHC2_D1 0x298C0080, 0X8, 0x298C0A9C, 0X2, 0x298C0080
884 #define IOMUXC_PTE0_FLEXSPI2_B_DQS 0x298C0080, 0X9, 0x298C0974, 0X2, 0x298C0080
885 #define IOMUXC_PTE0_ENET0_CRS 0x298C0080, 0XA, 0x298C0AE8, 0X1, 0x298C0080
886 #define IOMUXC_PTE0_DBI0_WRX 0x298C0080, 0XB, 0x00000000, 0x0, 0x298C0080
887 #define IOMUXC_PTE0_DPI0_D19 0x298C0080, 0XC, 0x00000000, 0x0, 0x298C0080
888 #define IOMUXC_PTE0_WUU1_P0 0x298C0080, 0XD, 0x00000000, 0x0, 0x298C0080
889 #define IOMUXC_PTE0_DEBUG_MUX0_8 0x298C0080, 0XE, 0x00000000, 0x0, 0x298C0080
890 #define IOMUXC_PTE0_DEBUG_MUX1_11 0x298C0080, 0XF, 0x00000000, 0x0, 0x298C0080
891 #define IOMUXC_PTE1_PTE1 0x298C0084, 0X1, 0x00000000, 0x0, 0x298C0084
892 #define IOMUXC_PTE1_FXIO1_D22 0x298C0084, 0X2, 0x298C0878, 0X1, 0x298C0084
893 #define IOMUXC_PTE1_SPDIF_SRCLK 0x298C0084, 0X3, 0x00000000, 0x0, 0x298C0084
894 #define IOMUXC_PTE1_LPUART4_RTS_B 0x298C0084, 0X4, 0x00000000, 0x0, 0x298C0084
895 #define IOMUXC_PTE1_LPI2C4_SDA 0x298C0084, 0X5, 0x298C08CC, 0X1, 0x298C0084
896 #define IOMUXC_PTE1_TPM8_CH0 0x298C0084, 0X6, 0x298C0B18, 0X3, 0x298C0084
897 #define IOMUXC_PTE1_I2S7_RXD3 0x298C0084, 0X7, 0x298C0B60, 0X1, 0x298C0084
898 #define IOMUXC_PTE1_SDHC2_D0 0x298C0084, 0X8, 0x298C0A98, 0X2, 0x298C0084
899 #define IOMUXC_PTE1_FLEXSPI2_B_DATA7 0x298C0084, 0X9, 0x298C0970, 0X2, 0x298C0084
900 #define IOMUXC_PTE1_ENET0_COL 0x298C0084, 0XA, 0x298C0AE4, 0X1, 0x298C0084
901 #define IOMUXC_PTE1_DBI0_CSX 0x298C0084, 0XB, 0x00000000, 0x0, 0x298C0084
902 #define IOMUXC_PTE1_DPI0_D20 0x298C0084, 0XC, 0x00000000, 0x0, 0x298C0084
903 #define IOMUXC_PTE1_WUU1_P1 0x298C0084, 0XD, 0x00000000, 0x0, 0x298C0084
904 #define IOMUXC_PTE1_DEBUG_MUX0_9 0x298C0084, 0XE, 0x00000000, 0x0, 0x298C0084
905 #define IOMUXC_PTE1_DEBUG_MUX1_12 0x298C0084, 0XF, 0x00000000, 0x0, 0x298C0084
906 #define IOMUXC_PTE2_PTE2 0x298C0088, 0X1, 0x00000000, 0x0, 0x298C0088
907 #define IOMUXC_PTE2_FXIO1_D21 0x298C0088, 0X2, 0x298C0874, 0X1, 0x298C0088
908 #define IOMUXC_PTE2_SPDIF_IN3 0x298C0088, 0X3, 0x298C0B7C, 0X2, 0x298C0088
909 #define IOMUXC_PTE2_LPUART4_TX 0x298C0088, 0X4, 0x298C08E4, 0X1, 0x298C0088
910 #define IOMUXC_PTE2_LPI2C4_HREQ 0x298C0088, 0X5, 0x298C08C4, 0X1, 0x298C0088
911 #define IOMUXC_PTE2_TPM8_CH1 0x298C0088, 0X6, 0x298C0B1C, 0X3, 0x298C0088
912 #define IOMUXC_PTE2_EXT_AUD_MCLK3 0x298C0088, 0X7, 0x298C0B14, 0X4, 0x298C0088
913 #define IOMUXC_PTE2_SDHC2_CLK 0x298C0088, 0X8, 0x298C0A90, 0X2, 0x298C0088
914 #define IOMUXC_PTE2_FLEXSPI2_B_DATA6 0x298C0088, 0X9, 0x298C096C, 0X2, 0x298C0088
915 #define IOMUXC_PTE2_ENET0_TXER 0x298C0088, 0XA, 0x00000000, 0x0, 0x298C0088
916 #define IOMUXC_PTE2_DBI0_DCX 0x298C0088, 0XB, 0x00000000, 0x0, 0x298C0088
917 #define IOMUXC_PTE2_DPI0_D21 0x298C0088, 0XC, 0x00000000, 0x0, 0x298C0088
918 #define IOMUXC_PTE2_LP_HV_DBG_MUX_0 0x298C0088, 0XD, 0x00000000, 0x0, 0x298C0088
919 #define IOMUXC_PTE2_DEBUG_MUX0_10 0x298C0088, 0XE, 0x00000000, 0x0, 0x298C0088
920 #define IOMUXC_PTE2_DEBUG_MUX1_13 0x298C0088, 0XF, 0x00000000, 0x0, 0x298C0088
921 #define IOMUXC_PTE3_PTE3 0x298C008C, 0X1, 0x00000000, 0x0, 0x298C008C
922 #define IOMUXC_PTE3_FXIO1_D20 0x298C008C, 0X2, 0x298C0870, 0X1, 0x298C008C
923 #define IOMUXC_PTE3_SPDIF_PLOCK 0x298C008C, 0X3, 0x00000000, 0x0, 0x298C008C
924 #define IOMUXC_PTE3_LPUART4_RX 0x298C008C, 0X4, 0x298C08E0, 0X1, 0x298C008C
925 #define IOMUXC_PTE3_TPM8_CH2 0x298C008C, 0X6, 0x298C0B20, 0X3, 0x298C008C
926 #define IOMUXC_PTE3_I2S6_MCLK 0x298C008C, 0X7, 0x00000000, 0x0, 0x298C008C
927 #define IOMUXC_PTE3_SDHC2_CMD 0x298C008C, 0X8, 0x298C0A94, 0X2, 0x298C008C
928 #define IOMUXC_PTE3_FLEXSPI2_B_DATA5 0x298C008C, 0X9, 0x298C0968, 0X2, 0x298C008C
929 #define IOMUXC_PTE3_ENET0_TXCLK 0x298C008C, 0XA, 0x298C0B10, 0X1, 0x298C008C
930 #define IOMUXC_PTE3_DBI0_RWX 0x298C008C, 0XB, 0x00000000, 0x0, 0x298C008C
931 #define IOMUXC_PTE3_DPI0_D22 0x298C008C, 0XC, 0x00000000, 0x0, 0x298C008C
932 #define IOMUXC_PTE3_WUU1_P2 0x298C008C, 0XD, 0x00000000, 0x0, 0x298C008C
933 #define IOMUXC_PTE3_DEBUG_MUX0_11 0x298C008C, 0XE, 0x00000000, 0x0, 0x298C008C
934 #define IOMUXC_PTE3_DEBUG_MUX1_14 0x298C008C, 0XF, 0x00000000, 0x0, 0x298C008C
935 #define IOMUXC_PTE4_PTE4 0x298C0090, 0X1, 0x00000000, 0x0, 0x298C0090
936 #define IOMUXC_PTE4_FXIO1_D19 0x298C0090, 0X2, 0x298C0868, 0X1, 0x298C0090
937 #define IOMUXC_PTE4_SPDIF_OUTCLK 0x298C0090, 0X3, 0x00000000, 0x0, 0x298C0090
938 #define IOMUXC_PTE4_LPUART5_CTS_B 0x298C0090, 0X4, 0x298C08E8, 0X1, 0x298C0090
939 #define IOMUXC_PTE4_LPI2C5_SCL 0x298C0090, 0X5, 0x298C08D4, 0X1, 0x298C0090
940 #define IOMUXC_PTE4_TPM8_CH3 0x298C0090, 0X6, 0x298C0B24, 0X3, 0x298C0090
941 #define IOMUXC_PTE4_I2S6_RX_BCLK 0x298C0090, 0X7, 0x298C0B44, 0X2, 0x298C0090
942 #define IOMUXC_PTE4_SDHC2_D3 0x298C0090, 0X8, 0x298C0AA4, 0X2, 0x298C0090
943 #define IOMUXC_PTE4_FLEXSPI2_B_DATA4 0x298C0090, 0X9, 0x298C0964, 0X2, 0x298C0090
944 #define IOMUXC_PTE4_ENET0_TXD3 0x298C0090, 0XA, 0x00000000, 0x0, 0x298C0090
945 #define IOMUXC_PTE4_DBI0_E 0x298C0090, 0XB, 0x00000000, 0x0, 0x298C0090
946 #define IOMUXC_PTE4_DPI0_D23 0x298C0090, 0XC, 0x00000000, 0x0, 0x298C0090
947 #define IOMUXC_PTE4_WUU1_P3 0x298C0090, 0XD, 0x00000000, 0x0, 0x298C0090
948 #define IOMUXC_PTE4_DEBUG_MUX0_12 0x298C0090, 0XE, 0x00000000, 0x0, 0x298C0090
949 #define IOMUXC_PTE4_DEBUG_MUX1_15 0x298C0090, 0XF, 0x00000000, 0x0, 0x298C0090
950 #define IOMUXC_PTE5_PTE5 0x298C0094, 0X1, 0x00000000, 0x0, 0x298C0094
951 #define IOMUXC_PTE5_FXIO1_D18 0x298C0094, 0X2, 0x298C0864, 0X1, 0x298C0094
952 #define IOMUXC_PTE5_SPDIF_IN1 0x298C0094, 0X3, 0x298C0B74, 0X2, 0x298C0094
953 #define IOMUXC_PTE5_LPUART5_RTS_B 0x298C0094, 0X4, 0x00000000, 0x0, 0x298C0094
954 #define IOMUXC_PTE5_LPI2C5_SDA 0x298C0094, 0X5, 0x298C08D8, 0X1, 0x298C0094
955 #define IOMUXC_PTE5_TPM8_CH4 0x298C0094, 0X6, 0x298C0B28, 0X3, 0x298C0094
956 #define IOMUXC_PTE5_I2S6_RX_FS 0x298C0094, 0X7, 0x298C0B48, 0X2, 0x298C0094
957 #define IOMUXC_PTE5_SDHC2_D2 0x298C0094, 0X8, 0x298C0AA0, 0X2, 0x298C0094
958 #define IOMUXC_PTE5_FLEXSPI2_B_SS0_B 0x298C0094, 0X9, 0x00000000, 0x0, 0x298C0094
959 #define IOMUXC_PTE5_ENET0_TXD2 0x298C0094, 0XA, 0x00000000, 0x0, 0x298C0094
960 #define IOMUXC_PTE5_DBI0_D0 0x298C0094, 0XB, 0x00000000, 0x0, 0x298C0094
961 #define IOMUXC_PTE5_LP_HV_DBG_MUX_1 0x298C0094, 0XD, 0x00000000, 0x0, 0x298C0094
962 #define IOMUXC_PTE5_DEBUG_MUX0_13 0x298C0094, 0XE, 0x00000000, 0x0, 0x298C0094
963 #define IOMUXC_PTE5_DEBUG_MUX1_16 0x298C0094, 0XF, 0x00000000, 0x0, 0x298C0094
964 #define IOMUXC_PTE6_PTE6 0x298C0098, 0X1, 0x00000000, 0x0, 0x298C0098
965 #define IOMUXC_PTE6_FXIO1_D17 0x298C0098, 0X2, 0x298C0860, 0X1, 0x298C0098
966 #define IOMUXC_PTE6_SPDIF_OUT1 0x298C0098, 0X3, 0x00000000, 0x0, 0x298C0098
967 #define IOMUXC_PTE6_LPUART5_TX 0x298C0098, 0X4, 0x298C08F0, 0X1, 0x298C0098
968 #define IOMUXC_PTE6_LPI2C5_HREQ 0x298C0098, 0X5, 0x298C08D0, 0X1, 0x298C0098
969 #define IOMUXC_PTE6_TPM8_CH5 0x298C0098, 0X6, 0x298C0B2C, 0X3, 0x298C0098
970 #define IOMUXC_PTE6_I2S6_RXD0 0x298C0098, 0X7, 0x298C0B34, 0X2, 0x298C0098
971 #define IOMUXC_PTE6_SDHC2_D4 0x298C0098, 0X8, 0x298C0AA8, 0X1, 0x298C0098
972 #define IOMUXC_PTE6_FLEXSPI2_B_SCLK 0x298C0098, 0X9, 0x298C0978, 0X2, 0x298C0098
973 #define IOMUXC_PTE6_ENET0_RXCLK 0x298C0098, 0XA, 0x298C0B0C, 0X1, 0x298C0098
974 #define IOMUXC_PTE6_DBI0_D1 0x298C0098, 0XB, 0x00000000, 0x0, 0x298C0098
975 #define IOMUXC_PTE6_LP_HV_DBG_MUX_2 0x298C0098, 0XC, 0x00000000, 0x0, 0x298C0098
976 #define IOMUXC_PTE6_WDOG5_RST 0x298C0098, 0XD, 0x00000000, 0x0, 0x298C0098
977 #define IOMUXC_PTE6_DEBUG_MUX0_14 0x298C0098, 0XE, 0x00000000, 0x0, 0x298C0098
978 #define IOMUXC_PTE6_DEBUG_MUX1_17 0x298C0098, 0XF, 0x00000000, 0x0, 0x298C0098
979 #define IOMUXC_PTE7_PTE7 0x298C009C, 0X1, 0x00000000, 0x0, 0x298C009C
980 #define IOMUXC_PTE7_FXIO1_D16 0x298C009C, 0X2, 0x298C085C, 0X1, 0x298C009C
981 #define IOMUXC_PTE7_SPDIF_IN2 0x298C009C, 0X3, 0x298C0B78, 0X2, 0x298C009C
982 #define IOMUXC_PTE7_LPUART5_RX 0x298C009C, 0X4, 0x298C08EC, 0X1, 0x298C009C
983 #define IOMUXC_PTE7_LPI2C6_HREQ 0x298C009C, 0X5, 0x298C09B4, 0X1, 0x298C009C
984 #define IOMUXC_PTE7_TPM4_CLKIN 0x298C009C, 0X6, 0x298C081C, 0X1, 0x298C009C
985 #define IOMUXC_PTE7_I2S6_RXD1 0x298C009C, 0X7, 0x298C0B38, 0X2, 0x298C009C
986 #define IOMUXC_PTE7_SDHC2_D5 0x298C009C, 0X8, 0x298C0AAC, 0X1, 0x298C009C
987 #define IOMUXC_PTE7_FLEXSPI2_B_DATA3 0x298C009C, 0X9, 0x298C0960, 0X2, 0x298C009C
988 #define IOMUXC_PTE7_ENET0_RXD3 0x298C009C, 0XA, 0x298C0B04, 0X1, 0x298C009C
989 #define IOMUXC_PTE7_DBI0_D2 0x298C009C, 0XB, 0x00000000, 0x0, 0x298C009C
990 #define IOMUXC_PTE7_EPDC0_BDR1 0x298C009C, 0XC, 0x00000000, 0x0, 0x298C009C
991 #define IOMUXC_PTE7_WUU1_P4 0x298C009C, 0XD, 0x00000000, 0x0, 0x298C009C
992 #define IOMUXC_PTE7_DEBUG_MUX0_15 0x298C009C, 0XE, 0x00000000, 0x0, 0x298C009C
993 #define IOMUXC_PTE7_DEBUG_MUX1_18 0x298C009C, 0XF, 0x00000000, 0x0, 0x298C009C
994 #define IOMUXC_PTE8_PTE8 0x298C00A0, 0X1, 0x00000000, 0x0, 0x298C00A0
995 #define IOMUXC_PTE8_FXIO1_D15 0x298C00A0, 0X2, 0x298C0858, 0X1, 0x298C00A0
996 #define IOMUXC_PTE8_LPSPI4_PCS1 0x298C00A0, 0X3, 0x298C08F8, 0X2, 0x298C00A0
997 #define IOMUXC_PTE8_LPUART6_CTS_B 0x298C00A0, 0X4, 0x298C09CC, 0X1, 0x298C00A0
998 #define IOMUXC_PTE8_LPI2C6_SCL 0x298C00A0, 0X5, 0x298C09B8, 0X1, 0x298C00A0
999 #define IOMUXC_PTE8_TPM4_CH0 0x298C00A0, 0X6, 0x298C0804, 0X1, 0x298C00A0
1000 #define IOMUXC_PTE8_I2S6_RXD2 0x298C00A0, 0X7, 0x298C0B3C, 0X2, 0x298C00A0
1001 #define IOMUXC_PTE8_SDHC2_D6 0x298C00A0, 0X8, 0x298C0AB0, 0X1, 0x298C00A0
1002 #define IOMUXC_PTE8_FLEXSPI2_B_DATA2 0x298C00A0, 0X9, 0x298C095C, 0X2, 0x298C00A0
1003 #define IOMUXC_PTE8_ENET0_RXD2 0x298C00A0, 0XA, 0x298C0B00, 0X1, 0x298C00A0
1004 #define IOMUXC_PTE8_DBI0_D3 0x298C00A0, 0XB, 0x00000000, 0x0, 0x298C00A0
1005 #define IOMUXC_PTE8_EPDC0_BDR0 0x298C00A0, 0XC, 0x00000000, 0x0, 0x298C00A0
1006 #define IOMUXC_PTE8_LP_HV_DBG_MUX_3 0x298C00A0, 0XE, 0x00000000, 0x0, 0x298C00A0
1007 #define IOMUXC_PTE8_DEBUG_MUX1_19 0x298C00A0, 0XF, 0x00000000, 0x0, 0x298C00A0
1008 #define IOMUXC_PTE9_PTE9 0x298C00A4, 0X1, 0x00000000, 0x0, 0x298C00A4
1009 #define IOMUXC_PTE9_FXIO1_D14 0x298C00A4, 0X2, 0x298C0854, 0X1, 0x298C00A4
1010 #define IOMUXC_PTE9_LPSPI4_PCS2 0x298C00A4, 0X3, 0x298C08FC, 0X2, 0x298C00A4
1011 #define IOMUXC_PTE9_LPUART6_RTS_B 0x298C00A4, 0X4, 0x00000000, 0x0, 0x298C00A4
1012 #define IOMUXC_PTE9_LPI2C6_SDA 0x298C00A4, 0X5, 0x298C09BC, 0X1, 0x298C00A4
1013 #define IOMUXC_PTE9_TPM4_CH1 0x298C00A4, 0X6, 0x298C0808, 0X1, 0x298C00A4
1014 #define IOMUXC_PTE9_I2S6_RXD3 0x298C00A4, 0X7, 0x298C0B40, 0X2, 0x298C00A4
1015 #define IOMUXC_PTE9_SDHC2_D7 0x298C00A4, 0X8, 0x298C0AB4, 0X1, 0x298C00A4
1016 #define IOMUXC_PTE9_FLEXSPI2_B_DATA1 0x298C00A4, 0X9, 0x298C0958, 0X2, 0x298C00A4
1017 #define IOMUXC_PTE9_ENET0_1588_TMR3 0x298C00A4, 0XA, 0x298C0AE0, 0X1, 0x298C00A4
1018 #define IOMUXC_PTE9_DBI0_D4 0x298C00A4, 0XB, 0x00000000, 0x0, 0x298C00A4
1019 #define IOMUXC_PTE9_EPDC0_VCOM1 0x298C00A4, 0XC, 0x00000000, 0x0, 0x298C00A4
1020 #define IOMUXC_PTE9_LP_HV_DBG_MUX_4 0x298C00A4, 0XE, 0x00000000, 0x0, 0x298C00A4
1021 #define IOMUXC_PTE9_DEBUG_MUX1_20 0x298C00A4, 0XF, 0x00000000, 0x0, 0x298C00A4
1022 #define IOMUXC_PTE10_PTE10 0x298C00A8, 0X1, 0x00000000, 0x0, 0x298C00A8
1023 #define IOMUXC_PTE10_FXIO1_D13 0x298C00A8, 0X2, 0x298C0850, 0X1, 0x298C00A8
1024 #define IOMUXC_PTE10_LPSPI4_PCS3 0x298C00A8, 0X3, 0x298C0900, 0X2, 0x298C00A8
1025 #define IOMUXC_PTE10_LPUART6_TX 0x298C00A8, 0X4, 0x298C09D4, 0X1, 0x298C00A8
1026 #define IOMUXC_PTE10_I3C2_SCL 0x298C00A8, 0X5, 0x298C08BC, 0X1, 0x298C00A8
1027 #define IOMUXC_PTE10_TPM4_CH2 0x298C00A8, 0X6, 0x298C080C, 0X1, 0x298C00A8
1028 #define IOMUXC_PTE10_I2S6_TX_BCLK 0x298C00A8, 0X7, 0x298C0B4C, 0X2, 0x298C00A8
1029 #define IOMUXC_PTE10_SDHC2_DQS 0x298C00A8, 0X8, 0x298C0AB8, 0X1, 0x298C00A8
1030 #define IOMUXC_PTE10_FLEXSPI2_B_DATA0 0x298C00A8, 0X9, 0x298C0954, 0X2, 0x298C00A8
1031 #define IOMUXC_PTE10_ENET0_1588_TMR2 0x298C00A8, 0XA, 0x298C0ADC, 0X1, 0x298C00A8
1032 #define IOMUXC_PTE10_DBI0_D5 0x298C00A8, 0XB, 0x00000000, 0x0, 0x298C00A8
1033 #define IOMUXC_PTE10_EPDC0_VCOM0 0x298C00A8, 0XC, 0x00000000, 0x0, 0x298C00A8
1034 #define IOMUXC_PTE10_LP_HV_DBG_MUX_5 0x298C00A8, 0XE, 0x00000000, 0x0, 0x298C00A8
1035 #define IOMUXC_PTE10_DEBUG_MUX1_21 0x298C00A8, 0XF, 0x00000000, 0x0, 0x298C00A8
1036 #define IOMUXC_PTE11_PTE11 0x298C00AC, 0X1, 0x00000000, 0x0, 0x298C00AC
1037 #define IOMUXC_PTE11_FXIO1_D12 0x298C00AC, 0X2, 0x298C084C, 0X1, 0x298C00AC
1038 #define IOMUXC_PTE11_SPDIF_OUT2 0x298C00AC, 0X3, 0x00000000, 0x0, 0x298C00AC
1039 #define IOMUXC_PTE11_LPUART6_RX 0x298C00AC, 0X4, 0x298C09D0, 0X1, 0x298C00AC
1040 #define IOMUXC_PTE11_I3C2_SDA 0x298C00AC, 0X5, 0x298C08C0, 0X1, 0x298C00AC
1041 #define IOMUXC_PTE11_TPM4_CH3 0x298C00AC, 0X6, 0x298C0810, 0X1, 0x298C00AC
1042 #define IOMUXC_PTE11_I2S6_TX_FS 0x298C00AC, 0X7, 0x298C0B50, 0X2, 0x298C00AC
1043 #define IOMUXC_PTE11_FLEXSPI2_B_SCLK_B 0x298C00AC, 0X8, 0x00000000, 0x0, 0x298C00AC
1044 #define IOMUXC_PTE11_FLEXSPI2_B_SS0_B 0x298C00AC, 0X9, 0x00000000, 0x0, 0x298C00AC
1045 #define IOMUXC_PTE11_ENET0_1588_TMR1 0x298C00AC, 0XA, 0x298C0AD8, 0X1, 0x298C00AC
1046 #define IOMUXC_PTE11_DBI0_D6 0x298C00AC, 0XB, 0x00000000, 0x0, 0x298C00AC
1047 #define IOMUXC_PTE11_EPDC0_PWRCTRL0 0x298C00AC, 0XC, 0x00000000, 0x0, 0x298C00AC
1048 #define IOMUXC_PTE11_LP_HV_DBG_MUX_6 0x298C00AC, 0XF, 0x00000000, 0x0, 0x298C00AC
1049 #define IOMUXC_PTE12_PTE12 0x298C00B0, 0X1, 0x00000000, 0x0, 0x298C00B0
1050 #define IOMUXC_PTE12_FXIO1_D11 0x298C00B0, 0X2, 0x298C0848, 0X1, 0x298C00B0
1051 #define IOMUXC_PTE12_LPSPI4_SIN 0x298C00B0, 0X3, 0x298C0908, 0X2, 0x298C00B0
1052 #define IOMUXC_PTE12_LPUART7_CTS_B 0x298C00B0, 0X4, 0x298C09D8, 0X1, 0x298C00B0
1053 #define IOMUXC_PTE12_LPI2C7_SCL 0x298C00B0, 0X5, 0x298C09C4, 0X1, 0x298C00B0
1054 #define IOMUXC_PTE12_TPM4_CH4 0x298C00B0, 0X6, 0x298C0814, 0X1, 0x298C00B0
1055 #define IOMUXC_PTE12_I2S6_TXD0 0x298C00B0, 0X7, 0x00000000, 0x0, 0x298C00B0
1056 #define IOMUXC_PTE12_SDHC2_RESET_B 0x298C00B0, 0X8, 0x00000000, 0x0, 0x298C00B0
1057 #define IOMUXC_PTE12_FLEXSPI2_B_SS1_B 0x298C00B0, 0X9, 0x00000000, 0x0, 0x298C00B0
1058 #define IOMUXC_PTE12_ENET0_1588_TMR0 0x298C00B0, 0XA, 0x298C0AD4, 0X1, 0x298C00B0
1059 #define IOMUXC_PTE12_DBI0_D7 0x298C00B0, 0XB, 0x00000000, 0x0, 0x298C00B0
1060 #define IOMUXC_PTE12_EPDC0_PWRCTRL1 0x298C00B0, 0XC, 0x00000000, 0x0, 0x298C00B0
1061 #define IOMUXC_PTE12_WUU1_P5 0x298C00B0, 0XD, 0x00000000, 0x0, 0x298C00B0
1062 #define IOMUXC_PTE13_PTE13 0x298C00B4, 0X1, 0x00000000, 0x0, 0x298C00B4
1063 #define IOMUXC_PTE13_FXIO1_D10 0x298C00B4, 0X2, 0x298C0844, 0X1, 0x298C00B4
1064 #define IOMUXC_PTE13_LPSPI4_SOUT 0x298C00B4, 0X3, 0x298C090C, 0X2, 0x298C00B4
1065 #define IOMUXC_PTE13_LPUART7_RTS_B 0x298C00B4, 0X4, 0x00000000, 0x0, 0x298C00B4
1066 #define IOMUXC_PTE13_LPI2C7_SDA 0x298C00B4, 0X5, 0x298C09C8, 0X1, 0x298C00B4
1067 #define IOMUXC_PTE13_TPM4_CH5 0x298C00B4, 0X6, 0x298C0818, 0X1, 0x298C00B4
1068 #define IOMUXC_PTE13_I2S6_TXD1 0x298C00B4, 0X7, 0x00000000, 0x0, 0x298C00B4
1069 #define IOMUXC_PTE13_SDHC1_WP 0x298C00B4, 0X8, 0x298C0A88, 0X2, 0x298C00B4
1070 #define IOMUXC_PTE13_ENET0_1588_CLKIN 0x298C00B4, 0XA, 0x298C0AD0, 0X1, 0x298C00B4
1071 #define IOMUXC_PTE13_DBI0_D8 0x298C00B4, 0XB, 0x00000000, 0x0, 0x298C00B4
1072 #define IOMUXC_PTE13_EPDC0_PWRCTRL2 0x298C00B4, 0XC, 0x00000000, 0x0, 0x298C00B4
1073 #define IOMUXC_PTE13_LP_HV_DBG_MUX_7 0x298C00B4, 0XF, 0x00000000, 0x0, 0x298C00B4
1074 #define IOMUXC_PTE14_PTE14 0x298C00B8, 0X1, 0x00000000, 0x0, 0x298C00B8
1075 #define IOMUXC_PTE14_FXIO1_D9 0x298C00B8, 0X2, 0x298C08B8, 0X1, 0x298C00B8
1076 #define IOMUXC_PTE14_LPSPI4_SCK 0x298C00B8, 0X3, 0x298C0904, 0X2, 0x298C00B8
1077 #define IOMUXC_PTE14_LPUART7_TX 0x298C00B8, 0X4, 0x298C09E0, 0X1, 0x298C00B8
1078 #define IOMUXC_PTE14_LPI2C7_HREQ 0x298C00B8, 0X5, 0x298C09C0, 0X1, 0x298C00B8
1079 #define IOMUXC_PTE14_TPM5_CLKIN 0x298C00B8, 0X6, 0x298C0838, 0X1, 0x298C00B8
1080 #define IOMUXC_PTE14_I2S6_TXD2 0x298C00B8, 0X7, 0x00000000, 0x0, 0x298C00B8
1081 #define IOMUXC_PTE14_SDHC1_CD 0x298C00B8, 0X8, 0x298C0A58, 0X2, 0x298C00B8
1082 #define IOMUXC_PTE14_ENET0_MDIO 0x298C00B8, 0XA, 0x298C0AF0, 0X1, 0x298C00B8
1083 #define IOMUXC_PTE14_DBI0_D9 0x298C00B8, 0XB, 0x00000000, 0x0, 0x298C00B8
1084 #define IOMUXC_PTE14_EPDC0_PWRCTRL3 0x298C00B8, 0XC, 0x00000000, 0x0, 0x298C00B8
1085 #define IOMUXC_PTE14_LP_HV_DBG_MUX_8 0x298C00B8, 0XF, 0x00000000, 0x0, 0x298C00B8
1086 #define IOMUXC_PTE15_PTE15 0x298C00BC, 0X1, 0x00000000, 0x0, 0x298C00BC
1087 #define IOMUXC_PTE15_FXIO1_D8 0x298C00BC, 0X2, 0x298C08B4, 0X1, 0x298C00BC
1088 #define IOMUXC_PTE15_LPSPI4_PCS0 0x298C00BC, 0X3, 0x298C08F4, 0X2, 0x298C00BC
1089 #define IOMUXC_PTE15_LPUART7_RX 0x298C00BC, 0X4, 0x298C09DC, 0X1, 0x298C00BC
1090 #define IOMUXC_PTE15_I3C2_PUR 0x298C00BC, 0X5, 0x00000000, 0x0, 0x298C00BC
1091 #define IOMUXC_PTE15_TPM5_CH0 0x298C00BC, 0X6, 0x298C0820, 0X1, 0x298C00BC
1092 #define IOMUXC_PTE15_I2S6_TXD3 0x298C00BC, 0X7, 0x00000000, 0x0, 0x298C00BC
1093 #define IOMUXC_PTE15_MQS1_LEFT 0x298C00BC, 0X8, 0x00000000, 0x0, 0x298C00BC
1094 #define IOMUXC_PTE15_ENET0_MDC 0x298C00BC, 0XA, 0x00000000, 0x0, 0x298C00BC
1095 #define IOMUXC_PTE15_DBI0_D10 0x298C00BC, 0XB, 0x00000000, 0x0, 0x298C00BC
1096 #define IOMUXC_PTE15_EPDC0_PWRCOM 0x298C00BC, 0XC, 0x00000000, 0x0, 0x298C00BC
1097 #define IOMUXC_PTE15_WUU1_P6 0x298C00BC, 0XD, 0x00000000, 0x0, 0x298C00BC
1098 #define IOMUXC_PTE16_PTE16 0x298C00C0, 0X1, 0x00000000, 0x0, 0x298C00C0
1099 #define IOMUXC_PTE16_FXIO1_D7 0x298C00C0, 0X2, 0x298C08B0, 0X1, 0x298C00C0
1100 #define IOMUXC_PTE16_LPSPI5_PCS1 0x298C00C0, 0X3, 0x298C0914, 0X1, 0x298C00C0
1101 #define IOMUXC_PTE16_LPUART4_CTS_B 0x298C00C0, 0X4, 0x298C08DC, 0X2, 0x298C00C0
1102 #define IOMUXC_PTE16_LPI2C4_SCL 0x298C00C0, 0X5, 0x298C08C8, 0X2, 0x298C00C0
1103 #define IOMUXC_PTE16_TPM5_CH1 0x298C00C0, 0X6, 0x298C0824, 0X1, 0x298C00C0
1104 #define IOMUXC_PTE16_MQS1_LEFT 0x298C00C0, 0X7, 0x00000000, 0x0, 0x298C00C0
1105 #define IOMUXC_PTE16_MQS1_RIGHT 0x298C00C0, 0X8, 0x00000000, 0x0, 0x298C00C0
1106 #define IOMUXC_PTE16_USB0_ID 0x298C00C0, 0X9, 0x298C0AC8, 0X2, 0x298C00C0
1107 #define IOMUXC_PTE16_ENET0_TXEN 0x298C00C0, 0XA, 0x00000000, 0x0, 0x298C00C0
1108 #define IOMUXC_PTE16_DBI0_D11 0x298C00C0, 0XB, 0x00000000, 0x0, 0x298C00C0
1109 #define IOMUXC_PTE16_EPDC0_PWRIRQ 0x298C00C0, 0XC, 0x00000000, 0x0, 0x298C00C0
1110 #define IOMUXC_PTE16_WDOG3_RST 0x298C00C0, 0XD, 0x00000000, 0x0, 0x298C00C0
1111 #define IOMUXC_PTE16_LP_HV_DBG_MUX_9 0x298C00C0, 0XF, 0x00000000, 0x0, 0x298C00C0
1112 #define IOMUXC_PTE17_PTE17 0x298C00C4, 0X1, 0x00000000, 0x0, 0x298C00C4
1113 #define IOMUXC_PTE17_FXIO1_D6 0x298C00C4, 0X2, 0x298C08AC, 0X1, 0x298C00C4
1114 #define IOMUXC_PTE17_LPSPI5_PCS2 0x298C00C4, 0X3, 0x298C0918, 0X1, 0x298C00C4
1115 #define IOMUXC_PTE17_LPUART4_RTS_B 0x298C00C4, 0X4, 0x00000000, 0x0, 0x298C00C4
1116 #define IOMUXC_PTE17_LPI2C4_SDA 0x298C00C4, 0X5, 0x298C08CC, 0X2, 0x298C00C4
1117 #define IOMUXC_PTE17_MQS1_RIGHT 0x298C00C4, 0X7, 0x00000000, 0x0, 0x298C00C4
1118 #define IOMUXC_PTE17_SDHC1_VS 0x298C00C4, 0X8, 0x00000000, 0x0, 0x298C00C4
1119 #define IOMUXC_PTE17_USB0_PWR 0x298C00C4, 0X9, 0x00000000, 0x0, 0x298C00C4
1120 #define IOMUXC_PTE17_ENET0_RXER 0x298C00C4, 0XA, 0x298C0B08, 0X1, 0x298C00C4
1121 #define IOMUXC_PTE17_DBI0_D12 0x298C00C4, 0XB, 0x00000000, 0x0, 0x298C00C4
1122 #define IOMUXC_PTE17_EPDC0_PWRSTAT 0x298C00C4, 0XC, 0x00000000, 0x0, 0x298C00C4
1123 #define IOMUXC_PTE17_LP_HV_DBG_MUX_10 0x298C00C4, 0XF, 0x00000000, 0x0, 0x298C00C4
1124 #define IOMUXC_PTE18_PTE18 0x298C00C8, 0X1, 0x00000000, 0x0, 0x298C00C8
1125 #define IOMUXC_PTE18_FXIO1_D5 0x298C00C8, 0X2, 0x298C08A8, 0X1, 0x298C00C8
1126 #define IOMUXC_PTE18_LPSPI5_PCS3 0x298C00C8, 0X3, 0x298C091C, 0X1, 0x298C00C8
1127 #define IOMUXC_PTE18_LPUART4_TX 0x298C00C8, 0X4, 0x298C08E4, 0X2, 0x298C00C8
1128 #define IOMUXC_PTE18_LPI2C4_HREQ 0x298C00C8, 0X5, 0x298C08C4, 0X2, 0x298C00C8
1129 #define IOMUXC_PTE18_I2S7_TX_BCLK 0x298C00C8, 0X7, 0x298C0B6C, 0X2, 0x298C00C8
1130 #define IOMUXC_PTE18_USB0_OC 0x298C00C8, 0X9, 0x298C0AC0, 0X2, 0x298C00C8
1131 #define IOMUXC_PTE18_ENET0_CRS_DV 0x298C00C8, 0XA, 0x298C0AEC, 0X1, 0x298C00C8
1132 #define IOMUXC_PTE18_DBI0_D13 0x298C00C8, 0XB, 0x00000000, 0x0, 0x298C00C8
1133 #define IOMUXC_PTE18_EPDC0_PWRWAKE 0x298C00C8, 0XC, 0x00000000, 0x0, 0x298C00C8
1134 #define IOMUXC_PTE18_LP_HV_DBG_MUX_11 0x298C00C8, 0XF, 0x00000000, 0x0, 0x298C00C8
1135 #define IOMUXC_PTE19_PTE19 0x298C00CC, 0X1, 0x00000000, 0x0, 0x298C00CC
1136 #define IOMUXC_PTE19_FXIO1_D4 0x298C00CC, 0X2, 0x298C08A4, 0X1, 0x298C00CC
1137 #define IOMUXC_PTE19_LPUART4_RX 0x298C00CC, 0X4, 0x298C08E0, 0X2, 0x298C00CC
1138 #define IOMUXC_PTE19_LPI2C5_HREQ 0x298C00CC, 0X5, 0x298C08D0, 0X2, 0x298C00CC
1139 #define IOMUXC_PTE19_I3C2_PUR 0x298C00CC, 0X6, 0x00000000, 0x0, 0x298C00CC
1140 #define IOMUXC_PTE19_I2S7_TX_FS 0x298C00CC, 0X7, 0x298C0B70, 0X2, 0x298C00CC
1141 #define IOMUXC_PTE19_USB1_PWR 0x298C00CC, 0X9, 0x00000000, 0x0, 0x298C00CC
1142 #define IOMUXC_PTE19_ENET0_REFCLK 0x298C00CC, 0XA, 0x298C0AF4, 0X1, 0x298C00CC
1143 #define IOMUXC_PTE19_DBI0_D14 0x298C00CC, 0XB, 0x00000000, 0x0, 0x298C00CC
1144 #define IOMUXC_PTE19_EPDC0_GDCLK 0x298C00CC, 0XC, 0x00000000, 0x0, 0x298C00CC
1145 #define IOMUXC_PTE19_WUU1_P7 0x298C00CC, 0XD, 0x00000000, 0x0, 0x298C00CC
1146 #define IOMUXC_PTE20_PTE20 0x298C00D0, 0X1, 0x00000000, 0x0, 0x298C00D0
1147 #define IOMUXC_PTE20_FXIO1_D3 0x298C00D0, 0X2, 0x298C0898, 0X1, 0x298C00D0
1148 #define IOMUXC_PTE20_LPSPI5_SIN 0x298C00D0, 0X3, 0x298C0924, 0X1, 0x298C00D0
1149 #define IOMUXC_PTE20_LPUART5_CTS_B 0x298C00D0, 0X4, 0x298C08E8, 0X2, 0x298C00D0
1150 #define IOMUXC_PTE20_LPI2C5_SCL 0x298C00D0, 0X5, 0x298C08D4, 0X2, 0x298C00D0
1151 #define IOMUXC_PTE20_I2S7_TXD0 0x298C00D0, 0X7, 0x00000000, 0x0, 0x298C00D0
1152 #define IOMUXC_PTE20_USB1_OC 0x298C00D0, 0X9, 0x298C0AC4, 0X2, 0x298C00D0
1153 #define IOMUXC_PTE20_ENET0_RXD1 0x298C00D0, 0XA, 0x298C0AFC, 0X1, 0x298C00D0
1154 #define IOMUXC_PTE20_DBI0_D15 0x298C00D0, 0XB, 0x00000000, 0x0, 0x298C00D0
1155 #define IOMUXC_PTE20_EPDC0_GDOE 0x298C00D0, 0XC, 0x00000000, 0x0, 0x298C00D0
1156 #define IOMUXC_PTE20_LP_HV_DBG_MUX_12 0x298C00D0, 0XF, 0x00000000, 0x0, 0x298C00D0
1157 #define IOMUXC_PTE21_PTE21 0x298C00D4, 0X1, 0x00000000, 0x0, 0x298C00D4
1158 #define IOMUXC_PTE21_FXIO1_D2 0x298C00D4, 0X2, 0x298C086C, 0X1, 0x298C00D4
1159 #define IOMUXC_PTE21_LPSPI5_SOUT 0x298C00D4, 0X3, 0x298C0928, 0X1, 0x298C00D4
1160 #define IOMUXC_PTE21_LPUART5_RTS_B 0x298C00D4, 0X4, 0x00000000, 0x0, 0x298C00D4
1161 #define IOMUXC_PTE21_LPI2C5_SDA 0x298C00D4, 0X5, 0x298C08D8, 0X2, 0x298C00D4
1162 #define IOMUXC_PTE21_TPM6_CLKIN 0x298C00D4, 0X6, 0x298C0994, 0X1, 0x298C00D4
1163 #define IOMUXC_PTE21_I2S7_TXD1 0x298C00D4, 0X7, 0x00000000, 0x0, 0x298C00D4
1164 #define IOMUXC_PTE21_USB1_ID 0x298C00D4, 0X9, 0x298C0ACC, 0X2, 0x298C00D4
1165 #define IOMUXC_PTE21_ENET0_RXD0 0x298C00D4, 0XA, 0x298C0AF8, 0X1, 0x298C00D4
1166 #define IOMUXC_PTE21_EPDC0_GDRL 0x298C00D4, 0XC, 0x00000000, 0x0, 0x298C00D4
1167 #define IOMUXC_PTE21_WDOG4_RST 0x298C00D4, 0XD, 0x00000000, 0x0, 0x298C00D4
1168 #define IOMUXC_PTE21_LP_HV_DBG_MUX_13 0x298C00D4, 0XF, 0x00000000, 0x0, 0x298C00D4
1169 #define IOMUXC_PTE22_PTE22 0x298C00D8, 0X1, 0x00000000, 0x0, 0x298C00D8
1170 #define IOMUXC_PTE22_FXIO1_D1 0x298C00D8, 0X2, 0x298C0840, 0X1, 0x298C00D8
1171 #define IOMUXC_PTE22_LPSPI5_SCK 0x298C00D8, 0X3, 0x298C0920, 0X1, 0x298C00D8
1172 #define IOMUXC_PTE22_LPUART5_TX 0x298C00D8, 0X4, 0x298C08F0, 0X2, 0x298C00D8
1173 #define IOMUXC_PTE22_I3C2_SCL 0x298C00D8, 0X5, 0x298C08BC, 0X2, 0x298C00D8
1174 #define IOMUXC_PTE22_TPM6_CH0 0x298C00D8, 0X6, 0x298C097C, 0X1, 0x298C00D8
1175 #define IOMUXC_PTE22_I2S7_TXD2 0x298C00D8, 0X7, 0x00000000, 0x0, 0x298C00D8
1176 #define IOMUXC_PTE22_EXT_AUD_MCLK3 0x298C00D8, 0X9, 0x298C0B14, 0X5, 0x298C00D8
1177 #define IOMUXC_PTE22_ENET0_TXD1 0x298C00D8, 0XA, 0x00000000, 0x0, 0x298C00D8
1178 #define IOMUXC_PTE22_EPDC0_SDOED 0x298C00D8, 0XC, 0x00000000, 0x0, 0x298C00D8
1179 #define IOMUXC_PTE22_CLKOUT2 0x298C00D8, 0XD, 0x00000000, 0x0, 0x298C00D8
1180 #define IOMUXC_PTE22_LP_HV_DBG_MUX_14 0x298C00D8, 0XF, 0x00000000, 0x0, 0x298C00D8
1181 #define IOMUXC_PTE23_PTE23 0x298C00DC, 0X1, 0x00000000, 0x0, 0x298C00DC
1182 #define IOMUXC_PTE23_FXIO1_D0 0x298C00DC, 0X2, 0x298C083C, 0X1, 0x298C00DC
1183 #define IOMUXC_PTE23_LPSPI5_PCS0 0x298C00DC, 0X3, 0x298C0910, 0X1, 0x298C00DC
1184 #define IOMUXC_PTE23_LPUART5_RX 0x298C00DC, 0X4, 0x298C08EC, 0X2, 0x298C00DC
1185 #define IOMUXC_PTE23_I3C2_SDA 0x298C00DC, 0X5, 0x298C08C0, 0X2, 0x298C00DC
1186 #define IOMUXC_PTE23_TPM6_CH1 0x298C00DC, 0X6, 0x298C0980, 0X1, 0x298C00DC
1187 #define IOMUXC_PTE23_I2S7_TXD3 0x298C00DC, 0X7, 0x00000000, 0x0, 0x298C00DC
1188 #define IOMUXC_PTE23_EXT_AUD_MCLK2 0x298C00DC, 0X9, 0x298C0800, 0X1, 0x298C00DC
1189 #define IOMUXC_PTE23_ENET0_TXD0 0x298C00DC, 0XA, 0x00000000, 0x0, 0x298C00DC
1190 #define IOMUXC_PTE23_EPDC0_SDOEZ 0x298C00DC, 0XC, 0x00000000, 0x0, 0x298C00DC
1191 #define IOMUXC_PTE23_CLKOUT1 0x298C00DC, 0XD, 0x00000000, 0x0, 0x298C00DC
1192 #define IOMUXC_PTE23_LP_HV_DBG_MUX_15 0x298C00DC, 0XF, 0x00000000, 0x0, 0x298C00DC
1193 #define IOMUXC_PTF0_PTF0 0x298C0100, 0X1, 0x00000000, 0x0, 0x298C0100
1194 #define IOMUXC_PTF0_FXIO1_D0 0x298C0100, 0X2, 0x298C083C, 0X2, 0x298C0100
1195 #define IOMUXC_PTF0_LPUART6_CTS_B 0x298C0100, 0X4, 0x298C09CC, 0X2, 0x298C0100
1196 #define IOMUXC_PTF0_LPI2C6_SCL 0x298C0100, 0X5, 0x298C09B8, 0X2, 0x298C0100
1197 #define IOMUXC_PTF0_I2S7_RX_BCLK 0x298C0100, 0X7, 0x298C0B64, 0X2, 0x298C0100
1198 #define IOMUXC_PTF0_SDHC1_D1 0x298C0100, 0X8, 0x298C0A68, 0X2, 0x298C0100
1199 #define IOMUXC_PTF0_ENET0_RXD1 0x298C0100, 0X9, 0x298C0AFC, 0X2, 0x298C0100
1200 #define IOMUXC_PTF0_USB1_ID 0x298C0100, 0XA, 0x298C0ACC, 0X3, 0x298C0100
1201 #define IOMUXC_PTF0_EPDC0_SDOE 0x298C0100, 0XB, 0x00000000, 0x0, 0x298C0100
1202 #define IOMUXC_PTF0_DPI0_D23 0x298C0100, 0XC, 0x00000000, 0x0, 0x298C0100
1203 #define IOMUXC_PTF0_WUU1_P8 0x298C0100, 0XD, 0x00000000, 0x0, 0x298C0100
1204 #define IOMUXC_PTF1_PTF1 0x298C0104, 0X1, 0x00000000, 0x0, 0x298C0104
1205 #define IOMUXC_PTF1_FXIO1_D1 0x298C0104, 0X2, 0x298C0840, 0X2, 0x298C0104
1206 #define IOMUXC_PTF1_LPUART6_RTS_B 0x298C0104, 0X4, 0x00000000, 0x0, 0x298C0104
1207 #define IOMUXC_PTF1_LPI2C6_SDA 0x298C0104, 0X5, 0x298C09BC, 0X2, 0x298C0104
1208 #define IOMUXC_PTF1_I2S7_RX_FS 0x298C0104, 0X7, 0x298C0B68, 0X2, 0x298C0104
1209 #define IOMUXC_PTF1_SDHC1_D0 0x298C0104, 0X8, 0x298C0A64, 0X2, 0x298C0104
1210 #define IOMUXC_PTF1_ENET0_RXD0 0x298C0104, 0X9, 0x298C0AF8, 0X2, 0x298C0104
1211 #define IOMUXC_PTF1_LP_HV_DBG_MUX_16 0x298C0104, 0XA, 0x00000000, 0x0, 0x298C0104
1212 #define IOMUXC_PTF1_EPDC0_SDSHR 0x298C0104, 0XB, 0x00000000, 0x0, 0x298C0104
1213 #define IOMUXC_PTF1_DPI0_D22 0x298C0104, 0XC, 0x00000000, 0x0, 0x298C0104
1214 #define IOMUXC_PTF1_WDOG3_RST 0x298C0104, 0XD, 0x00000000, 0x0, 0x298C0104
1215 #define IOMUXC_PTF1_DEBUG_MUX0_16 0x298C0104, 0XE, 0x00000000, 0x0, 0x298C0104
1216 #define IOMUXC_PTF1_DEBUG_MUX1_22 0x298C0104, 0XF, 0x00000000, 0x0, 0x298C0104
1217 #define IOMUXC_PTF2_PTF2 0x298C0108, 0X1, 0x00000000, 0x0, 0x298C0108
1218 #define IOMUXC_PTF2_FXIO1_D2 0x298C0108, 0X2, 0x298C086C, 0X2, 0x298C0108
1219 #define IOMUXC_PTF2_LPUART6_TX 0x298C0108, 0X4, 0x298C09D4, 0X2, 0x298C0108
1220 #define IOMUXC_PTF2_LPI2C6_HREQ 0x298C0108, 0X5, 0x298C09B4, 0X2, 0x298C0108
1221 #define IOMUXC_PTF2_I2S7_RXD0 0x298C0108, 0X7, 0x298C0B54, 0X2, 0x298C0108
1222 #define IOMUXC_PTF2_SDHC1_CLK 0x298C0108, 0X8, 0x298C0A5C, 0X2, 0x298C0108
1223 #define IOMUXC_PTF2_ENET0_TXD1 0x298C0108, 0X9, 0x00000000, 0x0, 0x298C0108
1224 #define IOMUXC_PTF2_USB0_ID 0x298C0108, 0XA, 0x298C0AC8, 0X3, 0x298C0108
1225 #define IOMUXC_PTF2_EPDC0_SDCE9 0x298C0108, 0XB, 0x00000000, 0x0, 0x298C0108
1226 #define IOMUXC_PTF2_DPI0_D21 0x298C0108, 0XC, 0x00000000, 0x0, 0x298C0108
1227 #define IOMUXC_PTF2_LP_HV_DBG_MUX_17 0x298C0108, 0XD, 0x00000000, 0x0, 0x298C0108
1228 #define IOMUXC_PTF2_DEBUG_MUX0_17 0x298C0108, 0XE, 0x00000000, 0x0, 0x298C0108
1229 #define IOMUXC_PTF2_DEBUG_MUX1_23 0x298C0108, 0XF, 0x00000000, 0x0, 0x298C0108
1230 #define IOMUXC_PTF3_PTF3 0x298C010C, 0X1, 0x00000000, 0x0, 0x298C010C
1231 #define IOMUXC_PTF3_FXIO1_D3 0x298C010C, 0X2, 0x298C0898, 0X2, 0x298C010C
1232 #define IOMUXC_PTF3_LPUART6_RX 0x298C010C, 0X4, 0x298C09D0, 0X2, 0x298C010C
1233 #define IOMUXC_PTF3_LPI2C7_HREQ 0x298C010C, 0X5, 0x298C09C0, 0X2, 0x298C010C
1234 #define IOMUXC_PTF3_I2S7_RXD1 0x298C010C, 0X7, 0x298C0B58, 0X2, 0x298C010C
1235 #define IOMUXC_PTF3_SDHC1_CMD 0x298C010C, 0X8, 0x298C0A60, 0X2, 0x298C010C
1236 #define IOMUXC_PTF3_ENET0_TXD0 0x298C010C, 0X9, 0x00000000, 0x0, 0x298C010C
1237 #define IOMUXC_PTF3_USB0_PWR 0x298C010C, 0XA, 0x00000000, 0x0, 0x298C010C
1238 #define IOMUXC_PTF3_EPDC0_SDCE8 0x298C010C, 0XB, 0x00000000, 0x0, 0x298C010C
1239 #define IOMUXC_PTF3_DPI0_D20 0x298C010C, 0XC, 0x00000000, 0x0, 0x298C010C
1240 #define IOMUXC_PTF3_WUU1_P9 0x298C010C, 0XD, 0x00000000, 0x0, 0x298C010C
1241 #define IOMUXC_PTF3_DEBUG_MUX1_24 0x298C010C, 0XF, 0x00000000, 0x0, 0x298C010C
1242 #define IOMUXC_PTF4_PTF4 0x298C0110, 0X1, 0x00000000, 0x0, 0x298C0110
1243 #define IOMUXC_PTF4_FXIO1_D4 0x298C0110, 0X2, 0x298C08A4, 0X2, 0x298C0110
1244 #define IOMUXC_PTF4_LPSPI4_PCS1 0x298C0110, 0X3, 0x298C08F8, 0X3, 0x298C0110
1245 #define IOMUXC_PTF4_LPUART7_CTS_B 0x298C0110, 0X4, 0x298C09D8, 0X2, 0x298C0110
1246 #define IOMUXC_PTF4_LPI2C7_SCL 0x298C0110, 0X5, 0x298C09C4, 0X2, 0x298C0110
1247 #define IOMUXC_PTF4_TPM7_CLKIN 0x298C0110, 0X6, 0x298C09B0, 0X1, 0x298C0110
1248 #define IOMUXC_PTF4_I2S7_RXD2 0x298C0110, 0X7, 0x298C0B5C, 0X2, 0x298C0110
1249 #define IOMUXC_PTF4_SDHC1_D3 0x298C0110, 0X8, 0x298C0A70, 0X2, 0x298C0110
1250 #define IOMUXC_PTF4_ENET0_TXEN 0x298C0110, 0X9, 0x00000000, 0x0, 0x298C0110
1251 #define IOMUXC_PTF4_USB0_OC 0x298C0110, 0XA, 0x298C0AC0, 0X3, 0x298C0110
1252 #define IOMUXC_PTF4_EPDC0_SDCE7 0x298C0110, 0XB, 0x00000000, 0x0, 0x298C0110
1253 #define IOMUXC_PTF4_DPI0_D19 0x298C0110, 0XC, 0x00000000, 0x0, 0x298C0110
1254 #define IOMUXC_PTF4_WUU1_P10 0x298C0110, 0XD, 0x00000000, 0x0, 0x298C0110
1255 #define IOMUXC_PTF4_DEBUG_MUX1_25 0x298C0110, 0XF, 0x00000000, 0x0, 0x298C0110
1256 #define IOMUXC_PTF5_PTF5 0x298C0114, 0X1, 0x00000000, 0x0, 0x298C0114
1257 #define IOMUXC_PTF5_FXIO1_D5 0x298C0114, 0X2, 0x298C08A8, 0X2, 0x298C0114
1258 #define IOMUXC_PTF5_LPSPI4_PCS2 0x298C0114, 0X3, 0x298C08FC, 0X3, 0x298C0114
1259 #define IOMUXC_PTF5_LPUART7_RTS_B 0x298C0114, 0X4, 0x00000000, 0x0, 0x298C0114
1260 #define IOMUXC_PTF5_LPI2C7_SDA 0x298C0114, 0X5, 0x298C09C8, 0X2, 0x298C0114
1261 #define IOMUXC_PTF5_TPM7_CH0 0x298C0114, 0X6, 0x298C0998, 0X1, 0x298C0114
1262 #define IOMUXC_PTF5_I2S7_RXD3 0x298C0114, 0X7, 0x298C0B60, 0X2, 0x298C0114
1263 #define IOMUXC_PTF5_SDHC1_D2 0x298C0114, 0X8, 0x298C0A6C, 0X2, 0x298C0114
1264 #define IOMUXC_PTF5_ENET0_RXER 0x298C0114, 0X9, 0x298C0B08, 0X2, 0x298C0114
1265 #define IOMUXC_PTF5_USB1_PWR 0x298C0114, 0XA, 0x00000000, 0x0, 0x298C0114
1266 #define IOMUXC_PTF5_EPDC0_SDCE6 0x298C0114, 0XB, 0x00000000, 0x0, 0x298C0114
1267 #define IOMUXC_PTF5_DPI0_D18 0x298C0114, 0XC, 0x00000000, 0x0, 0x298C0114
1268 #define IOMUXC_PTF5_LP_HV_DBG_MUX_18 0x298C0114, 0XD, 0x00000000, 0x0, 0x298C0114
1269 #define IOMUXC_PTF5_DEBUG_MUX0_18 0x298C0114, 0XE, 0x00000000, 0x0, 0x298C0114
1270 #define IOMUXC_PTF5_DEBUG_MUX1_26 0x298C0114, 0XF, 0x00000000, 0x0, 0x298C0114
1271 #define IOMUXC_PTF6_LP_HV_DBG_MUX_19 0x298C0118, 0X0, 0x00000000, 0x0, 0x298C0118
1272 #define IOMUXC_PTF6_PTF6 0x298C0118, 0X1, 0x00000000, 0x0, 0x298C0118
1273 #define IOMUXC_PTF6_FXIO1_D6 0x298C0118, 0X2, 0x298C08AC, 0X2, 0x298C0118
1274 #define IOMUXC_PTF6_LPSPI4_PCS3 0x298C0118, 0X3, 0x298C0900, 0X3, 0x298C0118
1275 #define IOMUXC_PTF6_LPUART7_TX 0x298C0118, 0X4, 0x298C09E0, 0X2, 0x298C0118
1276 #define IOMUXC_PTF6_I3C2_SCL 0x298C0118, 0X5, 0x298C08BC, 0X3, 0x298C0118
1277 #define IOMUXC_PTF6_TPM7_CH1 0x298C0118, 0X6, 0x298C099C, 0X1, 0x298C0118
1278 #define IOMUXC_PTF6_I2S7_MCLK 0x298C0118, 0X7, 0x00000000, 0x0, 0x298C0118
1279 #define IOMUXC_PTF6_SDHC1_D4 0x298C0118, 0X8, 0x298C0A74, 0X2, 0x298C0118
1280 #define IOMUXC_PTF6_ENET0_CRS_DV 0x298C0118, 0X9, 0x298C0AEC, 0X2, 0x298C0118
1281 #define IOMUXC_PTF6_USB1_OC 0x298C0118, 0XA, 0x298C0AC4, 0X3, 0x298C0118
1282 #define IOMUXC_PTF6_EPDC0_SDCE5 0x298C0118, 0XB, 0x00000000, 0x0, 0x298C0118
1283 #define IOMUXC_PTF6_DPI0_D17 0x298C0118, 0XC, 0x00000000, 0x0, 0x298C0118
1284 #define IOMUXC_PTF6_WDOG4_RST 0x298C0118, 0XD, 0x00000000, 0x0, 0x298C0118
1285 #define IOMUXC_PTF6_DEBUG_MUX0_19 0x298C0118, 0XE, 0x00000000, 0x0, 0x298C0118
1286 #define IOMUXC_PTF6_DEBUG_MUX1_27 0x298C0118, 0XF, 0x00000000, 0x0, 0x298C0118
1287 #define IOMUXC_PTF7_PTF7 0x298C011C, 0X1, 0x00000000, 0x0, 0x298C011C
1288 #define IOMUXC_PTF7_FXIO1_D7 0x298C011C, 0X2, 0x298C08B0, 0X2, 0x298C011C
1289 #define IOMUXC_PTF7_LPUART7_RX 0x298C011C, 0X4, 0x298C09DC, 0X2, 0x298C011C
1290 #define IOMUXC_PTF7_I3C2_SDA 0x298C011C, 0X5, 0x298C08C0, 0X3, 0x298C011C
1291 #define IOMUXC_PTF7_TPM7_CH2 0x298C011C, 0X6, 0x298C09A0, 0X1, 0x298C011C
1292 #define IOMUXC_PTF7_MQS1_LEFT 0x298C011C, 0X7, 0x00000000, 0x0, 0x298C011C
1293 #define IOMUXC_PTF7_SDHC1_D5 0x298C011C, 0X8, 0x298C0A78, 0X2, 0x298C011C
1294 #define IOMUXC_PTF7_ENET0_REFCLK 0x298C011C, 0X9, 0x298C0AF4, 0X2, 0x298C011C
1295 #define IOMUXC_PTF7_TRACE0_D15 0x298C011C, 0XA, 0x00000000, 0x0, 0x298C011C
1296 #define IOMUXC_PTF7_EPDC0_SDCE4 0x298C011C, 0XB, 0x00000000, 0x0, 0x298C011C
1297 #define IOMUXC_PTF7_DPI0_D16 0x298C011C, 0XC, 0x00000000, 0x0, 0x298C011C
1298 #define IOMUXC_PTF7_WUU1_P11 0x298C011C, 0XD, 0x00000000, 0x0, 0x298C011C
1299 #define IOMUXC_PTF7_DEBUG_MUX1_28 0x298C011C, 0XF, 0x00000000, 0x0, 0x298C011C
1300 #define IOMUXC_PTF8_PTF8 0x298C0120, 0X1, 0x00000000, 0x0, 0x298C0120
1301 #define IOMUXC_PTF8_FXIO1_D8 0x298C0120, 0X2, 0x298C08B4, 0X2, 0x298C0120
1302 #define IOMUXC_PTF8_LPSPI4_SIN 0x298C0120, 0X3, 0x298C0908, 0X3, 0x298C0120
1303 #define IOMUXC_PTF8_LPUART4_CTS_B 0x298C0120, 0X4, 0x298C08DC, 0X3, 0x298C0120
1304 #define IOMUXC_PTF8_LPI2C4_SCL 0x298C0120, 0X5, 0x298C08C8, 0X3, 0x298C0120
1305 #define IOMUXC_PTF8_TPM7_CH3 0x298C0120, 0X6, 0x298C09A4, 0X1, 0x298C0120
1306 #define IOMUXC_PTF8_MQS1_RIGHT 0x298C0120, 0X7, 0x00000000, 0x0, 0x298C0120
1307 #define IOMUXC_PTF8_SDHC1_D6 0x298C0120, 0X8, 0x298C0A7C, 0X2, 0x298C0120
1308 #define IOMUXC_PTF8_ENET0_MDIO 0x298C0120, 0X9, 0x298C0AF0, 0X2, 0x298C0120
1309 #define IOMUXC_PTF8_TRACE0_D14 0x298C0120, 0XA, 0x00000000, 0x0, 0x298C0120
1310 #define IOMUXC_PTF8_EPDC0_D15 0x298C0120, 0XB, 0x00000000, 0x0, 0x298C0120
1311 #define IOMUXC_PTF8_DPI0_D15 0x298C0120, 0XC, 0x00000000, 0x0, 0x298C0120
1312 #define IOMUXC_PTF8_LP_HV_DBG_MUX_24 0x298C0120, 0XE, 0x00000000, 0x0, 0x298C0120
1313 #define IOMUXC_PTF8_DEBUG_MUX1_29 0x298C0120, 0XF, 0x00000000, 0x0, 0x298C0120
1314 #define IOMUXC_PTF9_PTF9 0x298C0124, 0X1, 0x00000000, 0x0, 0x298C0124
1315 #define IOMUXC_PTF9_FXIO1_D9 0x298C0124, 0X2, 0x298C08B8, 0X2, 0x298C0124
1316 #define IOMUXC_PTF9_LPSPI4_SOUT 0x298C0124, 0X3, 0x298C090C, 0X3, 0x298C0124
1317 #define IOMUXC_PTF9_LPUART4_RTS_B 0x298C0124, 0X4, 0x00000000, 0x0, 0x298C0124
1318 #define IOMUXC_PTF9_LPI2C4_SDA 0x298C0124, 0X5, 0x298C08CC, 0X3, 0x298C0124
1319 #define IOMUXC_PTF9_TPM7_CH4 0x298C0124, 0X6, 0x298C09A8, 0X1, 0x298C0124
1320 #define IOMUXC_PTF9_EXT_AUD_MCLK2 0x298C0124, 0X7, 0x298C0800, 0X2, 0x298C0124
1321 #define IOMUXC_PTF9_SDHC1_D7 0x298C0124, 0X8, 0x298C0A80, 0X2, 0x298C0124
1322 #define IOMUXC_PTF9_ENET0_MDC 0x298C0124, 0X9, 0x00000000, 0x0, 0x298C0124
1323 #define IOMUXC_PTF9_TRACE0_D13 0x298C0124, 0XA, 0x00000000, 0x0, 0x298C0124
1324 #define IOMUXC_PTF9_EPDC0_D14 0x298C0124, 0XB, 0x00000000, 0x0, 0x298C0124
1325 #define IOMUXC_PTF9_DPI0_D14 0x298C0124, 0XC, 0x00000000, 0x0, 0x298C0124
1326 #define IOMUXC_PTF9_LP_HV_DBG_MUX_25 0x298C0124, 0XE, 0x00000000, 0x0, 0x298C0124
1327 #define IOMUXC_PTF9_DEBUG_MUX1_30 0x298C0124, 0XF, 0x00000000, 0x0, 0x298C0124
1328 #define IOMUXC_PTF10_LP_HV_DBG_MUX_26 0x298C0128, 0X0, 0x00000000, 0x0, 0x298C0128
1329 #define IOMUXC_PTF10_PTF10 0x298C0128, 0X1, 0x00000000, 0x0, 0x298C0128
1330 #define IOMUXC_PTF10_FXIO1_D10 0x298C0128, 0X2, 0x298C0844, 0X2, 0x298C0128
1331 #define IOMUXC_PTF10_LPSPI4_SCK 0x298C0128, 0X3, 0x298C0904, 0X3, 0x298C0128
1332 #define IOMUXC_PTF10_LPUART4_TX 0x298C0128, 0X4, 0x298C08E4, 0X3, 0x298C0128
1333 #define IOMUXC_PTF10_LPI2C4_HREQ 0x298C0128, 0X5, 0x298C08C4, 0X3, 0x298C0128
1334 #define IOMUXC_PTF10_TPM7_CH5 0x298C0128, 0X6, 0x298C09AC, 0X1, 0x298C0128
1335 #define IOMUXC_PTF10_I2S4_RX_BCLK 0x298C0128, 0X7, 0x00000000, 0x0, 0x298C0128
1336 #define IOMUXC_PTF10_SDHC1_DQS 0x298C0128, 0X8, 0x298C0A84, 0X2, 0x298C0128
1337 #define IOMUXC_PTF10_ENET0_1588_CLKIN 0x298C0128, 0X9, 0x298C0AD0, 0X2, 0x298C0128
1338 #define IOMUXC_PTF10_TRACE0_D12 0x298C0128, 0XA, 0x00000000, 0x0, 0x298C0128
1339 #define IOMUXC_PTF10_EPDC0_D13 0x298C0128, 0XB, 0x00000000, 0x0, 0x298C0128
1340 #define IOMUXC_PTF10_DPI0_D13 0x298C0128, 0XC, 0x00000000, 0x0, 0x298C0128
1341 #define IOMUXC_PTF10_DEBUG_MUX0_20 0x298C0128, 0XE, 0x00000000, 0x0, 0x298C0128
1342 #define IOMUXC_PTF10_DEBUG_MUX1_31 0x298C0128, 0XF, 0x00000000, 0x0, 0x298C0128
1343 #define IOMUXC_PTF11_PTF11 0x298C012C, 0X1, 0x00000000, 0x0, 0x298C012C
1344 #define IOMUXC_PTF11_FXIO1_D11 0x298C012C, 0X2, 0x298C0848, 0X2, 0x298C012C
1345 #define IOMUXC_PTF11_LPSPI4_PCS0 0x298C012C, 0X3, 0x298C08F4, 0X3, 0x298C012C
1346 #define IOMUXC_PTF11_LPUART4_RX 0x298C012C, 0X4, 0x298C08E0, 0X3, 0x298C012C
1347 #define IOMUXC_PTF11_TPM4_CLKIN 0x298C012C, 0X6, 0x298C081C, 0X2, 0x298C012C
1348 #define IOMUXC_PTF11_I2S4_RX_FS 0x298C012C, 0X7, 0x00000000, 0x0, 0x298C012C
1349 #define IOMUXC_PTF11_SDHC1_RESET_B 0x298C012C, 0X8, 0x00000000, 0x0, 0x298C012C
1350 #define IOMUXC_PTF11_ENET0_1588_TMR0 0x298C012C, 0X9, 0x298C0AD4, 0X2, 0x298C012C
1351 #define IOMUXC_PTF11_TRACE0_D11 0x298C012C, 0XA, 0x00000000, 0x0, 0x298C012C
1352 #define IOMUXC_PTF11_EPDC0_D12 0x298C012C, 0XB, 0x00000000, 0x0, 0x298C012C
1353 #define IOMUXC_PTF11_DPI0_D12 0x298C012C, 0XC, 0x00000000, 0x0, 0x298C012C
1354 #define IOMUXC_PTF11_LP_HV_DBG_MUX_27 0x298C012C, 0XE, 0x00000000, 0x0, 0x298C012C
1355 #define IOMUXC_PTF11_DEBUG_MUX1_32 0x298C012C, 0XF, 0x00000000, 0x0, 0x298C012C
1356 #define IOMUXC_PTF12_PTF12 0x298C0130, 0X1, 0x00000000, 0x0, 0x298C0130
1357 #define IOMUXC_PTF12_FXIO1_D12 0x298C0130, 0X2, 0x298C084C, 0X2, 0x298C0130
1358 #define IOMUXC_PTF12_LPSPI5_PCS1 0x298C0130, 0X3, 0x298C0914, 0X2, 0x298C0130
1359 #define IOMUXC_PTF12_LPUART5_CTS_B 0x298C0130, 0X4, 0x298C08E8, 0X3, 0x298C0130
1360 #define IOMUXC_PTF12_LPI2C5_SCL 0x298C0130, 0X5, 0x298C08D4, 0X3, 0x298C0130
1361 #define IOMUXC_PTF12_TPM4_CH0 0x298C0130, 0X6, 0x298C0804, 0X2, 0x298C0130
1362 #define IOMUXC_PTF12_I2S4_RXD0 0x298C0130, 0X7, 0x00000000, 0x0, 0x298C0130
1363 #define IOMUXC_PTF12_SDHC2_WP 0x298C0130, 0X8, 0x298C0ABC, 0X1, 0x298C0130
1364 #define IOMUXC_PTF12_ENET0_1588_TMR1 0x298C0130, 0X9, 0x298C0AD8, 0X2, 0x298C0130
1365 #define IOMUXC_PTF12_TRACE0_D10 0x298C0130, 0XA, 0x00000000, 0x0, 0x298C0130
1366 #define IOMUXC_PTF12_EPDC0_D11 0x298C0130, 0XB, 0x00000000, 0x0, 0x298C0130
1367 #define IOMUXC_PTF12_DPI0_D11 0x298C0130, 0XC, 0x00000000, 0x0, 0x298C0130
1368 #define IOMUXC_PTF12_LP_HV_DBG_MUX_28 0x298C0130, 0XE, 0x00000000, 0x0, 0x298C0130
1369 #define IOMUXC_PTF12_DEBUG_MUX1_33 0x298C0130, 0XF, 0x00000000, 0x0, 0x298C0130
1370 #define IOMUXC_PTF13_PTF13 0x298C0134, 0X1, 0x00000000, 0x0, 0x298C0134
1371 #define IOMUXC_PTF13_FXIO1_D13 0x298C0134, 0X2, 0x298C0850, 0X2, 0x298C0134
1372 #define IOMUXC_PTF13_LPSPI5_PCS2 0x298C0134, 0X3, 0x298C0918, 0X2, 0x298C0134
1373 #define IOMUXC_PTF13_LPUART5_RTS_B 0x298C0134, 0X4, 0x00000000, 0x0, 0x298C0134
1374 #define IOMUXC_PTF13_LPI2C5_SDA 0x298C0134, 0X5, 0x298C08D8, 0X3, 0x298C0134
1375 #define IOMUXC_PTF13_TPM4_CH1 0x298C0134, 0X6, 0x298C0808, 0X2, 0x298C0134
1376 #define IOMUXC_PTF13_I2S4_RXD1 0x298C0134, 0X7, 0x00000000, 0x0, 0x298C0134
1377 #define IOMUXC_PTF13_SDHC2_CD 0x298C0134, 0X8, 0x298C0A8C, 0X1, 0x298C0134
1378 #define IOMUXC_PTF13_ENET0_1588_TMR2 0x298C0134, 0X9, 0x298C0ADC, 0X2, 0x298C0134
1379 #define IOMUXC_PTF13_TRACE0_D9 0x298C0134, 0XA, 0x00000000, 0x0, 0x298C0134
1380 #define IOMUXC_PTF13_EPDC0_D10 0x298C0134, 0XB, 0x00000000, 0x0, 0x298C0134
1381 #define IOMUXC_PTF13_DPI0_D10 0x298C0134, 0XC, 0x00000000, 0x0, 0x298C0134
1382 #define IOMUXC_PTF13_DEBUG_MUX0_21 0x298C0134, 0XE, 0x00000000, 0x0, 0x298C0134
1383 #define IOMUXC_PTF13_LP_HV_DBG_MUX_29 0x298C0134, 0XF, 0x00000000, 0x0, 0x298C0134
1384 #define IOMUXC_PTF14_PTF14 0x298C0138, 0X1, 0x00000000, 0x0, 0x298C0138
1385 #define IOMUXC_PTF14_FXIO1_D14 0x298C0138, 0X2, 0x298C0854, 0X2, 0x298C0138
1386 #define IOMUXC_PTF14_LPSPI5_PCS3 0x298C0138, 0X3, 0x298C091C, 0X2, 0x298C0138
1387 #define IOMUXC_PTF14_LPUART5_TX 0x298C0138, 0X4, 0x298C08F0, 0X3, 0x298C0138
1388 #define IOMUXC_PTF14_LPI2C5_HREQ 0x298C0138, 0X5, 0x298C08D0, 0X3, 0x298C0138
1389 #define IOMUXC_PTF14_TPM4_CH2 0x298C0138, 0X6, 0x298C080C, 0X2, 0x298C0138
1390 #define IOMUXC_PTF14_I2S4_MCLK 0x298C0138, 0X7, 0x00000000, 0x0, 0x298C0138
1391 #define IOMUXC_PTF14_SDHC2_VS 0x298C0138, 0X8, 0x00000000, 0x0, 0x298C0138
1392 #define IOMUXC_PTF14_ENET0_1588_TMR3 0x298C0138, 0X9, 0x298C0AE0, 0X2, 0x298C0138
1393 #define IOMUXC_PTF14_TRACE0_D8 0x298C0138, 0XA, 0x00000000, 0x0, 0x298C0138
1394 #define IOMUXC_PTF14_EPDC0_D9 0x298C0138, 0XB, 0x00000000, 0x0, 0x298C0138
1395 #define IOMUXC_PTF14_DPI0_D9 0x298C0138, 0XC, 0x00000000, 0x0, 0x298C0138
1396 #define IOMUXC_PTF14_DEBUG_MUX0_22 0x298C0138, 0XE, 0x00000000, 0x0, 0x298C0138
1397 #define IOMUXC_PTF14_LP_HV_DBG_MUX_30 0x298C0138, 0XF, 0x00000000, 0x0, 0x298C0138
1398 #define IOMUXC_PTF15_PTF15 0x298C013C, 0X1, 0x00000000, 0x0, 0x298C013C
1399 #define IOMUXC_PTF15_FXIO1_D15 0x298C013C, 0X2, 0x298C0858, 0X2, 0x298C013C
1400 #define IOMUXC_PTF15_LPUART5_RX 0x298C013C, 0X4, 0x298C08EC, 0X3, 0x298C013C
1401 #define IOMUXC_PTF15_TPM4_CH3 0x298C013C, 0X6, 0x298C0810, 0X2, 0x298C013C
1402 #define IOMUXC_PTF15_I2S4_TX_BCLK 0x298C013C, 0X7, 0x00000000, 0x0, 0x298C013C
1403 #define IOMUXC_PTF15_SDHC2_D1 0x298C013C, 0X8, 0x298C0A9C, 0X3, 0x298C013C
1404 #define IOMUXC_PTF15_ENET0_RXD2 0x298C013C, 0X9, 0x298C0B00, 0X2, 0x298C013C
1405 #define IOMUXC_PTF15_TRACE0_D7 0x298C013C, 0XA, 0x00000000, 0x0, 0x298C013C
1406 #define IOMUXC_PTF15_EPDC0_D8 0x298C013C, 0XB, 0x00000000, 0x0, 0x298C013C
1407 #define IOMUXC_PTF15_DPI0_D8 0x298C013C, 0XC, 0x00000000, 0x0, 0x298C013C
1408 #define IOMUXC_PTF15_LP_HV_DBG_MUX_31 0x298C013C, 0XF, 0x00000000, 0x0, 0x298C013C
1409 #define IOMUXC_PTF16_PTF16 0x298C0140, 0X1, 0x00000000, 0x0, 0x298C0140
1410 #define IOMUXC_PTF16_FXIO1_D16 0x298C0140, 0X2, 0x298C085C, 0X2, 0x298C0140
1411 #define IOMUXC_PTF16_LPSPI5_SIN 0x298C0140, 0X3, 0x298C0924, 0X2, 0x298C0140
1412 #define IOMUXC_PTF16_LPUART6_CTS_B 0x298C0140, 0X4, 0x298C09CC, 0X3, 0x298C0140
1413 #define IOMUXC_PTF16_LPI2C6_SCL 0x298C0140, 0X5, 0x298C09B8, 0X3, 0x298C0140
1414 #define IOMUXC_PTF16_TPM4_CH4 0x298C0140, 0X6, 0x298C0814, 0X2, 0x298C0140
1415 #define IOMUXC_PTF16_I2S4_TX_FS 0x298C0140, 0X7, 0x00000000, 0x0, 0x298C0140
1416 #define IOMUXC_PTF16_SDHC2_D0 0x298C0140, 0X8, 0x298C0A98, 0X3, 0x298C0140
1417 #define IOMUXC_PTF16_ENET0_RXD3 0x298C0140, 0X9, 0x298C0B04, 0X2, 0x298C0140
1418 #define IOMUXC_PTF16_TRACE0_D6 0x298C0140, 0XA, 0x00000000, 0x0, 0x298C0140
1419 #define IOMUXC_PTF16_EPDC0_D7 0x298C0140, 0XB, 0x00000000, 0x0, 0x298C0140
1420 #define IOMUXC_PTF16_DPI0_D7 0x298C0140, 0XC, 0x00000000, 0x0, 0x298C0140
1421 #define IOMUXC_PTF16_LP_HV_DBG_MUX_32 0x298C0140, 0XF, 0x00000000, 0x0, 0x298C0140
1422 #define IOMUXC_PTF17_PTF17 0x298C0144, 0X1, 0x00000000, 0x0, 0x298C0144
1423 #define IOMUXC_PTF17_FXIO1_D17 0x298C0144, 0X2, 0x298C0860, 0X2, 0x298C0144
1424 #define IOMUXC_PTF17_LPSPI5_SOUT 0x298C0144, 0X3, 0x298C0928, 0X2, 0x298C0144
1425 #define IOMUXC_PTF17_LPUART6_RTS_B 0x298C0144, 0X4, 0x00000000, 0x0, 0x298C0144
1426 #define IOMUXC_PTF17_LPI2C6_SDA 0x298C0144, 0X5, 0x298C09BC, 0X3, 0x298C0144
1427 #define IOMUXC_PTF17_TPM4_CH5 0x298C0144, 0X6, 0x298C0818, 0X2, 0x298C0144
1428 #define IOMUXC_PTF17_I2S4_TXD0 0x298C0144, 0X7, 0x00000000, 0x0, 0x298C0144
1429 #define IOMUXC_PTF17_SDHC2_CLK 0x298C0144, 0X8, 0x298C0A90, 0X3, 0x298C0144
1430 #define IOMUXC_PTF17_ENET0_RXCLK 0x298C0144, 0X9, 0x298C0B0C, 0X2, 0x298C0144
1431 #define IOMUXC_PTF17_TRACE0_D5 0x298C0144, 0XA, 0x00000000, 0x0, 0x298C0144
1432 #define IOMUXC_PTF17_EPDC0_D6 0x298C0144, 0XB, 0x00000000, 0x0, 0x298C0144
1433 #define IOMUXC_PTF17_DPI0_D6 0x298C0144, 0XC, 0x00000000, 0x0, 0x298C0144
1434 #define IOMUXC_PTF17_DEBUG_MUX0_23 0x298C0144, 0XE, 0x00000000, 0x0, 0x298C0144
1435 #define IOMUXC_PTF17_LP_HV_DBG_MUX_33 0x298C0144, 0XF, 0x00000000, 0x0, 0x298C0144
1436 #define IOMUXC_PTF18_PTF18 0x298C0148, 0X1, 0x00000000, 0x0, 0x298C0148
1437 #define IOMUXC_PTF18_FXIO1_D18 0x298C0148, 0X2, 0x298C0864, 0X2, 0x298C0148
1438 #define IOMUXC_PTF18_LPSPI5_SCK 0x298C0148, 0X3, 0x298C0920, 0X2, 0x298C0148
1439 #define IOMUXC_PTF18_LPUART6_TX 0x298C0148, 0X4, 0x298C09D4, 0X3, 0x298C0148
1440 #define IOMUXC_PTF18_LPI2C6_HREQ 0x298C0148, 0X5, 0x298C09B4, 0X3, 0x298C0148
1441 #define IOMUXC_PTF18_TPM5_CLKIN 0x298C0148, 0X6, 0x298C0838, 0X2, 0x298C0148
1442 #define IOMUXC_PTF18_I2S4_TXD1 0x298C0148, 0X7, 0x00000000, 0x0, 0x298C0148
1443 #define IOMUXC_PTF18_SDHC2_CMD 0x298C0148, 0X8, 0x298C0A94, 0X3, 0x298C0148
1444 #define IOMUXC_PTF18_ENET0_TXD2 0x298C0148, 0X9, 0x00000000, 0x0, 0x298C0148
1445 #define IOMUXC_PTF18_TRACE0_D4 0x298C0148, 0XA, 0x00000000, 0x0, 0x298C0148
1446 #define IOMUXC_PTF18_EPDC0_D5 0x298C0148, 0XB, 0x00000000, 0x0, 0x298C0148
1447 #define IOMUXC_PTF18_DPI0_D5 0x298C0148, 0XC, 0x00000000, 0x0, 0x298C0148
1448 #define IOMUXC_PTF19_PTF19 0x298C014C, 0X1, 0x00000000, 0x0, 0x298C014C
1449 #define IOMUXC_PTF19_FXIO1_D19 0x298C014C, 0X2, 0x298C0868, 0X2, 0x298C014C
1450 #define IOMUXC_PTF19_LPSPI5_PCS0 0x298C014C, 0X3, 0x298C0910, 0X2, 0x298C014C
1451 #define IOMUXC_PTF19_LPUART6_RX 0x298C014C, 0X4, 0x298C09D0, 0X3, 0x298C014C
1452 #define IOMUXC_PTF19_TPM5_CH0 0x298C014C, 0X6, 0x298C0820, 0X2, 0x298C014C
1453 #define IOMUXC_PTF19_I2S5_RX_BCLK 0x298C014C, 0X7, 0x00000000, 0x0, 0x298C014C
1454 #define IOMUXC_PTF19_SDHC2_D3 0x298C014C, 0X8, 0x298C0AA4, 0X3, 0x298C014C
1455 #define IOMUXC_PTF19_ENET0_TXD3 0x298C014C, 0X9, 0x00000000, 0x0, 0x298C014C
1456 #define IOMUXC_PTF19_TRACE0_D3 0x298C014C, 0XA, 0x00000000, 0x0, 0x298C014C
1457 #define IOMUXC_PTF19_EPDC0_D4 0x298C014C, 0XB, 0x00000000, 0x0, 0x298C014C
1458 #define IOMUXC_PTF19_DPI0_D4 0x298C014C, 0XC, 0x00000000, 0x0, 0x298C014C
1459 #define IOMUXC_PTF20_PTF20 0x298C0150, 0X1, 0x00000000, 0x0, 0x298C0150
1460 #define IOMUXC_PTF20_FXIO1_D20 0x298C0150, 0X2, 0x298C0870, 0X2, 0x298C0150
1461 #define IOMUXC_PTF20_LPUART7_CTS_B 0x298C0150, 0X4, 0x298C09D8, 0X3, 0x298C0150
1462 #define IOMUXC_PTF20_LPI2C7_SCL 0x298C0150, 0X5, 0x298C09C4, 0X3, 0x298C0150
1463 #define IOMUXC_PTF20_TPM5_CH1 0x298C0150, 0X6, 0x298C0824, 0X2, 0x298C0150
1464 #define IOMUXC_PTF20_I2S5_RX_FS 0x298C0150, 0X7, 0x00000000, 0x0, 0x298C0150
1465 #define IOMUXC_PTF20_SDHC2_D2 0x298C0150, 0X8, 0x298C0AA0, 0X3, 0x298C0150
1466 #define IOMUXC_PTF20_ENET0_TXCLK 0x298C0150, 0X9, 0x298C0B10, 0X2, 0x298C0150
1467 #define IOMUXC_PTF20_TRACE0_D2 0x298C0150, 0XA, 0x00000000, 0x0, 0x298C0150
1468 #define IOMUXC_PTF20_EPDC0_D3 0x298C0150, 0XB, 0x00000000, 0x0, 0x298C0150
1469 #define IOMUXC_PTF20_DPI0_D3 0x298C0150, 0XC, 0x00000000, 0x0, 0x298C0150
1470 #define IOMUXC_PTF21_PTF21 0x298C0154, 0X1, 0x00000000, 0x0, 0x298C0154
1471 #define IOMUXC_PTF21_FXIO1_D21 0x298C0154, 0X2, 0x298C0874, 0X2, 0x298C0154
1472 #define IOMUXC_PTF21_SPDIF_OUTCLK 0x298C0154, 0X3, 0x00000000, 0x0, 0x298C0154
1473 #define IOMUXC_PTF21_LPUART7_RTS_B 0x298C0154, 0X4, 0x00000000, 0x0, 0x298C0154
1474 #define IOMUXC_PTF21_LPI2C7_SDA 0x298C0154, 0X5, 0x298C09C8, 0X3, 0x298C0154
1475 #define IOMUXC_PTF21_TPM6_CLKIN 0x298C0154, 0X6, 0x298C0994, 0X2, 0x298C0154
1476 #define IOMUXC_PTF21_I2S5_RXD0 0x298C0154, 0X7, 0x00000000, 0x0, 0x298C0154
1477 #define IOMUXC_PTF21_SDHC2_D4 0x298C0154, 0X8, 0x298C0AA8, 0X2, 0x298C0154
1478 #define IOMUXC_PTF21_ENET0_CRS 0x298C0154, 0X9, 0x298C0AE8, 0X2, 0x298C0154
1479 #define IOMUXC_PTF21_TRACE0_D1 0x298C0154, 0XA, 0x00000000, 0x0, 0x298C0154
1480 #define IOMUXC_PTF21_EPDC0_D2 0x298C0154, 0XB, 0x00000000, 0x0, 0x298C0154
1481 #define IOMUXC_PTF21_DPI0_D2 0x298C0154, 0XC, 0x00000000, 0x0, 0x298C0154
1482 #define IOMUXC_PTF22_PTF22 0x298C0158, 0X1, 0x00000000, 0x0, 0x298C0158
1483 #define IOMUXC_PTF22_FXIO1_D22 0x298C0158, 0X2, 0x298C0878, 0X2, 0x298C0158
1484 #define IOMUXC_PTF22_SPDIF_IN1 0x298C0158, 0X3, 0x298C0B74, 0X3, 0x298C0158
1485 #define IOMUXC_PTF22_LPUART7_TX 0x298C0158, 0X4, 0x298C09E0, 0X3, 0x298C0158
1486 #define IOMUXC_PTF22_LPI2C7_HREQ 0x298C0158, 0X5, 0x298C09C0, 0X3, 0x298C0158
1487 #define IOMUXC_PTF22_TPM6_CH0 0x298C0158, 0X6, 0x298C097C, 0X2, 0x298C0158
1488 #define IOMUXC_PTF22_I2S5_RXD1 0x298C0158, 0X7, 0x00000000, 0x0, 0x298C0158
1489 #define IOMUXC_PTF22_SDHC2_D5 0x298C0158, 0X8, 0x298C0AAC, 0X2, 0x298C0158
1490 #define IOMUXC_PTF22_ENET0_COL 0x298C0158, 0X9, 0x298C0AE4, 0X2, 0x298C0158
1491 #define IOMUXC_PTF22_TRACE0_D0 0x298C0158, 0XA, 0x00000000, 0x0, 0x298C0158
1492 #define IOMUXC_PTF22_EPDC0_D1 0x298C0158, 0XB, 0x00000000, 0x0, 0x298C0158
1493 #define IOMUXC_PTF22_DPI0_D1 0x298C0158, 0XC, 0x00000000, 0x0, 0x298C0158
1494 #define IOMUXC_PTF23_PTF23 0x298C015C, 0X1, 0x00000000, 0x0, 0x298C015C
1495 #define IOMUXC_PTF23_FXIO1_D23 0x298C015C, 0X2, 0x298C087C, 0X2, 0x298C015C
1496 #define IOMUXC_PTF23_SPDIF_OUT1 0x298C015C, 0X3, 0x00000000, 0x0, 0x298C015C
1497 #define IOMUXC_PTF23_LPUART7_RX 0x298C015C, 0X4, 0x298C09DC, 0X3, 0x298C015C
1498 #define IOMUXC_PTF23_I3C2_PUR 0x298C015C, 0X5, 0x00000000, 0x0, 0x298C015C
1499 #define IOMUXC_PTF23_TPM6_CH1 0x298C015C, 0X6, 0x298C0980, 0X2, 0x298C015C
1500 #define IOMUXC_PTF23_I2S5_RXD2 0x298C015C, 0X7, 0x00000000, 0x0, 0x298C015C
1501 #define IOMUXC_PTF23_SDHC2_D6 0x298C015C, 0X8, 0x298C0AB0, 0X2, 0x298C015C
1502 #define IOMUXC_PTF23_ENET0_TXER 0x298C015C, 0X9, 0x00000000, 0x0, 0x298C015C
1503 #define IOMUXC_PTF23_TRACE0_CLKOUT 0x298C015C, 0XA, 0x00000000, 0x0, 0x298C015C
1504 #define IOMUXC_PTF23_EPDC0_D0 0x298C015C, 0XB, 0x00000000, 0x0, 0x298C015C
1505 #define IOMUXC_PTF23_DPI0_D0 0x298C015C, 0XC, 0x00000000, 0x0, 0x298C015C
1506 #define IOMUXC_PTF24_PTF24 0x298C0160, 0X1, 0x00000000, 0x0, 0x298C0160
1507 #define IOMUXC_PTF24_FXIO1_D24 0x298C0160, 0X2, 0x298C0880, 0X2, 0x298C0160
1508 #define IOMUXC_PTF24_SPDIF_IN2 0x298C0160, 0X3, 0x298C0B78, 0X3, 0x298C0160
1509 #define IOMUXC_PTF24_I3C2_SCL 0x298C0160, 0X5, 0x298C08BC, 0X4, 0x298C0160
1510 #define IOMUXC_PTF24_I2S5_RXD3 0x298C0160, 0X7, 0x00000000, 0x0, 0x298C0160
1511 #define IOMUXC_PTF24_SDHC2_D7 0x298C0160, 0X8, 0x298C0AB4, 0X2, 0x298C0160
1512 #define IOMUXC_PTF24_DBI0_WRX 0x298C0160, 0XA, 0x00000000, 0x0, 0x298C0160
1513 #define IOMUXC_PTF24_EPDC0_SDCLK 0x298C0160, 0XB, 0x00000000, 0x0, 0x298C0160
1514 #define IOMUXC_PTF24_DPI0_PCLK 0x298C0160, 0XC, 0x00000000, 0x0, 0x298C0160
1515 #define IOMUXC_PTF24_WUU1_P12 0x298C0160, 0XD, 0x00000000, 0x0, 0x298C0160
1516 #define IOMUXC_PTF25_PTF25 0x298C0164, 0X1, 0x00000000, 0x0, 0x298C0164
1517 #define IOMUXC_PTF25_FXIO1_D25 0x298C0164, 0X2, 0x298C0884, 0X2, 0x298C0164
1518 #define IOMUXC_PTF25_SPDIF_OUT2 0x298C0164, 0X3, 0x00000000, 0x0, 0x298C0164
1519 #define IOMUXC_PTF25_I3C2_SDA 0x298C0164, 0X5, 0x298C08C0, 0X4, 0x298C0164
1520 #define IOMUXC_PTF25_TPM7_CH5 0x298C0164, 0X6, 0x298C09AC, 0X2, 0x298C0164
1521 #define IOMUXC_PTF25_I2S5_MCLK 0x298C0164, 0X7, 0x00000000, 0x0, 0x298C0164
1522 #define IOMUXC_PTF25_SDHC2_DQS 0x298C0164, 0X8, 0x298C0AB8, 0X2, 0x298C0164
1523 #define IOMUXC_PTF25_EXT_AUD_MCLK2 0x298C0164, 0X9, 0x298C0800, 0X3, 0x298C0164
1524 #define IOMUXC_PTF25_EPDC0_GDSP 0x298C0164, 0XB, 0x00000000, 0x0, 0x298C0164
1525 #define IOMUXC_PTF25_DPI0_VSYNC 0x298C0164, 0XC, 0x00000000, 0x0, 0x298C0164
1526 #define IOMUXC_PTF25_WUU1_P13 0x298C0164, 0XD, 0x00000000, 0x0, 0x298C0164
1527 #define IOMUXC_PTF26_PTF26 0x298C0168, 0X1, 0x00000000, 0x0, 0x298C0168
1528 #define IOMUXC_PTF26_FXIO1_D26 0x298C0168, 0X2, 0x298C0888, 0X2, 0x298C0168
1529 #define IOMUXC_PTF26_SPDIF_IN3 0x298C0168, 0X3, 0x298C0B7C, 0X3, 0x298C0168
1530 #define IOMUXC_PTF26_TPM7_CLKIN 0x298C0168, 0X6, 0x298C09B0, 0X2, 0x298C0168
1531 #define IOMUXC_PTF26_I2S5_TX_BCLK 0x298C0168, 0X7, 0x00000000, 0x0, 0x298C0168
1532 #define IOMUXC_PTF26_SDHC2_RESET_B 0x298C0168, 0X8, 0x00000000, 0x0, 0x298C0168
1533 #define IOMUXC_PTF26_EPDC0_SDLE 0x298C0168, 0XB, 0x00000000, 0x0, 0x298C0168
1534 #define IOMUXC_PTF26_DPI0_HSYNC 0x298C0168, 0XC, 0x00000000, 0x0, 0x298C0168
1535 #define IOMUXC_PTF26_WUU1_P14 0x298C0168, 0XD, 0x00000000, 0x0, 0x298C0168
1536 #define IOMUXC_PTF27_PTF27 0x298C016C, 0X1, 0x00000000, 0x0, 0x298C016C
1537 #define IOMUXC_PTF27_FXIO1_D27 0x298C016C, 0X2, 0x298C088C, 0X2, 0x298C016C
1538 #define IOMUXC_PTF27_SPDIF_PLOCK 0x298C016C, 0X3, 0x00000000, 0x0, 0x298C016C
1539 #define IOMUXC_PTF27_TPM7_CH0 0x298C016C, 0X6, 0x298C0998, 0X2, 0x298C016C
1540 #define IOMUXC_PTF27_I2S5_TX_FS 0x298C016C, 0X7, 0x00000000, 0x0, 0x298C016C
1541 #define IOMUXC_PTF27_SDHC2_WP 0x298C016C, 0X8, 0x298C0ABC, 0X2, 0x298C016C
1542 #define IOMUXC_PTF27_EPDC0_SDCE0 0x298C016C, 0XB, 0x00000000, 0x0, 0x298C016C
1543 #define IOMUXC_PTF27_DPI0_DE 0x298C016C, 0XC, 0x00000000, 0x0, 0x298C016C
1544 #define IOMUXC_PTF27_WUU1_P15 0x298C016C, 0XD, 0x00000000, 0x0, 0x298C016C
1545 #define IOMUXC_PTF28_PTF28 0x298C0170, 0X1, 0x00000000, 0x0, 0x298C0170
1546 #define IOMUXC_PTF28_FXIO1_D28 0x298C0170, 0X2, 0x298C0890, 0X2, 0x298C0170
1547 #define IOMUXC_PTF28_SPDIF_IN4 0x298C0170, 0X3, 0x298C0B80, 0X3, 0x298C0170
1548 #define IOMUXC_PTF28_TPM7_CH1 0x298C0170, 0X6, 0x298C099C, 0X2, 0x298C0170
1549 #define IOMUXC_PTF28_I2S5_TXD0 0x298C0170, 0X7, 0x00000000, 0x0, 0x298C0170
1550 #define IOMUXC_PTF28_SDHC2_CD 0x298C0170, 0X8, 0x298C0A8C, 0X2, 0x298C0170
1551 #define IOMUXC_PTF28_EPDC0_SDCLK_B 0x298C0170, 0XB, 0x00000000, 0x0, 0x298C0170
1552 #define IOMUXC_PTF28_LP_HV_DBG_MUX_20 0x298C0170, 0XF, 0x00000000, 0x0, 0x298C0170
1553 #define IOMUXC_PTF29_PTF29 0x298C0174, 0X1, 0x00000000, 0x0, 0x298C0174
1554 #define IOMUXC_PTF29_FXIO1_D29 0x298C0174, 0X2, 0x298C0894, 0X2, 0x298C0174
1555 #define IOMUXC_PTF29_SPDIF_SRCLK 0x298C0174, 0X3, 0x00000000, 0x0, 0x298C0174
1556 #define IOMUXC_PTF29_TPM7_CH2 0x298C0174, 0X6, 0x298C09A0, 0X2, 0x298C0174
1557 #define IOMUXC_PTF29_I2S5_TXD1 0x298C0174, 0X7, 0x00000000, 0x0, 0x298C0174
1558 #define IOMUXC_PTF29_SDHC2_VS 0x298C0174, 0X8, 0x00000000, 0x0, 0x298C0174
1559 #define IOMUXC_PTF29_EPDC0_SDCE1 0x298C0174, 0XB, 0x00000000, 0x0, 0x298C0174
1560 #define IOMUXC_PTF29_WDOG3_RST 0x298C0174, 0XD, 0x00000000, 0x0, 0x298C0174
1561 #define IOMUXC_PTF29_LP_HV_DBG_MUX_21 0x298C0174, 0XF, 0x00000000, 0x0, 0x298C0174
1562 #define IOMUXC_PTF30_PTF30 0x298C0178, 0X1, 0x00000000, 0x0, 0x298C0178
1563 #define IOMUXC_PTF30_FXIO1_D30 0x298C0178, 0X2, 0x298C089C, 0X2, 0x298C0178
1564 #define IOMUXC_PTF30_TPM7_CH3 0x298C0178, 0X6, 0x298C09A4, 0X2, 0x298C0178
1565 #define IOMUXC_PTF30_I2S5_TXD2 0x298C0178, 0X7, 0x00000000, 0x0, 0x298C0178
1566 #define IOMUXC_PTF30_MQS1_LEFT 0x298C0178, 0X8, 0x00000000, 0x0, 0x298C0178
1567 #define IOMUXC_PTF30_EPDC0_SDCE2 0x298C0178, 0XB, 0x00000000, 0x0, 0x298C0178
1568 #define IOMUXC_PTF30_WDOG4_RST 0x298C0178, 0XD, 0x00000000, 0x0, 0x298C0178
1569 #define IOMUXC_PTF30_LP_HV_DBG_MUX_22 0x298C0178, 0XF, 0x00000000, 0x0, 0x298C0178
1570 #define IOMUXC_PTF31_PTF31 0x298C017C, 0X1, 0x00000000, 0x0, 0x298C017C
1571 #define IOMUXC_PTF31_FXIO1_D31 0x298C017C, 0X2, 0x298C08A0, 0X2, 0x298C017C
1572 #define IOMUXC_PTF31_TPM7_CH4 0x298C017C, 0X6, 0x298C09A8, 0X2, 0x298C017C
1573 #define IOMUXC_PTF31_I2S5_TXD3 0x298C017C, 0X7, 0x00000000, 0x0, 0x298C017C
1574 #define IOMUXC_PTF31_MQS1_RIGHT 0x298C017C, 0X8, 0x00000000, 0x0, 0x298C017C
1575 #define IOMUXC_PTF31_EPDC0_SDCE3 0x298C017C, 0XB, 0x00000000, 0x0, 0x298C017C
1576 #define IOMUXC_PTF31_WDOG5_RST 0x298C017C, 0XD, 0x00000000, 0x0, 0x298C017C
1577 #define IOMUXC_PTF31_LP_HV_DBG_MUX_23 0x298C017C, 0XF, 0x00000000, 0x0, 0x298C017C
1578 #define IOMUXC_BOOT_MODE0_BOOT_MODE0 0x00000000, 0x0, 0x00000000, 0x0, 0x280A1400
1579 #define IOMUXC_BOOT_MODE1_BOOT_MODE1 0x00000000, 0x0, 0x00000000, 0x0, 0x280A1404
1580 /*@}*/
1581
1582 #define IOMUXC_PCR_PS_MASK (0x1U)
1583 #define IOMUXC_PCR_PS_SHIFT (0U)
1584 #define IOMUXC_PCR_PS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_PS_SHIFT)) & IOMUXC_PCR_PS_MASK)
1585 #define IOMUXC_PCR_PE_MASK (0x2U)
1586 #define IOMUXC_PCR_PE_SHIFT (1U)
1587 #define IOMUXC_PCR_PE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_PE_SHIFT)) & IOMUXC_PCR_PE_MASK)
1588 #define IOMUXC_PCR_SRE_MASK (0x4U)
1589 #define IOMUXC_PCR_SRE_SHIFT (2U)
1590 #define IOMUXC_PCR_SRE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_SRE_SHIFT)) & IOMUXC_PCR_SRE_MASK)
1591 #define IOMUXC_PCR_ODE_MASK (0x20U)
1592 #define IOMUXC_PCR_ODE_SHIFT (5U)
1593 #define IOMUXC_PCR_ODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_ODE_SHIFT)) & IOMUXC_PCR_ODE_MASK)
1594 #define IOMUXC_PCR_DSE_MASK (0x40U)
1595 #define IOMUXC_PCR_DSE_SHIFT (6U)
1596 #define IOMUXC_PCR_DSE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_DSE_SHIFT)) & IOMUXC_PCR_DSE_MASK)
1597 #define IOMUXC_PCR_MUX_MODE_MASK (0xF00U)
1598 #define IOMUXC_PCR_MUX_MODE_SHIFT (8U)
1599 #define IOMUXC_PCR_MUX_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_MUX_MODE_SHIFT)) & IOMUXC_PCR_MUX_MODE_MASK)
1600 #define IOMUXC_PCR_LK_MASK (0x8000U)
1601 #define IOMUXC_PCR_LK_SHIFT (15U)
1602 #define IOMUXC_PCR_LK(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_LK_SHIFT)) & IOMUXC_PCR_LK_MASK)
1603 #define IOMUXC_PCR_IBE_MASK (0x10000U)
1604 #define IOMUXC_PCR_IBE_SHIFT (16U)
1605 #define IOMUXC_PCR_IBE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_IBE_SHIFT)) & IOMUXC_PCR_IBE_MASK)
1606 #define IOMUXC_PCR_OBE_MASK (0x20000U)
1607 #define IOMUXC_PCR_OBE_SHIFT (17U)
1608 #define IOMUXC_PCR_OBE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_OBE_SHIFT)) & IOMUXC_PCR_OBE_MASK)
1609 #define IOMUXC_PCR_DFE_MASK (0x100000U)
1610 #define IOMUXC_PCR_DFE_SHIFT (20U)
1611 #define IOMUXC_PCR_DFE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_DFE_SHIFT)) & IOMUXC_PCR_DFE_MASK)
1612 #define IOMUXC_PCR_DFCS_MASK (0x200000U)
1613 #define IOMUXC_PCR_DFCS_SHIFT (21U)
1614 #define IOMUXC_PCR_DFCS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_DFCS_SHIFT)) & IOMUXC_PCR_DFCS_MASK)
1615 #define IOMUXC_PCR_DFD_MASK (0x7C00000U)
1616 #define IOMUXC_PCR_DFD_SHIFT (22U)
1617 #define IOMUXC_PCR_DFD(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PCR_DFD_SHIFT)) & IOMUXC_PCR_DFD_MASK)
1618
1619 #define IOMUXC_PSMI_SSS_MASK (0xFU)
1620 #define IOMUXC_PSMI_SSS_SHIFT (0U)
1621 #define IOMUXC_PSMI_SSS(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PSMI_SSS_SHIFT)) & IOMUXC_PSMI_SSS_MASK)
1622 #define IOMUXC_PSMI_INV_MASK (0x8000U)
1623 #define IOMUXC_PSMI_INV_SHIFT (15U)
1624 #define IOMUXC_PSMI_INV(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_PSMI_INV_SHIFT)) & IOMUXC_PSMI_INV_MASK)
1625
1626 /*******************************************************************************
1627 * API
1628 ******************************************************************************/
1629 #if defined(__cplusplus)
1630 extern "C" {
1631 #endif /*__cplusplus */
1632
1633 /*! @name Configuration */
1634 /*@{*/
1635
1636 /*!
1637 * @brief Sets the IOMUXC pin mux mode.
1638 * @note The first five parameters can be filled with the pin function ID macros.
1639 *
1640 * This is an example to set the PTA2 as the lpuart0_tx:
1641 * @code
1642 * IOMUXC_SetPinMux(IOMUXC_PTA2_LPUART0_TX, 0);
1643 * @endcode
1644 *
1645 * This is an example to set the PTC13 as i2s1_txd3:
1646 * @code
1647 * IOMUXC_SetPinMux(IOMUXC_PTC13_I2S1_TXD3, 0);
1648 * @endcode
1649 *
1650 * @param muxRegister The pin mux register.
1651 * @param muxMode The pin mux mode.
1652 * @param inputRegister The select input register.
1653 * @param inputDaisy The input daisy.
1654 * @param configRegister The config register.
1655 * @param inputInv The pad->module input inversion.
1656 */
IOMUXC_SetPinMux(uint32_t muxRegister,uint32_t muxMode,uint32_t inputRegister,uint32_t inputDaisy,uint32_t configRegister,uint32_t inputInv)1657 static inline void IOMUXC_SetPinMux(uint32_t muxRegister,
1658 uint32_t muxMode,
1659 uint32_t inputRegister,
1660 uint32_t inputDaisy,
1661 uint32_t configRegister,
1662 uint32_t inputInv)
1663 {
1664 if (muxRegister != 0U)
1665 {
1666 *((volatile uint32_t *)muxRegister) =
1667 (*((volatile uint32_t *)muxRegister) & ~IOMUXC_PCR_MUX_MODE_MASK) | IOMUXC_PCR_MUX_MODE(muxMode);
1668 }
1669
1670 if (inputRegister != 0U)
1671 {
1672 *((volatile uint32_t *)inputRegister) = IOMUXC_PSMI_SSS(inputDaisy) | IOMUXC_PSMI_INV(inputInv);
1673 }
1674 }
1675
1676 /*!
1677 * @brief Sets the IOMUXC pin configuration.
1678 * @note The previous five parameters can be filled with the pin function ID macros.
1679 *
1680 * This is an example to set pin configuration for IOMUXC_PTA7_LPUART1_RX:
1681 * @code
1682 * IOMUXC_SetPinConfig(IOMUXC_PTA7_LPUART1_RX,
1683 * IOMUXC_PCR_PE_MASK |
1684 * IOMUXC_PCR_PS_MASK)
1685 * @endcode
1686 *
1687 * @param muxRegister The pin mux register.
1688 * @param muxMode The pin mux mode.
1689 * @param inputRegister The select input register.
1690 * @param inputDaisy The input daisy.
1691 * @param configRegister The config register.
1692 * @param configValue The pin config value.
1693 */
IOMUXC_SetPinConfig(uint32_t muxRegister,uint32_t muxMode,uint32_t inputRegister,uint32_t inputDaisy,uint32_t configRegister,uint32_t configValue)1694 static inline void IOMUXC_SetPinConfig(uint32_t muxRegister,
1695 uint32_t muxMode,
1696 uint32_t inputRegister,
1697 uint32_t inputDaisy,
1698 uint32_t configRegister,
1699 uint32_t configValue)
1700 {
1701 if (muxRegister != 0U)
1702 {
1703 if (configRegister != 0U)
1704 {
1705 *((volatile uint32_t *)configRegister) =
1706 (*((volatile uint32_t *)configRegister) & IOMUXC_PCR_MUX_MODE_MASK) | configValue;
1707 }
1708 }
1709 else
1710 {
1711 if (configRegister != 0U)
1712 {
1713 *((volatile uint32_t *)configRegister) = configValue;
1714 }
1715 }
1716 }
1717 /*@}*/
1718
1719 #if defined(__cplusplus)
1720 }
1721 #endif /*__cplusplus */
1722
1723 /*! @}*/
1724
1725 #endif /* _FSL_IOMUXC_H_ */
1726
