1 /*
2  * Copyright 2021, NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "fsl_fusion.h"
9 #include "fsl_upower.h"
10 
11 /*******************************************************************************
12  * Definitions
13  ******************************************************************************/
14 
15 /* Component ID definition, used by tools. */
16 #ifndef FSL_COMPONENT_ID
17 #define FSL_COMPONENT_ID "platform.drivers.fusion"
18 #endif
19 
20 /*******************************************************************************
21  * Variables
22  ******************************************************************************/
23 
24 /*******************************************************************************
25  * Prototypes
26  ******************************************************************************/
27 
28 /*******************************************************************************
29  * Code
30  ******************************************************************************/
31 
32 /*!
33  * @brief Initializing Fusion core.
34  *
35  * Power up Fusion
36  * Enable Fusion clocks
37  * Enable SSRAM access
38  * Clear reset
39  */
Fusion_Init(void)40 void Fusion_Init(void)
41 {
42     int status;
43 
44     SIM_SEC_Type *base = SIM_SEC;
45 
46     status = UPOWER_PowerOnSwitches(kUPOWER_PS_FUSION);
47     if (status != 0)
48     {
49         assert(false);
50     }
51 
52     base->SYSCTRL0 |= SIM_SEC_SYSCTRL0_FUSION_CLK_EN_MASK | SIM_SEC_SYSCTRL0_FUSION_PLAT_HCLK_EN_MASK;
53 
54     base->SSRAM_ACCESS_DISABLE &= ~SIM_SEC_SSRAM_ACCESS_DISABLE_SSRAM_DSP_ACCESS_DISABLE_MASK;
55 
56     base->SYSCTRL0 |= SIM_SEC_SYSCTRL0_FUSION_BCLK_EN_MASK | SIM_SEC_SYSCTRL0_FUSION_PBCLK_EN_MASK;
57 
58     base->SYSCTRL0 &= ~SIM_SEC_SYSCTRL0_FUSION_DSP_RST_MASK;
59     base->SYSCTRL0 &= ~SIM_SEC_SYSCTRL0_FUSION_DSP_DBG_RST_MASK;
60 }
61 
62 /*!
63  * @brief Deinitializing Fusion core.
64  *
65  * Stop Fusion core
66  * Disable Fusion clocks
67  * Disable SSRAM access
68  * Poweroff Fusion
69  */
Fusion_Deinit(void)70 void Fusion_Deinit(void)
71 {
72     int status;
73 
74     SIM_SEC_Type *base = SIM_SEC;
75 
76     Fusion_Stop();
77 
78     base->SYSCTRL0 |= SIM_SEC_SYSCTRL0_FUSION_DSP_DBG_RST_MASK;
79     base->SYSCTRL0 |= SIM_SEC_SYSCTRL0_FUSION_DSP_RST_MASK;
80 
81     base->SYSCTRL0 &= ~(SIM_SEC_SYSCTRL0_FUSION_CLK_EN_MASK | SIM_SEC_SYSCTRL0_FUSION_PLAT_HCLK_EN_MASK);
82     base->SYSCTRL0 &= ~(SIM_SEC_SYSCTRL0_FUSION_BCLK_EN_MASK | SIM_SEC_SYSCTRL0_FUSION_PBCLK_EN_MASK);
83 
84     base->SSRAM_ACCESS_DISABLE |= SIM_SEC_SSRAM_ACCESS_DISABLE_SSRAM_DSP_ACCESS_DISABLE_MASK;
85 
86     status = UPOWER_PowerOffSwitches(kUPOWER_PS_FUSION);
87     if (status != 0)
88     {
89         assert(false);
90     }
91 }
92 
93 /*!
94  * @brief Copy DSP image to destination address.
95  *
96  * Copy DSP image from source address to destination address with given size.
97  *
98  * @param dspCopyImage Structure contains information for DSP copy image to destination address.
99  */
DSP_CopyImage(dsp_copy_image_t * dspCopyImage)100 void DSP_CopyImage(dsp_copy_image_t *dspCopyImage)
101 {
102     assert(dspCopyImage != NULL);
103     assert(dspCopyImage->srcAddr != dspCopyImage->destAddr);
104 
105     uint32_t *srcAddr  = dspCopyImage->srcAddr;
106     uint32_t *destAddr = dspCopyImage->destAddr;
107     uint32_t size      = dspCopyImage->size;
108 
109     assert((size & 3U) == 0U);
110 
111     while (size > 0U)
112     {
113         *destAddr++ = *srcAddr++;
114         size -= 4U;
115     }
116 }
117