1 /*
2  * Copyright 2022, NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "fsl_common.h"
9 #include "fsl_reset.h"
10 
11 /*******************************************************************************
12  * Definitions
13  ******************************************************************************/
14 /* Component ID definition, used by tools. */
15 #ifndef FSL_COMPONENT_ID
16 #define FSL_COMPONENT_ID "platform.drivers.reset"
17 #endif
18 
19 /*******************************************************************************
20  * Variables
21  ******************************************************************************/
22 
23 /*******************************************************************************
24  * Prototypes
25  ******************************************************************************/
26 
27 /*******************************************************************************
28  * Code
29  ******************************************************************************/
30 
31 #if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0))
32 
33 /*!
34  * brief Assert reset to peripheral.
35  *
36  * Asserts reset signal to specified peripheral module.
37  *
38  * param peripheral Assert reset to this peripheral. The enum argument contains encoding of reset register
39  *                   and reset bit position in the reset register.
40  */
RESET_SetPeripheralReset(reset_ip_name_t peripheral)41 void RESET_SetPeripheralReset(reset_ip_name_t peripheral)
42 {
43     const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16;
44     const uint32_t bitPos   = ((uint32_t)peripheral & 0x0000FFFFu);
45     const uint32_t bitMask  = 1UL << bitPos;
46     volatile uint32_t *pResetCtrl;
47 
48     assert(bitPos < 32u);
49 
50     /* reset register is in SYSCON */
51     /* set bit */
52     SYSCON->PRESETCTRLSET[regIndex] = bitMask;
53     /* wait until it reads 0b1 */
54     pResetCtrl = &(SYSCON->PRESETCTRL0);
55     while (0u == ((uint32_t)((volatile uint32_t *)pResetCtrl)[regIndex] & bitMask))
56     {
57     }
58 }
59 
60 /*!
61  * brief Clear reset to peripheral.
62  *
63  * Clears reset signal to specified peripheral module, allows it to operate.
64  *
65  * param peripheral Clear reset to this peripheral. The enum argument contains encoding of reset register
66  *                   and reset bit position in the reset register.
67  */
RESET_ClearPeripheralReset(reset_ip_name_t peripheral)68 void RESET_ClearPeripheralReset(reset_ip_name_t peripheral)
69 {
70     const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16;
71     const uint32_t bitPos   = ((uint32_t)peripheral & 0x0000FFFFu);
72     const uint32_t bitMask  = 1UL << bitPos;
73     volatile uint32_t *pResetCtrl;
74 
75     assert(bitPos < 32u);
76 
77     /* reset register is in SYSCON */
78 
79     /* clear bit */
80     SYSCON->PRESETCTRLCLR[regIndex] = bitMask;
81     /* wait until it reads 0b0 */
82     pResetCtrl = &(SYSCON->PRESETCTRL0);
83     while (bitMask == ((uint32_t)((volatile uint32_t *)pResetCtrl)[regIndex] & bitMask))
84     {
85     }
86 }
87 
88 /*!
89  * brief Reset peripheral module.
90  *
91  * Reset peripheral module.
92  *
93  * param peripheral Peripheral to reset. The enum argument contains encoding of reset register
94  *                   and reset bit position in the reset register.
95  */
RESET_PeripheralReset(reset_ip_name_t peripheral)96 void RESET_PeripheralReset(reset_ip_name_t peripheral)
97 {
98     RESET_SetPeripheralReset(peripheral);
99     RESET_ClearPeripheralReset(peripheral);
100 }
101 
102 #endif /* FSL_FEATURE_SOC_SYSCON_COUNT || FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT */
103