1 /*
2 ** ###################################################################
3 ** Processors: MCXC444VLH
4 ** MCXC444VMP
5 **
6 ** Compilers: Freescale C/C++ for Embedded ARM
7 ** GNU C Compiler
8 ** IAR ANSI C/C++ Compiler for ARM
9 ** Keil ARM C/C++ Compiler
10 ** MCUXpresso Compiler
11 **
12 ** Reference manual: MCXC444RM, Rev.1, Mar 2024
13 ** Version: rev. 1.0, 2024-03-11
14 ** Build: b240401
15 **
16 ** Abstract:
17 ** Provides a system configuration function and a global variable that
18 ** contains the system frequency. It configures the device and initializes
19 ** the oscillator (PLL) that is part of the microcontroller device.
20 **
21 ** Copyright 2016 Freescale Semiconductor, Inc.
22 ** Copyright 2016-2024 NXP
23 ** SPDX-License-Identifier: BSD-3-Clause
24 **
25 ** http: www.nxp.com
26 ** mail: support@nxp.com
27 **
28 ** Revisions:
29 ** - rev. 1.0 (2024-03-11)
30 ** Initial version.
31 **
32 ** ###################################################################
33 */
34
35 /*!
36 * @file MCXC444
37 * @version 1.0
38 * @date 2024-03-11
39 * @brief Device specific configuration file for MCXC444 (implementation file)
40 *
41 * Provides a system configuration function and a global variable that contains
42 * the system frequency. It configures the device and initializes the oscillator
43 * (PLL) that is part of the microcontroller device.
44 */
45
46 #include <stdint.h>
47 #include "fsl_device_registers.h"
48
49
50
51 /* ----------------------------------------------------------------------------
52 -- Core clock
53 ---------------------------------------------------------------------------- */
54
55 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
56
57 /* ----------------------------------------------------------------------------
58 -- SystemInit()
59 ---------------------------------------------------------------------------- */
60
SystemInit(void)61 void SystemInit (void) {
62
63 #if (ACK_ISOLATION)
64 if((PMC->REGSC & PMC_REGSC_ACKISO_MASK) != 0U) {
65 PMC->REGSC |= PMC_REGSC_ACKISO_MASK; /* VLLSx recovery */
66 }
67 #endif
68
69 #if (DISABLE_WDOG)
70 /* SIM->COPC: ?=0,COPCLKSEL=0,COPDBGEN=0,COPSTPEN=0,COPT=0,COPCLKS=0,COPW=0 */
71 SIM->COPC = (uint32_t)0x00U;
72 #endif /* (DISABLE_WDOG) */
73
74 SystemInitHook();
75 }
76
77 /* ----------------------------------------------------------------------------
78 -- SystemCoreClockUpdate()
79 ---------------------------------------------------------------------------- */
80
SystemCoreClockUpdate(void)81 void SystemCoreClockUpdate (void) {
82
83 uint32_t MCGOUTClock; /* Variable to store output clock frequency of the MCG module */
84 uint16_t Divider;
85
86 if ((MCG->S & MCG_S_CLKST_MASK) == 0x00U) {
87 /* High internal reference clock is selected */
88 MCGOUTClock = CPU_INT_FAST_CLK_HZ; /* Fast internal reference clock selected */
89 } else if ((MCG->S & MCG_S_CLKST_MASK) == 0x04U) {
90 /* Internal reference clock is selected */
91 Divider = (uint16_t)(0x01LU << ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT));
92 MCGOUTClock = (uint32_t) (CPU_INT_SLOW_CLK_HZ / Divider); /* Slow internal reference clock 8MHz selected */
93 } else if ((MCG->S & MCG_S_CLKST_MASK) == 0x08U) {
94 /* External reference clock is selected */
95 MCGOUTClock = CPU_XTAL_CLK_HZ;
96 } else {
97 /* Reserved value */
98 return;
99 } /* (!((MCG->S & MCG_S_CLKST_MASK) == 0x08U)) */
100 SystemCoreClock = (MCGOUTClock / (0x01U + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT)));
101 }
102
103 /* ----------------------------------------------------------------------------
104 -- SystemInitHook()
105 ---------------------------------------------------------------------------- */
106
SystemInitHook(void)107 __attribute__ ((weak)) void SystemInitHook (void) {
108 /* Void implementation of the weak function. */
109 }
110
