1 /*
2 ** ###################################################################
3 **     Processors:          MCXA144VLL
4 **                          MCXA144VMP
5 **                          MCXA144VPJ
6 **
7 **     Compilers:           GNU C Compiler
8 **                          IAR ANSI C/C++ Compiler for ARM
9 **                          Keil ARM C/C++ Compiler
10 **                          MCUXpresso Compiler
11 **
12 **     Reference manual:    MCXA18 User manual
13 **     Version:             rev. 1.0, 2022-03-29
14 **     Build:               b240328
15 **
16 **     Abstract:
17 **         Provides a system configuration function and a global variable that
18 **         contains the system frequency. It configures the device and initializes
19 **         the oscillator (PLL) that is part of the microcontroller device.
20 **
21 **     Copyright 2016 Freescale Semiconductor, Inc.
22 **     Copyright 2016-2024 NXP
23 **     SPDX-License-Identifier: BSD-3-Clause
24 **
25 **     http:                 www.nxp.com
26 **     mail:                 support@nxp.com
27 **
28 **     Revisions:
29 **     - rev. 1.0 (2022-03-29)
30 **         Initial version based on v0.1UM
31 **
32 ** ###################################################################
33 */
34 
35 /*!
36  * @file MCXA144
37  * @version 1.0
38  * @date 2022-03-29
39  * @brief Device specific configuration file for MCXA144 (implementation file)
40  *
41  * Provides a system configuration function and a global variable that contains
42  * the system frequency. It configures the device and initializes the oscillator
43  * (PLL) that is part of the microcontroller device.
44  */
45 
46 #include <stdint.h>
47 #include "fsl_device_registers.h"
48 
49 
50 
51 
52 
53 /* ----------------------------------------------------------------------------
54    -- Core clock
55    ---------------------------------------------------------------------------- */
56 
57 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
58 
59 /* ----------------------------------------------------------------------------
60    -- SystemInit()
61    ---------------------------------------------------------------------------- */
62 
SystemInit(void)63 __attribute__ ((weak)) void SystemInit (void) {
64 #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
65   SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2));    /* set CP10, CP11 Full Access in Secure mode */
66   #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
67   SCB_NS->CPACR |= ((3UL << 10*2) | (3UL << 11*2));    /* set CP10, CP11 Full Access in Non-secure mode */
68   #endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
69 #endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
70 
71   SCB->CPACR |= ((3UL << 0*2) | (3UL << 1*2));    /* set CP0, CP1 Full Access in Secure mode (enable PowerQuad) */
72 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
73   SCB_NS->CPACR |= ((3UL << 0*2) | (3UL << 1*2));    /* set CP0, CP1 Full Access in Normal mode (enable PowerQuad) */
74 #endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
75 
76   SCB->NSACR |= ((3UL << 0) | (3UL << 10));   /* enable CP0, CP1, CP10, CP11 Non-secure Access */
77 
78 #if !defined(__ZEPHYR__)
79 #if defined(__MCUXPRESSO)
80     extern void(*const g_pfnVectors[]) (void);
81     SCB->VTOR = (uint32_t) &g_pfnVectors;
82 #else
83     extern void *__Vectors;
84     SCB->VTOR = (uint32_t) &__Vectors;
85 #endif
86 #endif
87 
88     /* Enable the LPCAC */
89     SYSCON->LPCAC_CTRL |= SYSCON_LPCAC_CTRL_LPCAC_MEM_REQ_MASK;
90     SYSCON->LPCAC_CTRL &= ~SYSCON_LPCAC_CTRL_DIS_LPCAC_MASK;
91 
92     /* Enable flash RWX when FLASH_ACL in IFR0 is invalid */
93     if ((*((volatile const uint32_t *)(0x1000000)) == 0xFFFFFFFFU) ||
94         ((*((volatile const uint32_t *)(0x1000000)) == 0x59630000U) &&
95          (*((volatile const uint32_t *)(0x1000040)) == 0xFFFFFFFFU) &&
96          (*((volatile const uint32_t *)(0x1000044)) == 0xFFFFFFFFU) &&
97          (*((volatile const uint32_t *)(0x1000048)) == 0xFFFFFFFFU) &&
98          (*((volatile const uint32_t *)(0x100004C)) == 0xFFFFFFFFU) &&
99          (*((volatile const uint32_t *)(0x1000050)) == 0xFFFFFFFFU) &&
100          (*((volatile const uint32_t *)(0x1000054)) == 0xFFFFFFFFU) &&
101          (*((volatile const uint32_t *)(0x1000058)) == 0xFFFFFFFFU) &&
102          (*((volatile const uint32_t *)(0x100005C)) == 0xFFFFFFFFU)))
103     {
104         /* Enable MBC register written with GLIKEY index15 */
105         GLIKEY0->CTRL_0 = 0x00060000U;
106         GLIKEY0->CTRL_0 = 0x0002000FU;
107         GLIKEY0->CTRL_0 = 0x0001000FU;
108         GLIKEY0->CTRL_1 = 0x00290000U;
109         GLIKEY0->CTRL_0 = 0x0002000FU;
110         GLIKEY0->CTRL_1 = 0x00280000U;
111         GLIKEY0->CTRL_0 = 0x0000000FU;
112 
113         /* Enable RWX for GLBAC0 */
114         MBC0->MBC_INDEX[0].MBC_MEMN_GLBAC[0] = 0x7700U;
115 
116         /* Use GLBAC0 for all flash block */
117         for (uint8_t i = 0; i < 8U; i++)
118         {
119             MBC0->MBC_INDEX[0].MBC_DOM0_MEM0_BLK_CFG_W[i] = 0x00000000U;
120         }
121 
122         /* Disable MBC register written */
123         GLIKEY0->CTRL_0 = 0x0002000FU;
124     }
125   SystemInitHook();
126 }
127 
128 /* ----------------------------------------------------------------------------
129    -- SystemCoreClockUpdate()
130    ---------------------------------------------------------------------------- */
131 
SystemCoreClockUpdate(void)132 void SystemCoreClockUpdate (void) {
133 
134 }
135 
136 /* ----------------------------------------------------------------------------
137    -- SystemInitHook()
138    ---------------------------------------------------------------------------- */
139 
SystemInitHook(void)140 __attribute__ ((weak)) void SystemInitHook (void) {
141   /* Void implementation of the weak function. */
142 }
143