1 /*
2 * Copyright 2022 NXP
3 * All rights reserved.
4 *
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include "fsl_edma_soc.h"
10
11 /*******************************************************************************
12 * Definitions
13 ******************************************************************************/
14
15 /* Component ID definition, used by tools. */
16 #ifndef FSL_COMPONENT_ID
17 #define FSL_COMPONENT_ID "platform.drivers.edma_soc"
18 #endif
19
20 /*******************************************************************************
21 * Prototypes
22 ******************************************************************************/
23 extern void DMA_CH0_DriverIRQHandler(void);
24 extern void DMA_CH1_DriverIRQHandler(void);
25 extern void DMA_CH2_DriverIRQHandler(void);
26 extern void DMA_CH3_DriverIRQHandler(void);
27 extern void EDMA_DriverIRQHandler(uint32_t instance, uint32_t channel);
28 /*******************************************************************************
29 * Code
30 ******************************************************************************/
31 /*!
32 * brief DMA instance 0, channel 0 IRQ handler.
33 *
34 */
DMA_CH0_DriverIRQHandler(void)35 void DMA_CH0_DriverIRQHandler(void)
36 {
37 /* Instance 0 channel 0 */
38 EDMA_DriverIRQHandler(0U, 0U);
39 }
40
41 /*!
42 * brief DMA instance 0, channel 1 IRQ handler.
43 *
44 */
DMA_CH1_DriverIRQHandler(void)45 void DMA_CH1_DriverIRQHandler(void)
46 {
47 /* Instance 0 channel 1 */
48 EDMA_DriverIRQHandler(0U, 1U);
49 }
50
51 /*!
52 * brief DMA instance 0, channel 2 IRQ handler.
53 *
54 */
DMA_CH2_DriverIRQHandler(void)55 void DMA_CH2_DriverIRQHandler(void)
56 {
57 /* Instance 0 channel 2 */
58 EDMA_DriverIRQHandler(0U, 2U);
59 }
60
61 /*!
62 * brief DMA instance 0, channel 3 IRQ handler.
63 *
64 */
DMA_CH3_DriverIRQHandler(void)65 void DMA_CH3_DriverIRQHandler(void)
66 {
67 /* Instance 0 channel 3 */
68 EDMA_DriverIRQHandler(0U, 3U);
69 }
70
