1 /* 2 * Copyright 2017 NXP 3 * All rights reserved. 4 * 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 #ifndef _FSL_SWM_CONNECTIONS_ 10 #define _FSL_SWM_CONNECTIONS_ 11 12 #include "fsl_common.h" 13 14 /******************************************************************************* 15 * Definitions 16 ******************************************************************************/ 17 /* Component ID definition, used by tools. */ 18 #ifndef FSL_COMPONENT_ID 19 #define FSL_COMPONENT_ID "platform.drivers.swm_connections" 20 #endif 21 22 /*! 23 * @addtogroup swm 24 * @{ 25 */ 26 27 /*! 28 * @name swm connections 29 * @{ 30 */ 31 32 /*! @brief SWM port_pin number */ 33 typedef enum _swm_port_pin_type_t 34 { 35 kSWM_PortPin_P0_0 = 0U, /*!< port_pin number P0_0. */ 36 kSWM_PortPin_P0_1 = 1U, /*!< port_pin number P0_1. */ 37 kSWM_PortPin_P0_2 = 2U, /*!< port_pin number P0_2. */ 38 kSWM_PortPin_P0_3 = 3U, /*!< port_pin number P0_3. */ 39 kSWM_PortPin_P0_4 = 4U, /*!< port_pin number P0_4. */ 40 kSWM_PortPin_P0_5 = 5U, /*!< port_pin number P0_5. */ 41 kSWM_PortPin_P0_6 = 6U, /*!< port_pin number P0_6. */ 42 kSWM_PortPin_P0_7 = 7U, /*!< port_pin number P0_7. */ 43 kSWM_PortPin_P0_8 = 8U, /*!< port_pin number P0_8. */ 44 kSWM_PortPin_P0_9 = 9U, /*!< port_pin number P0_9. */ 45 kSWM_PortPin_P0_10 = 10U, /*!< port_pin number P0_10. */ 46 kSWM_PortPin_P0_11 = 11U, /*!< port_pin number P0_11. */ 47 kSWM_PortPin_P0_12 = 12U, /*!< port_pin number P0_12. */ 48 kSWM_PortPin_P0_13 = 13U, /*!< port_pin number P0_13. */ 49 kSWM_PortPin_P0_14 = 14U, /*!< port_pin number P0_14. */ 50 kSWM_PortPin_P0_15 = 15U, /*!< port_pin number P0_15. */ 51 kSWM_PortPin_P0_16 = 16U, /*!< port_pin number P0_16. */ 52 kSWM_PortPin_P0_17 = 17U, /*!< port_pin number P0_17. */ 53 kSWM_PortPin_P0_18 = 18U, /*!< port_pin number P0_18. */ 54 kSWM_PortPin_P0_19 = 19U, /*!< port_pin number P0_19. */ 55 kSWM_PortPin_P0_20 = 20U, /*!< port_pin number P0_20. */ 56 kSWM_PortPin_P0_21 = 21U, /*!< port_pin number P0_21. */ 57 kSWM_PortPin_P0_22 = 22U, /*!< port_pin number P0_22. */ 58 kSWM_PortPin_P0_23 = 23U, /*!< port_pin number P0_23. */ 59 kSWM_PortPin_P0_24 = 24U, /*!< port_pin number P0_24. */ 60 kSWM_PortPin_P0_25 = 25U, /*!< port_pin number P0_25. */ 61 kSWM_PortPin_P0_26 = 26U, /*!< port_pin number P0_26. */ 62 kSWM_PortPin_P0_27 = 27U, /*!< port_pin number P0_27. */ 63 kSWM_PortPin_P0_28 = 28U, /*!< port_pin number P0_28. */ 64 kSWM_PortPin_P0_29 = 29U, /*!< port_pin number P0_29. */ 65 kSWM_PortPin_P0_30 = 30U, /*!< port_pin number P0_30. */ 66 kSWM_PortPin_P0_31 = 31U, /*!< port_pin number P0_31. */ 67 68 kSWM_PortPin_P1_0 = 32U, /*!< port_pin number P1_0. */ 69 kSWM_PortPin_P1_1 = 33U, /*!< port_pin number P1_1. */ 70 kSWM_PortPin_P1_2 = 34U, /*!< port_pin number P1_2. */ 71 kSWM_PortPin_P1_3 = 35U, /*!< port_pin number P1_3. */ 72 kSWM_PortPin_P1_4 = 36U, /*!< port_pin number P1_4. */ 73 kSWM_PortPin_P1_5 = 37U, /*!< port_pin number P1_5. */ 74 kSWM_PortPin_P1_6 = 38U, /*!< port_pin number P1_6. */ 75 kSWM_PortPin_P1_7 = 39U, /*!< port_pin number P1_7. */ 76 kSWM_PortPin_P1_8 = 40U, /*!< port_pin number P1_8. */ 77 kSWM_PortPin_P1_9 = 41U, /*!< port_pin number P1_9. */ 78 kSWM_PortPin_P1_10 = 42U, /*!< port_pin number P1_10. */ 79 kSWM_PortPin_P1_11 = 43U, /*!< port_pin number P1_11. */ 80 kSWM_PortPin_P1_12 = 44U, /*!< port_pin number P1_12. */ 81 kSWM_PortPin_P1_13 = 45U, /*!< port_pin number P1_13. */ 82 kSWM_PortPin_P1_14 = 46U, /*!< port_pin number P1_14. */ 83 kSWM_PortPin_P1_15 = 47U, /*!< port_pin number P1_15. */ 84 kSWM_PortPin_P1_16 = 48U, /*!< port_pin number P1_16. */ 85 kSWM_PortPin_P1_17 = 49U, /*!< port_pin number P1_17. */ 86 kSWM_PortPin_P1_18 = 50U, /*!< port_pin number P1_18. */ 87 kSWM_PortPin_P1_19 = 51U, /*!< port_pin number P1_19. */ 88 kSWM_PortPin_P1_20 = 52U, /*!< port_pin number P1_20. */ 89 kSWM_PortPin_P1_21 = 53U, /*!< port_pin number P1_21. */ 90 kSWM_PortPin_Reset = 0xffU /*!< port_pin reset number. */ 91 } swm_port_pin_type_t; 92 93 /*! @brief SWM movable selection */ 94 typedef enum _swm_select_movable_t 95 { 96 kSWM_USART0_TXD = 0U, /*!< Movable function as USART0_TXD. */ 97 kSWM_USART0_RXD = 1U, /*!< Movable function as USART0_RXD. */ 98 kSWM_USART0_RTS = 2U, /*!< Movable function as USART0_RTS. */ 99 kSWM_USART0_CTS = 3U, /*!< Movable function as USART0_CTS. */ 100 kSWM_USART0_SCLK = 4U, /*!< Movable function as USART0_SCLK. */ 101 102 kSWM_USART1_TXD = 5U, /*!< Movable function as USART1_TXD. */ 103 kSWM_USART1_RXD = 6U, /*!< Movable function as USART1_RXD. */ 104 kSWM_USART1_RTS = 7U, /*!< Movable function as USART1_RTS. */ 105 kSWM_USART1_CTS = 8U, /*!< Movable function as USART1_CTS. */ 106 kSWM_USART1_SCLK = 9U, /*!< Movable function as USART1_SCLK. */ 107 108 kSWM_USART2_TXD = 10U, /*!< Movable function as USART2_TXD. */ 109 kSWM_USART2_RXD = 11U, /*!< Movable function as USART2_RXD. */ 110 kSWM_USART2_RTS = 12U, /*!< Movable function as USART2_RTS. */ 111 kSWM_USART2_CTS = 13U, /*!< Movable function as USART2_CTS. */ 112 kSWM_USART2_SCLK = 14U, /*!< Movable function as USART2_SCLK. */ 113 114 kSWM_SPI0_SCK = 15U, /*!< Movable function as SPI0_SCK. */ 115 kSWM_SPI0_MOSI = 16U, /*!< Movable function as SPI0_MOSI. */ 116 kSWM_SPI0_MISO = 17U, /*!< Movable function as SPI0_MISO. */ 117 kSWM_SPI0_SSEL0 = 18U, /*!< Movable function as SPI0_SSEL0. */ 118 kSWM_SPI0_SSEL1 = 19U, /*!< Movable function as SPI0_SSEL1. */ 119 kSWM_SPI0_SSEL2 = 20U, /*!< Movable function as SPI0_SSEL2. */ 120 kSWM_SPI0_SSEL3 = 21U, /*!< Movable function as SPI0_SSEL3. */ 121 122 kSWM_SPI1_SCK = 22U, /*!< Movable function as SPI1_SCK. */ 123 kSWM_SPI1_MOSI = 23U, /*!< Movable function as SPI1_MOSI. */ 124 kSWM_SPI1_MISO = 24U, /*!< Movable function as SPI1_MISO. */ 125 kSWM_SPI1_SSEL0 = 25U, /*!< Movable function as SPI1_SSEL0. */ 126 kSWM_SPI1_SSEL1 = 26U, /*!< Movable function as SPI1_SSEL1. */ 127 128 kSWM_I2C0_SDA = 27U, /*!< Movable function as I2C0_SDA. */ 129 kSWM_I2C0_SCL = 28U, /*!< Movable function as I2C0_SCL. */ 130 kSWM_I3C0_SDA = 29U, /*!< Movable function as I3C0_SDA. */ 131 kSWM_I3C0_SCL = 30U, /*!< Movable function as I3C0_SCL. */ 132 kSWM_I3C0_PUR = 31U, /*!< Movable function as I3C0_PUR. */ 133 134 kSWM_ACMP_O = 32U, /*!< Movable function as COMP0_OUT. */ 135 kSWM_CLKOUT = 33U, /*!< Movable function as CLKOUT. */ 136 kSWM_GPIO_INT_BMAT = 34U, /*!< Movable function as GPIO_INT_BMAT. */ 137 138 kSWM_MOVABLE_NUM_FUNCS = 35U, /*!< Movable function number. */ 139 } swm_select_movable_t; 140 141 /*! @brief SWM fixed pin selection */ 142 typedef enum _swm_select_fixed_pin_t 143 { 144 kSWM_ACMP_INPUT1 = SWM_PINENABLE0_ACMP_I1_MASK, /*!< Fixed-pin function as ACMP_INPUT1. */ 145 kSWM_ACMP_INPUT2 = SWM_PINENABLE0_ACMP_I2_MASK, /*!< Fixed-pin function as ACMP_INPUT2. */ 146 kSWM_ACMP_INPUT3 = SWM_PINENABLE0_ACMP_I3_MASK, /*!< Fixed-pin function as ACMP_INPUT3. */ 147 kSWM_ACMP_INPUT4 = SWM_PINENABLE0_ACMP_I4_MASK, /*!< Fixed-pin function as ACMP_INPUT4. */ 148 kSWM_ACMP_INPUT5 = SWM_PINENABLE0_ACMP_I5_MASK, /*!< Fixed-pin function as ACMP_INPUT5. */ 149 kSWM_SWCLK = SWM_PINENABLE0_SWCLK_MASK, /*!< Fixed-pin function as SWCLK. */ 150 kSWM_SWDIO = SWM_PINENABLE0_SWDIO_MASK, /*!< Fixed-pin function as SWDIO. */ 151 kSWM_RESETN = SWM_PINENABLE0_RESETN_MASK, /*!< Fixed-pin function as RESETN. */ 152 kSWM_CLKIN = SWM_PINENABLE0_CLKIN_MASK, /*!< Fixed-pin function as CLKIN. */ 153 kSWM_CMPVREF = SWM_PINENABLE0_CMPVREF_MASK, /*!< Fixed-pin function as CMPVREF. */ 154 kSWM_XTALIN = SWM_PINENABLE0_XTALIN_MASK, /*!< Fixed-pin function as XTALIN. */ 155 kSWM_XTALOUT = SWM_PINENABLE0_XTALOUT_MASK, /*!< Fixed-pin function as XTALOUT. */ 156 kSWM_ADC_CHN0 = SWM_PINENABLE0_ADC_0_MASK, /*!< Fixed-pin function as ADC_CHN0. */ 157 kSWM_ADC_CHN1 = SWM_PINENABLE0_ADC_1_MASK, /*!< Fixed-pin function as ADC_CHN1. */ 158 kSWM_ADC_CHN2 = SWM_PINENABLE0_ADC_2_MASK, /*!< Fixed-pin function as ADC_CHN2. */ 159 kSWM_ADC_CHN3 = SWM_PINENABLE0_ADC_3_MASK, /*!< Fixed-pin function as ADC_CHN3. */ 160 kSWM_ADC_CHN4 = SWM_PINENABLE0_ADC_4_MASK, /*!< Fixed-pin function as ADC_CHN4. */ 161 kSWM_ADC_CHN5 = SWM_PINENABLE0_ADC_5_MASK, /*!< Fixed-pin function as ADC_CHN5. */ 162 kSWM_ADC_CHN6 = SWM_PINENABLE0_ADC_6_MASK, /*!< Fixed-pin function as ADC_CHN6. */ 163 kSWM_ADC_CHN7 = SWM_PINENABLE0_ADC_7_MASK, /*!< Fixed-pin function as ADC_CHN7. */ 164 kSWM_ADC_CHN8 = SWM_PINENABLE0_ADC_8_MASK, /*!< Fixed-pin function as ADC_CHN8. */ 165 kSWM_ADC_CHN9 = SWM_PINENABLE0_ADC_9_MASK, /*!< Fixed-pin function as ADC_CHN9. */ 166 kSWM_ADC_CHN10 = SWM_PINENABLE0_ADC_10_MASK, /*!< Fixed-pin function as ADC_CHN10. */ 167 kSWM_ADC_CHN11 = SWM_PINENABLE0_ADC_11_MASK, /*!< Fixed-pin function as ADC_CHN11. */ 168 169 kSWM_FIXEDPIN_NUM_FUNCS = (int)0x80000041U, /*!< Fixed-pin function number. */ 170 } swm_select_fixed_pin_t; 171 172 /*! @brief SWM flextimer pin function */ 173 typedef enum _swm_flextimer_pin_func_t 174 { 175 kSWM_FTM0_EXTCLK = 0, /*!< Flextimer function as FTM0_EXTCLK. */ 176 kSWM_FTM0_CH0 = 1, /*!< Flextimer function as FTM0_CH0. */ 177 kSWM_FTM0_CH1 = 2, /*!< Flextimer function as FTM0_CH1. */ 178 kSWM_FTM0_CH2 = 3, /*!< Flextimer function as FTM0_CH2. */ 179 kSWM_FTM0_CH3 = 4, /*!< Flextimer function as FTM0_CH3. */ 180 kSWM_FTM0_CH4 = 5, /*!< Flextimer function as FTM0_CH4. */ 181 kSWM_FTM0_CH5 = 6, /*!< Flextimer function as FTM0_CH5. */ 182 kSWM_FTM0_FAULT0 = 7, /*!< Flextimer function as FTM0_FAULT0. */ 183 kSWM_FTM0_FAULT1 = 8, /*!< Flextimer function as FTM0_FAULT1. */ 184 kSWM_FTM0_FAULT2 = 9, /*!< Flextimer function as FTM0_FAULT2. */ 185 kSWM_FTM0_FAULT3 = 10, /*!< Flextimer function as FTM0_FAULT3. */ 186 kSWM_FTM1_EXTCLK = 11, /*!< Flextimer function as FTM1_EXTCLK. */ 187 kSWM_FTM1_CH0 = 12, /*!< Flextimer function as FTM1_CH0. */ 188 kSWM_FTM1_CH1 = 13, /*!< Flextimer function as FTM1_CH1. */ 189 kSWM_FTM1_CH2 = 14, /*!< Flextimer function as FTM1_CH2. */ 190 kSWM_FTM1_CH3 = 15, /*!< Flextimer function as FTM1_CH3. */ 191 kSWM_FTM1_QD_PHA = 16, /*!< Flextimer function as FTM1_QD_PHA. */ 192 kSWM_FTM1_QD_PHB = 17, /*!< Flextimer function as FTM1_QD_PHB. */ 193 194 kSWM_FTM_NUM_FUNCS = 18, /*!< Flextimer function function number. */ 195 } swm_flextimer_pin_func_t; 196 197 /*! @brief SWM flextimer pin selection */ 198 typedef enum _swm_select_flextimer_pin_sel_t 199 { 200 kSWM_FTM_Selection0 = 0, /*!< Flextimer pin selection0. */ 201 kSWM_FTM_Selection1 = 1, /*!< Flextimer pin selection1. */ 202 kSWM_FTM_Selection2 = 2, /*!< Flextimer pin selection2. */ 203 kSWM_FTM_Selection3 = 3, /*!< Flextimer pin selection3, which is not connected by default on LPC86x. */ 204 } swm_flextimer_pin_sel_t; 205 206 /*@}*/ 207 208 /*@}*/ 209 210 #endif /* _FSL_SWM_CONNECTIONS_ */ 211
