1 /*
2  * Copyright  2018 NXP
3  * All rights reserved.
4  *
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #ifndef _FSL_SYSCON_CONNECTIONS_
10 #define _FSL_SYSCON_CONNECTIONS_
11 
12 #include "fsl_common.h"
13 
14 /*******************************************************************************
15  * Definitions
16  ******************************************************************************/
17 /* Component ID definition, used by tools. */
18 #ifndef FSL_COMPONENT_ID
19 #define FSL_COMPONENT_ID "platform.drivers.syscon_connections"
20 #endif
21 
22 /*!
23  * @addtogroup syscon
24  * @{
25  */
26 
27 /*!
28  * @name Syscon multiplexing connections
29  * @{
30  */
31 
32 /*! @brief Periphinmux IDs */
33 #define PINTSEL_ID 0x178U
34 #define SYSCON_SHIFT 20U
35 
36 /*! @brief SYSCON connections type */
37 typedef enum _syscon_connection_t
38 {
39     /*!< Pin Interrupt. */
40     kSYSCON_GpioPort0Pin0ToPintsel = 0U + (PINTSEL_ID << SYSCON_SHIFT),
41     kSYSCON_GpioPort0Pin1ToPintsel = 1U + (PINTSEL_ID << SYSCON_SHIFT),
42     kSYSCON_GpioPort0Pin2ToPintsel = 2U + (PINTSEL_ID << SYSCON_SHIFT),
43     kSYSCON_GpioPort0Pin3ToPintsel = 3U + (PINTSEL_ID << SYSCON_SHIFT),
44     kSYSCON_GpioPort0Pin4ToPintsel = 4U + (PINTSEL_ID << SYSCON_SHIFT),
45     kSYSCON_GpioPort0Pin5ToPintsel = 5U + (PINTSEL_ID << SYSCON_SHIFT),
46     kSYSCON_GpioPort0Pin6ToPintsel = 6U + (PINTSEL_ID << SYSCON_SHIFT),
47     kSYSCON_GpioPort0Pin7ToPintsel = 7U + (PINTSEL_ID << SYSCON_SHIFT),
48     kSYSCON_GpioPort0Pin8ToPintsel = 8U + (PINTSEL_ID << SYSCON_SHIFT),
49     kSYSCON_GpioPort0Pin9ToPintsel = 9U + (PINTSEL_ID << SYSCON_SHIFT),
50     kSYSCON_GpioPort0Pin10ToPintsel = 10U + (PINTSEL_ID << SYSCON_SHIFT),
51     kSYSCON_GpioPort0Pin11ToPintsel = 11U + (PINTSEL_ID << SYSCON_SHIFT),
52     kSYSCON_GpioPort0Pin12ToPintsel = 12U + (PINTSEL_ID << SYSCON_SHIFT),
53     kSYSCON_GpioPort0Pin13ToPintsel = 13U + (PINTSEL_ID << SYSCON_SHIFT),
54     kSYSCON_GpioPort0Pin14ToPintsel = 14U + (PINTSEL_ID << SYSCON_SHIFT),
55     kSYSCON_GpioPort0Pin15ToPintsel = 15U + (PINTSEL_ID << SYSCON_SHIFT),
56     kSYSCON_GpioPort0Pin16ToPintsel = 16U + (PINTSEL_ID << SYSCON_SHIFT),
57     kSYSCON_GpioPort0Pin17ToPintsel = 17U + (PINTSEL_ID << SYSCON_SHIFT),
58     kSYSCON_GpioPort0Pin18ToPintsel = 18U + (PINTSEL_ID << SYSCON_SHIFT),
59     kSYSCON_GpioPort0Pin19ToPintsel = 19U + (PINTSEL_ID << SYSCON_SHIFT),
60     kSYSCON_GpioPort0Pin20ToPintsel = 20U + (PINTSEL_ID << SYSCON_SHIFT),
61     kSYSCON_GpioPort0Pin21ToPintsel = 21U + (PINTSEL_ID << SYSCON_SHIFT),
62     kSYSCON_GpioPort0Pin22ToPintsel = 22U + (PINTSEL_ID << SYSCON_SHIFT),
63     kSYSCON_GpioPort0Pin23ToPintsel = 23U + (PINTSEL_ID << SYSCON_SHIFT),
64     kSYSCON_GpioPort0Pin24ToPintsel = 24U + (PINTSEL_ID << SYSCON_SHIFT),
65     kSYSCON_GpioPort0Pin25ToPintsel = 25U + (PINTSEL_ID << SYSCON_SHIFT),
66     kSYSCON_GpioPort0Pin26ToPintsel = 26U + (PINTSEL_ID << SYSCON_SHIFT),
67     kSYSCON_GpioPort0Pin27ToPintsel = 27U + (PINTSEL_ID << SYSCON_SHIFT),
68     kSYSCON_GpioPort0Pin28ToPintsel = 28U + (PINTSEL_ID << SYSCON_SHIFT),
69     kSYSCON_GpioPort0Pin29ToPintsel = 29U + (PINTSEL_ID << SYSCON_SHIFT),
70     kSYSCON_GpioPort0Pin30ToPintsel = 30U + (PINTSEL_ID << SYSCON_SHIFT),
71     kSYSCON_GpioPort0Pin31ToPintsel = 31U + (PINTSEL_ID << SYSCON_SHIFT),
72     kSYSCON_GpioPort1Pin0ToPintsel = 32U + (PINTSEL_ID << SYSCON_SHIFT),
73     kSYSCON_GpioPort1Pin1ToPintsel = 33U + (PINTSEL_ID << SYSCON_SHIFT),
74     kSYSCON_GpioPort1Pin2ToPintsel = 34U + (PINTSEL_ID << SYSCON_SHIFT),
75     kSYSCON_GpioPort1Pin3ToPintsel = 35U + (PINTSEL_ID << SYSCON_SHIFT),
76     kSYSCON_GpioPort1Pin4ToPintsel = 36U + (PINTSEL_ID << SYSCON_SHIFT),
77     kSYSCON_GpioPort1Pin5ToPintsel = 37U + (PINTSEL_ID << SYSCON_SHIFT),
78     kSYSCON_GpioPort1Pin6ToPintsel = 38U + (PINTSEL_ID << SYSCON_SHIFT),
79     kSYSCON_GpioPort1Pin7ToPintsel = 39U + (PINTSEL_ID << SYSCON_SHIFT),
80     kSYSCON_GpioPort1Pin8ToPintsel = 40U + (PINTSEL_ID << SYSCON_SHIFT),
81     kSYSCON_GpioPort1Pin9ToPintsel = 41U + (PINTSEL_ID << SYSCON_SHIFT),
82     kSYSCON_GpioPort1Pin10ToPintsel = 42U + (PINTSEL_ID << SYSCON_SHIFT),
83     kSYSCON_GpioPort1Pin11ToPintsel = 43U + (PINTSEL_ID << SYSCON_SHIFT),
84     kSYSCON_GpioPort1Pin12ToPintsel = 44U + (PINTSEL_ID << SYSCON_SHIFT),
85     kSYSCON_GpioPort1Pin13ToPintsel = 45U + (PINTSEL_ID << SYSCON_SHIFT),
86     kSYSCON_GpioPort1Pin14ToPintsel = 46U + (PINTSEL_ID << SYSCON_SHIFT),
87     kSYSCON_GpioPort1Pin15ToPintsel = 47U + (PINTSEL_ID << SYSCON_SHIFT),
88     kSYSCON_GpioPort1Pin16ToPintsel = 48U + (PINTSEL_ID << SYSCON_SHIFT),
89     kSYSCON_GpioPort1Pin17ToPintsel = 49U + (PINTSEL_ID << SYSCON_SHIFT),
90     kSYSCON_GpioPort1Pin18ToPintsel = 50U + (PINTSEL_ID << SYSCON_SHIFT),
91     kSYSCON_GpioPort1Pin19ToPintsel = 51U + (PINTSEL_ID << SYSCON_SHIFT),
92     kSYSCON_GpioPort1Pin20ToPintsel = 52U + (PINTSEL_ID << SYSCON_SHIFT),
93     kSYSCON_GpioPort1Pin21ToPintsel = 53U + (PINTSEL_ID << SYSCON_SHIFT),
94     kSYSCON_GpioPort1Pin22ToPintsel = 54U + (PINTSEL_ID << SYSCON_SHIFT),
95     kSYSCON_GpioPort1Pin23ToPintsel = 55U + (PINTSEL_ID << SYSCON_SHIFT),
96     kSYSCON_GpioPort1Pin24ToPintsel = 56U + (PINTSEL_ID << SYSCON_SHIFT),
97     kSYSCON_GpioPort1Pin25ToPintsel = 57U + (PINTSEL_ID << SYSCON_SHIFT),
98     kSYSCON_GpioPort1Pin26ToPintsel = 58U + (PINTSEL_ID << SYSCON_SHIFT),
99     kSYSCON_GpioPort1Pin27ToPintsel = 59U + (PINTSEL_ID << SYSCON_SHIFT),
100     kSYSCON_GpioPort1Pin28ToPintsel = 60U + (PINTSEL_ID << SYSCON_SHIFT),
101     kSYSCON_GpioPort1Pin29ToPintsel = 61U + (PINTSEL_ID << SYSCON_SHIFT),
102     kSYSCON_GpioPort1Pin30ToPintsel = 62U + (PINTSEL_ID << SYSCON_SHIFT),
103     kSYSCON_GpioPort1Pin31ToPintsel = 63U + (PINTSEL_ID << SYSCON_SHIFT),
104 } syscon_connection_t;
105 
106 /*@}*/
107 
108 /*@}*/
109 
110 #endif /* _FSL_SYSCON_CONNECTIONS_ */
111