1 /* 2 * Copyright 2021-2024 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef _BOARD_H_ 9 #define _BOARD_H_ 10 11 #include "fsl_common.h" 12 #include "fsl_gpio.h" 13 14 /******************************************************************************* 15 * Definitions 16 ******************************************************************************/ 17 /*! @brief The board name */ 18 #define BOARD_NAME "RD-RW61X-BGA" 19 20 /*! @brief Macro to judge XIP */ 21 #define BOARD_IS_XIP() \ 22 ((((uint32_t)BOARD_InitDebugConsole >= 0x08000000U) && ((uint32_t)BOARD_InitDebugConsole < 0x10000000U)) || \ 23 (((uint32_t)BOARD_InitDebugConsole >= 0x18000000U) && ((uint32_t)BOARD_InitDebugConsole < 0x20000000U))) 24 25 /*! @brief The UART to use for debug messages. */ 26 #define BOARD_DEBUG_UART_TYPE kSerialPort_Uart 27 #define BOARD_DEBUG_UART_BASEADDR (uint32_t) FLEXCOMM3 28 #define BOARD_DEBUG_UART_INSTANCE 3U 29 #define BOARD_DEBUG_UART USART3 30 #define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetFlexCommClkFreq(3) 31 #define BOARD_DEBUG_UART_FRG_CLK \ 32 (&(const clock_frg_clk_config_t){3, kCLOCK_FrgPllDiv, 255, 0}) /*!< Select FRG3 mux as frg_pll */ 33 #define BOARD_DEBUG_UART_CLK_ATTACH kFRG_to_FLEXCOMM3 34 #define BOARD_DEBUG_UART_RST kFC3_RST_SHIFT_RSTn 35 #define BOARD_DEBUG_UART_CLKSRC kCLOCK_Flexcomm3 36 #define BOARD_UART_IRQ_HANDLER FLEXCOMM3_IRQHandler 37 #define BOARD_UART_IRQ FLEXCOMM3_IRQn 38 39 #ifndef BOARD_DEBUG_UART_BAUDRATE 40 #define BOARD_DEBUG_UART_BAUDRATE 115200 41 #endif /* BOARD_DEBUG_UART_BAUDRATE */ 42 43 #define BOARD_FLEXSPI_PSRAM FLEXSPI 44 #ifndef BOARD_ENABLE_PSRAM_CACHE 45 #define BOARD_ENABLE_PSRAM_CACHE 1 46 #endif 47 48 /* Board I2C for codec */ 49 #define BOARD_CODEC_I2C_BASEADDR I2C2 50 #define BOARD_CODEC_I2C_CLOCK_FREQ CLOCK_GetFlexCommClkFreq(2U) 51 #define BOARD_CODEC_I2C_INSTANCE 2 52 #define BOARD_CODEC_I2C_SDA_PORT 0 53 #define BOARD_CODEC_I2C_SCL_PORT 0 54 #define BOARD_CODEC_I2C_SDA_PIN 16 55 #define BOARD_CODEC_I2C_SCL_PIN 17 56 57 /* Board led color mapping */ 58 #define LOGIC_LED_ON 1U 59 #define LOGIC_LED_OFF 0U 60 61 /* A fake led on GPIO header */ 62 #ifndef BOARD_LED_BLUE_GPIO 63 #define BOARD_LED_BLUE_GPIO GPIO 64 #endif 65 #define BOARD_LED_BLUE_GPIO_PORT 0U 66 #ifndef BOARD_LED_BLUE_GPIO_PIN 67 #define BOARD_LED_BLUE_GPIO_PIN 1U 68 #endif 69 70 #define LED_BLUE_INIT(output) \ 71 GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN, \ 72 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_BLUE */ 73 #define LED_BLUE_ON() \ 74 GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \ 75 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE */ 76 #define LED_BLUE_OFF() \ 77 GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \ 78 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE */ 79 #define LED_BLUE_TOGGLE() \ 80 GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \ 81 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */ 82 83 /* Board SW PIN */ 84 #ifndef BOARD_SW1_GPIO 85 #define BOARD_SW1_GPIO GPIO 86 #endif 87 #define BOARD_SW1_GPIO_PORT 0U 88 #ifndef BOARD_SW1_GPIO_PIN 89 #define BOARD_SW1_GPIO_PIN 13U 90 #endif 91 92 #ifndef BOARD_SW2_GPIO 93 #define BOARD_SW2_GPIO GPIO 94 #endif 95 #define BOARD_SW2_GPIO_PORT 0U 96 #ifndef BOARD_SW2_GPIO_PIN 97 #define BOARD_SW2_GPIO_PIN 14U 98 #endif 99 100 #ifndef BOARD_SW3_GPIO 101 #define BOARD_SW3_GPIO GPIO 102 #endif 103 #define BOARD_SW3_GPIO_PORT 0U 104 #ifndef BOARD_SW3_GPIO_PIN 105 #define BOARD_SW3_GPIO_PIN 24U 106 #endif 107 108 #ifndef BOARD_SW4_GPIO 109 #define BOARD_SW4_GPIO GPIO 110 #endif 111 #define BOARD_SW4_GPIO_PORT 0U 112 #ifndef BOARD_SW4_GPIO_PIN 113 #define BOARD_SW4_GPIO_PIN 25U 114 #endif 115 116 #define BOARD_ENET0_PHY_ADDRESS (0x02U) 117 118 /*! @brief The USIM SMARTCARD PHY configuration. */ 119 #define BOARD_SMARTCARD_MODULE (USIM) /*!< SMARTCARD communicational module instance */ 120 #define BOARD_SMARTCARD_MODULE_IRQ (USIM_IRQn) /*!< SMARTCARD communicational module IRQ handler */ 121 #define BOARD_SMARTCARD_CLOCK_MODULE_CLK_FREQ (CLOCK_GetUsimClkFreq()) 122 #define BOARD_SMARTCARD_CLOCK_VALUE (4000000U) /*!< SMARTCARD clock frequency (4Mhz) */ 123 #define BOARD_SMARTCARD_IRQ_PORT (0) 124 #define BOARD_SMARTCARD_IRQ_PIN (19) 125 #define BOARD_SMARTCARD_TS_TIMER_IRQ (CTIMER0_IRQn) 126 127 #if defined(__cplusplus) 128 extern "C" { 129 #endif /* __cplusplus */ 130 131 /******************************************************************************* 132 * API 133 ******************************************************************************/ 134 135 void BOARD_InitDebugConsole(void); 136 status_t BOARD_InitPsRam(void); 137 void BOARD_InitSleepPinConfig(void); 138 void BOARD_ClockPreConfig(void); 139 void BOARD_ClockPostConfig(void); 140 AT_QUICKACCESS_SECTION_CODE(void BOARD_SetFlexspiClock(FLEXSPI_Type *base, uint32_t src, uint32_t divider)); 141 AT_QUICKACCESS_SECTION_CODE(void BOARD_DeinitFlash(FLEXSPI_Type *base)); 142 AT_QUICKACCESS_SECTION_CODE(void BOARD_InitFlash(FLEXSPI_Type *base)); 143 144 #if defined(__cplusplus) 145 } 146 #endif /* __cplusplus */ 147 148 #endif /* _BOARD_H_ */ 149