1 /*
2  * Copyright 2017-2018, 2023 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /***********************************************************************************************************************
9  * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10  * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11  **********************************************************************************************************************/
12 
13 #ifndef _CLOCK_CONFIG_H_
14 #define _CLOCK_CONFIG_H_
15 
16 #include "fsl_common.h"
17 
18 /*******************************************************************************
19  * Definitions
20  ******************************************************************************/
21 #define BOARD_XTAL0_CLK_HZ                         16000000U  /*!< Board xtal frequency in Hz */
22 #define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32K frequency in Hz */
23 
24 /*******************************************************************************
25  ************************ BOARD_InitBootClocks function ************************
26  ******************************************************************************/
27 
28 #if defined(__cplusplus)
29 extern "C" {
30 #endif /* __cplusplus*/
31 
32 /*!
33  * @brief This function executes default configuration of clocks.
34  *
35  */
36 void BOARD_InitBootClocks(void);
37 
38 #if defined(__cplusplus)
39 }
40 #endif /* __cplusplus*/
41 
42 /*******************************************************************************
43  ******************** Configuration BOARD_BootClockFRO12M **********************
44  ******************************************************************************/
45 /*******************************************************************************
46  * Definitions for BOARD_BootClockFRO12M configuration
47  ******************************************************************************/
48 #define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
49 
50 
51 /* Clock outputs (values are in Hz): */
52 #define BOARD_BOOTCLOCKFRO12M_ASYNCADC_CLOCK          0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
53 #define BOARD_BOOTCLOCKFRO12M_CAN_CLOCK               0UL            /* Clock consumers of CAN_clock output : CAN0 */
54 #define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
55 #define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
56 #define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
57 #define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
58 #define BOARD_BOOTCLOCKFRO12M_CTIMER3_CLOCK           0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
59 #define BOARD_BOOTCLOCKFRO12M_CTIMER4_CLOCK           0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
60 #define BOARD_BOOTCLOCKFRO12M_FRO_12MHZ_CLOCK         12000000UL     /* Clock consumers of FRO_12MHz_clock output : ANACTRL */
61 #define BOARD_BOOTCLOCKFRO12M_FRO_1MHZ_CLOCK          0UL            /* Clock consumers of FRO_1MHz_clock output : N/A */
62 #define BOARD_BOOTCLOCKFRO12M_FXCOM0_CLOCK            0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
63 #define BOARD_BOOTCLOCKFRO12M_FXCOM1_CLOCK            0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
64 #define BOARD_BOOTCLOCKFRO12M_FXCOM2_CLOCK            0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
65 #define BOARD_BOOTCLOCKFRO12M_FXCOM3_CLOCK            0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
66 #define BOARD_BOOTCLOCKFRO12M_FXCOM4_CLOCK            0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
67 #define BOARD_BOOTCLOCKFRO12M_FXCOM5_CLOCK            0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
68 #define BOARD_BOOTCLOCKFRO12M_FXCOM6_CLOCK            0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
69 #define BOARD_BOOTCLOCKFRO12M_FXCOM7_CLOCK            0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
70 #define BOARD_BOOTCLOCKFRO12M_HSLSPI_CLOCK            0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
71 #define BOARD_BOOTCLOCKFRO12M_MCLK_CLOCK              0UL            /* Clock consumers of MCLK_clock output : N/A */
72 #define BOARD_BOOTCLOCKFRO12M_OSC32KHZ_CLOCK          0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8 */
73 #define BOARD_BOOTCLOCKFRO12M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER */
74 #define BOARD_BOOTCLOCKFRO12M_PLUCLKIN_CLOCK          0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
75 #define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_12MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
76 #define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_1MHZ_CLOCK   0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
77 #define BOARD_BOOTCLOCKFRO12M_RTC1HZ_CLOCK            0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
78 #define BOARD_BOOTCLOCKFRO12M_RTC1KHZ_CLOCK           0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
79 #define BOARD_BOOTCLOCKFRO12M_SCT_CLOCK               0UL            /* Clock consumers of SCT_clock output : SCT0 */
80 #define BOARD_BOOTCLOCKFRO12M_SYSTICK0_CLOCK          0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
81 #define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK            12000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CAN0, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLASH, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SECGPIO, SECPINT, SWD, SYSCTL, UTICK0, WWDT */
82 #define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK             0UL            /* Clock consumers of TRACE_clock output : SWD */
83 #define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK             0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
84 #define BOARD_BOOTCLOCKFRO12M_WDT_CLOCK               0UL            /* Clock consumers of WDT_clock output : WWDT */
85 
86 /*******************************************************************************
87  * API for BOARD_BootClockFRO12M configuration
88  ******************************************************************************/
89 #if defined(__cplusplus)
90 extern "C" {
91 #endif /* __cplusplus*/
92 
93 /*!
94  * @brief This function executes configuration of clocks.
95  *
96  */
97 void BOARD_BootClockFRO12M(void);
98 
99 #if defined(__cplusplus)
100 }
101 #endif /* __cplusplus*/
102 
103 /*******************************************************************************
104  ******************* Configuration BOARD_BootClockFROHF96M *********************
105  ******************************************************************************/
106 /*******************************************************************************
107  * Definitions for BOARD_BootClockFROHF96M configuration
108  ******************************************************************************/
109 #define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK         96000000U  /*!< Core clock frequency: 96000000Hz */
110 
111 
112 /* Clock outputs (values are in Hz): */
113 #define BOARD_BOOTCLOCKFROHF96M_ASYNCADC_CLOCK        0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
114 #define BOARD_BOOTCLOCKFROHF96M_CAN_CLOCK             0UL            /* Clock consumers of CAN_clock output : CAN0 */
115 #define BOARD_BOOTCLOCKFROHF96M_CLKOUT_CLOCK          0UL            /* Clock consumers of CLKOUT_clock output : N/A */
116 #define BOARD_BOOTCLOCKFROHF96M_CTIMER0_CLOCK         0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
117 #define BOARD_BOOTCLOCKFROHF96M_CTIMER1_CLOCK         0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
118 #define BOARD_BOOTCLOCKFROHF96M_CTIMER2_CLOCK         0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
119 #define BOARD_BOOTCLOCKFROHF96M_CTIMER3_CLOCK         0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
120 #define BOARD_BOOTCLOCKFROHF96M_CTIMER4_CLOCK         0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
121 #define BOARD_BOOTCLOCKFROHF96M_FRO_12MHZ_CLOCK       12000000UL     /* Clock consumers of FRO_12MHz_clock output : ANACTRL */
122 #define BOARD_BOOTCLOCKFROHF96M_FRO_1MHZ_CLOCK        0UL            /* Clock consumers of FRO_1MHz_clock output : N/A */
123 #define BOARD_BOOTCLOCKFROHF96M_FXCOM0_CLOCK          0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
124 #define BOARD_BOOTCLOCKFROHF96M_FXCOM1_CLOCK          0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
125 #define BOARD_BOOTCLOCKFROHF96M_FXCOM2_CLOCK          0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
126 #define BOARD_BOOTCLOCKFROHF96M_FXCOM3_CLOCK          0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
127 #define BOARD_BOOTCLOCKFROHF96M_FXCOM4_CLOCK          0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
128 #define BOARD_BOOTCLOCKFROHF96M_FXCOM5_CLOCK          0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
129 #define BOARD_BOOTCLOCKFROHF96M_FXCOM6_CLOCK          0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
130 #define BOARD_BOOTCLOCKFROHF96M_FXCOM7_CLOCK          0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
131 #define BOARD_BOOTCLOCKFROHF96M_HSLSPI_CLOCK          0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
132 #define BOARD_BOOTCLOCKFROHF96M_MCLK_CLOCK            0UL            /* Clock consumers of MCLK_clock output : N/A */
133 #define BOARD_BOOTCLOCKFROHF96M_OSC32KHZ_CLOCK        0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8 */
134 #define BOARD_BOOTCLOCKFROHF96M_OSTIMER_CLOCK         0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER */
135 #define BOARD_BOOTCLOCKFROHF96M_PLUCLKIN_CLOCK        0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
136 #define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_12MHZ_CLOCK0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
137 #define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_1MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
138 #define BOARD_BOOTCLOCKFROHF96M_RTC1HZ_CLOCK          0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
139 #define BOARD_BOOTCLOCKFROHF96M_RTC1KHZ_CLOCK         0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
140 #define BOARD_BOOTCLOCKFROHF96M_SCT_CLOCK             0UL            /* Clock consumers of SCT_clock output : SCT0 */
141 #define BOARD_BOOTCLOCKFROHF96M_SYSTICK0_CLOCK        0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
142 #define BOARD_BOOTCLOCKFROHF96M_SYSTEM_CLOCK          96000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CAN0, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLASH, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SECGPIO, SECPINT, SWD, SYSCTL, UTICK0, WWDT */
143 #define BOARD_BOOTCLOCKFROHF96M_TRACE_CLOCK           0UL            /* Clock consumers of TRACE_clock output : SWD */
144 #define BOARD_BOOTCLOCKFROHF96M_UTICK_CLOCK           0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
145 #define BOARD_BOOTCLOCKFROHF96M_WDT_CLOCK             0UL            /* Clock consumers of WDT_clock output : WWDT */
146 
147 /*******************************************************************************
148  * API for BOARD_BootClockFROHF96M configuration
149  ******************************************************************************/
150 #if defined(__cplusplus)
151 extern "C" {
152 #endif /* __cplusplus*/
153 
154 /*!
155  * @brief This function executes configuration of clocks.
156  *
157  */
158 void BOARD_BootClockFROHF96M(void);
159 
160 #if defined(__cplusplus)
161 }
162 #endif /* __cplusplus*/
163 
164 /*******************************************************************************
165  ******************** Configuration BOARD_BootClockPLL96M **********************
166  ******************************************************************************/
167 /*******************************************************************************
168  * Definitions for BOARD_BootClockPLL96M configuration
169  ******************************************************************************/
170 #define BOARD_BOOTCLOCKPLL96M_CORE_CLOCK           96000000U  /*!< Core clock frequency: 96000000Hz */
171 
172 
173 /* Clock outputs (values are in Hz): */
174 #define BOARD_BOOTCLOCKPLL96M_ASYNCADC_CLOCK          0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
175 #define BOARD_BOOTCLOCKPLL96M_CAN_CLOCK               0UL            /* Clock consumers of CAN_clock output : CAN0 */
176 #define BOARD_BOOTCLOCKPLL96M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
177 #define BOARD_BOOTCLOCKPLL96M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
178 #define BOARD_BOOTCLOCKPLL96M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
179 #define BOARD_BOOTCLOCKPLL96M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
180 #define BOARD_BOOTCLOCKPLL96M_CTIMER3_CLOCK           0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
181 #define BOARD_BOOTCLOCKPLL96M_CTIMER4_CLOCK           0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
182 #define BOARD_BOOTCLOCKPLL96M_FRO_12MHZ_CLOCK         12000000UL     /* Clock consumers of FRO_12MHz_clock output : ANACTRL */
183 #define BOARD_BOOTCLOCKPLL96M_FRO_1MHZ_CLOCK          0UL            /* Clock consumers of FRO_1MHz_clock output : N/A */
184 #define BOARD_BOOTCLOCKPLL96M_FXCOM0_CLOCK            0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
185 #define BOARD_BOOTCLOCKPLL96M_FXCOM1_CLOCK            0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
186 #define BOARD_BOOTCLOCKPLL96M_FXCOM2_CLOCK            0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
187 #define BOARD_BOOTCLOCKPLL96M_FXCOM3_CLOCK            0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
188 #define BOARD_BOOTCLOCKPLL96M_FXCOM4_CLOCK            0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
189 #define BOARD_BOOTCLOCKPLL96M_FXCOM5_CLOCK            0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
190 #define BOARD_BOOTCLOCKPLL96M_FXCOM6_CLOCK            0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
191 #define BOARD_BOOTCLOCKPLL96M_FXCOM7_CLOCK            0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
192 #define BOARD_BOOTCLOCKPLL96M_HSLSPI_CLOCK            0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
193 #define BOARD_BOOTCLOCKPLL96M_MCLK_CLOCK              0UL            /* Clock consumers of MCLK_clock output : N/A */
194 #define BOARD_BOOTCLOCKPLL96M_OSC32KHZ_CLOCK          0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8 */
195 #define BOARD_BOOTCLOCKPLL96M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER */
196 #define BOARD_BOOTCLOCKPLL96M_PLUCLKIN_CLOCK          0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
197 #define BOARD_BOOTCLOCKPLL96M_PLU_GLITCH_12MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
198 #define BOARD_BOOTCLOCKPLL96M_PLU_GLITCH_1MHZ_CLOCK   0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
199 #define BOARD_BOOTCLOCKPLL96M_RTC1HZ_CLOCK            0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
200 #define BOARD_BOOTCLOCKPLL96M_RTC1KHZ_CLOCK           0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
201 #define BOARD_BOOTCLOCKPLL96M_SCT_CLOCK               0UL            /* Clock consumers of SCT_clock output : SCT0 */
202 #define BOARD_BOOTCLOCKPLL96M_SYSTICK0_CLOCK          0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
203 #define BOARD_BOOTCLOCKPLL96M_SYSTEM_CLOCK            96000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CAN0, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLASH, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SECGPIO, SECPINT, SWD, SYSCTL, UTICK0, WWDT */
204 #define BOARD_BOOTCLOCKPLL96M_TRACE_CLOCK             0UL            /* Clock consumers of TRACE_clock output : SWD */
205 #define BOARD_BOOTCLOCKPLL96M_UTICK_CLOCK             0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
206 #define BOARD_BOOTCLOCKPLL96M_WDT_CLOCK               0UL            /* Clock consumers of WDT_clock output : WWDT */
207 
208 /*******************************************************************************
209  * API for BOARD_BootClockPLL96M configuration
210  ******************************************************************************/
211 #if defined(__cplusplus)
212 extern "C" {
213 #endif /* __cplusplus*/
214 
215 /*!
216  * @brief This function executes configuration of clocks.
217  *
218  */
219 void BOARD_BootClockPLL96M(void);
220 
221 #if defined(__cplusplus)
222 }
223 #endif /* __cplusplus*/
224 
225 #endif /* _CLOCK_CONFIG_H_ */
226 
227