1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017,2019 ,2021 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 /*
10 * How to set up clock using clock driver functions:
11 *
12 * 1. Setup clock sources.
13 *
14 * 2. Setup voltage for the fastest of the clock outputs
15 *
16 * 3. Set up wait states of the flash.
17 *
18 * 4. Set up all dividers.
19 *
20 * 5. Set up all selectors to provide selected clocks.
21 */
22
23 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
24 !!GlobalInfo
25 product: Clocks v7.0
26 processor: LPC51U68
27 package_id: LPC51U68JBD64
28 mcu_data: ksdk2_0
29 processor_version: 9.0.0
30 board: LPCXpresso51U68
31 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
32
33 #include "fsl_power.h"
34 #include "fsl_clock.h"
35 #include "clock_config.h"
36
37 /*******************************************************************************
38 * Definitions
39 ******************************************************************************/
40
41 /*******************************************************************************
42 * Variables
43 ******************************************************************************/
44 /* System clock frequency. */
45 extern uint32_t SystemCoreClock;
46
47 /*******************************************************************************
48 ************************ BOARD_InitBootClocks function ************************
49 ******************************************************************************/
BOARD_InitBootClocks(void)50 void BOARD_InitBootClocks(void)
51 {
52 BOARD_BootClockPLL150M();
53 }
54
55 /*******************************************************************************
56 ******************** Configuration BOARD_BootClockFRO12M **********************
57 ******************************************************************************/
58 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
59 !!Configuration
60 name: BOARD_BootClockFRO12M
61 outputs:
62 - {id: System_clock.outFreq, value: 12 MHz}
63 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
64
65 /*******************************************************************************
66 * Variables for BOARD_BootClockFRO12M configuration
67 ******************************************************************************/
68 /*******************************************************************************
69 * Code for BOARD_BootClockFRO12M configuration
70 ******************************************************************************/
BOARD_BootClockFRO12M(void)71 void BOARD_BootClockFRO12M(void)
72 {
73 /*!< Set up the clock sources */
74 /*!< Set up FRO */
75 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
76 CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
77 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
78 being below the voltage for current speed */
79 POWER_SetVoltageForFreq(12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
80 CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */
81
82 /*!< Set up dividers */
83 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
84
85 /*!< Set up clock selectors - Attach clocks to the peripheries */
86 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
87 /*!< Set SystemCoreClock variable. */
88 SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
89 }
90
91 /*******************************************************************************
92 ******************* Configuration BOARD_BootClockFROHF48M *********************
93 ******************************************************************************/
94 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
95 !!Configuration
96 name: BOARD_BootClockFROHF48M
97 outputs:
98 - {id: System_clock.outFreq, value: 48 MHz}
99 settings:
100 - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
101 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
102
103 /*******************************************************************************
104 * Variables for BOARD_BootClockFROHF48M configuration
105 ******************************************************************************/
106 /*******************************************************************************
107 * Code for BOARD_BootClockFROHF48M configuration
108 ******************************************************************************/
BOARD_BootClockFROHF48M(void)109 void BOARD_BootClockFROHF48M(void)
110 {
111 /*!< Set up the clock sources */
112 /*!< Set up FRO */
113 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
114 CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
115 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
116 being below the voltage for current speed */
117 POWER_SetVoltageForFreq(48000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
118 CLOCK_SetFLASHAccessCyclesForFreq(48000000U); /*!< Set FLASH wait states for core */
119
120 CLOCK_SetupFROClocking(48000000U); /*!< Set up high frequency FRO output to selected frequency */
121
122 /*!< Set up dividers */
123 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
124
125 /*!< Set up clock selectors - Attach clocks to the peripheries */
126 CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
127 /*!< Set SystemCoreClock variable. */
128 SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
129 }
130
131 /*******************************************************************************
132 ******************* Configuration BOARD_BootClockFROHF96M *********************
133 ******************************************************************************/
134 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
135 !!Configuration
136 name: BOARD_BootClockFROHF96M
137 outputs:
138 - {id: System_clock.outFreq, value: 96 MHz}
139 settings:
140 - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
141 sources:
142 - {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
143 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
144
145 /*******************************************************************************
146 * Variables for BOARD_BootClockFROHF96M configuration
147 ******************************************************************************/
148 /*******************************************************************************
149 * Code for BOARD_BootClockFROHF96M configuration
150 ******************************************************************************/
BOARD_BootClockFROHF96M(void)151 void BOARD_BootClockFROHF96M(void)
152 {
153 /*!< Set up the clock sources */
154 /*!< Set up FRO */
155 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
156 CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
157 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
158 being below the voltage for current speed */
159 POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
160 CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
161
162 CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
163
164 /*!< Set up dividers */
165 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
166
167 /*!< Set up clock selectors - Attach clocks to the peripheries */
168 CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
169 /*!< Set SystemCoreClock variable. */
170 SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
171 }
172
173 /*******************************************************************************
174 ******************** Configuration BOARD_BootClockPLL150M *********************
175 ******************************************************************************/
176 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
177 !!Configuration
178 name: BOARD_BootClockPLL150M
179 called_from_default_init: true
180 outputs:
181 - {id: PLL_clock.outFreq, value: 150 MHz}
182 - {id: System_clock.outFreq, value: 150 MHz}
183 settings:
184 - {id: SYSCON.DIRECTO.sel, value: SYSCON.PLL}
185 - {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL_BYPASS}
186 - {id: SYSCON.M_MULT.scale, value: '153600', locked: true}
187 - {id: SYSCON.N_DIV.scale, value: '6', locked: true}
188 - {id: SYSCON.SYSPLLCLKSEL.sel, value: SYSCON.fro_12m}
189 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
190
191 /*******************************************************************************
192 * Variables for BOARD_BootClockPLL150M configuration
193 ******************************************************************************/
194 /*******************************************************************************
195 * Code for BOARD_BootClockPLL150M configuration
196 ******************************************************************************/
BOARD_BootClockPLL150M(void)197 void BOARD_BootClockPLL150M(void)
198 {
199 /*!< Set up the clock sources */
200 /*!< Set up FRO */
201 POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
202 CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
203 CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
204 being below the voltage for current speed */
205 POWER_SetVoltageForFreq(150000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
206 CLOCK_SetFLASHAccessCyclesForFreq(150000000U); /*!< Set FLASH wait states for core */
207
208 /*!< Set up PLL */
209 CLOCK_AttachClk(kFRO12M_to_SYS_PLL); /*!< Switch PLL clock source selector to FRO12M */
210 const pll_setup_t pllSetup = {
211 .syspllctrl = SYSCON_SYSPLLCTRL_UPLIMOFF_MASK | SYSCON_SYSPLLCTRL_DIRECTO_MASK,
212 .syspllndec = SYSCON_SYSPLLNDEC_NDEC(11U),
213 .syspllpdec = SYSCON_SYSPLLPDEC_PDEC(2U),
214 .syspllssctrl = {0x0U,(SYSCON_SYSPLLSSCTRL1_MD(76800U) | (uint32_t)(kSS_MF_512) | (uint32_t)(kSS_MR_K0) | (uint32_t)(kSS_MC_NOC))},
215 .pllRate = 150000000U,
216 .flags = PLL_SETUPFLAG_POWERUP
217 };
218 CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired values */
219
220 /* PLL in Fractional/Spread spectrum mode */
221 /* SYSTICK is used for waiting for PLL stabilization */
222
223 SysTick->LOAD = 111999UL; /*!< Set SysTick count value */
224 SysTick->VAL = 0UL; /*!< Reset current count value */
225 SysTick->CTRL = SysTick_CTRL_ENABLE_Msk; /*!< Enable SYSTICK */
226 while((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != SysTick_CTRL_COUNTFLAG_Msk){} /*!< Waiting for PLL stabilization */
227 SysTick->CTRL = 0UL; /*!< Stop SYSTICK */
228
229 /*!< Set up dividers */
230 CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
231
232 /*!< Set up clock selectors - Attach clocks to the peripheries */
233 CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL */
234 SYSCON->MAINCLKSELA = ((SYSCON->MAINCLKSELA & ~SYSCON_MAINCLKSELA_SEL_MASK) | SYSCON_MAINCLKSELA_SEL(0U)); /*!< Switch MAINCLKSELA to FRO12M even it is not used for MAINCLKSELB */
235 /*!< Set SystemCoreClock variable. */
236 SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
237 }
238
239
