1 /*
2  * Copyright 2021-2024 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 #include "flash_config.h"
8 
9 /* Component ID definition, used by tools. */
10 #ifndef FSL_COMPONENT_ID
11 #define FSL_COMPONENT_ID "platform.drivers.flash_config"
12 #endif
13 
14 /*******************************************************************************
15  * Code
16  ******************************************************************************/
17 #if defined(BOOT_HEADER_ENABLE) && (BOOT_HEADER_ENABLE == 1)
18 #if defined(__ARMCC_VERSION) || defined(__GNUC__)
19 __attribute__((section(".flash_conf"), used))
20 #elif defined(__ICCARM__)
21 #pragma location = ".flash_conf"
22 #endif
23 const fc_flexspi_nor_config_t flexspi_config = {
24     .memConfig =
25         {
26             .tag                 = FC_BLOCK_TAG,
27             .version             = FC_BLOCK_VERSION,
28             .readSampleClkSrc    = 1,
29             .csHoldTime          = 3,
30             .csSetupTime         = 3,
31             .deviceModeCfgEnable = 1,
32             .deviceModeSeq       = {.seqNum = 1, .seqId = 2},
33             .deviceModeArg       = 0x02,
34             .configCmdEnable     = 0,
35             .deviceType          = 0x1,
36             .sflashPadType       = kSerialFlash_4Pads,
37             .serialClkFreq       = 5,
38             .sflashA1Size        = 0x4000000U,
39             .sflashA2Size        = 0,
40             .sflashB1Size        = 0,
41             .sflashB2Size        = 0,
42             .lookupTable =
43                 {
44                     /* Read */
45                     [0] = FC_FLEXSPI_LUT_SEQ(FC_CMD_SDR, FC_FLEXSPI_1PAD, 0xEC, FC_RADDR_SDR, FC_FLEXSPI_4PAD, 0x20),
46                     [1] = FC_FLEXSPI_LUT_SEQ(FC_MODE8_SDR, FC_FLEXSPI_4PAD, 0xF0, FC_DUMMY_SDR, FC_FLEXSPI_4PAD, 0x04),
47                     [2] = FC_FLEXSPI_LUT_SEQ(FC_READ_SDR, FC_FLEXSPI_4PAD, 0x04, FC_STOP_EXE, FC_FLEXSPI_1PAD, 0x00),
48 
49                     /* Read Status */
50                     [4 * 1 + 0] =
51                         FC_FLEXSPI_LUT_SEQ(FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x05, FC_READ_SDR, FC_FLEXSPI_1PAD, 0x04),
52 
53                     /* Write Status */
54                     [4 * 2 + 0] =
55                         FC_FLEXSPI_LUT_SEQ(FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x31, FC_WRITE_SDR, FC_FLEXSPI_1PAD, 0x01),
56 
57                     /* Write Enable */
58                     [4 * 3 + 0] =
59                         FC_FLEXSPI_LUT_SEQ(FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x06, FC_STOP_EXE, FC_FLEXSPI_1PAD, 0x00),
60 
61                     /* Sector erase */
62                     [4 * 5 + 0] =
63                         FC_FLEXSPI_LUT_SEQ(FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x21, FC_RADDR_SDR, FC_FLEXSPI_1PAD, 0x20),
64 
65                     /* Block erase */
66                     [4 * 8 + 0] =
67                         FC_FLEXSPI_LUT_SEQ(FC_CMD_SDR, FC_FLEXSPI_1PAD, 0xDC, FC_RADDR_SDR, FC_FLEXSPI_1PAD, 0x20),
68 
69                     /* Page program */
70                     [4 * 9 + 0] =
71                         FC_FLEXSPI_LUT_SEQ(FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x34, FC_RADDR_SDR, FC_FLEXSPI_1PAD, 0x20),
72                     [4 * 9 + 1] =
73                         FC_FLEXSPI_LUT_SEQ(FC_WRITE_SDR, FC_FLEXSPI_4PAD, 0x00, FC_STOP_EXE, FC_FLEXSPI_1PAD, 0x00),
74 
75                     /* chip erase */
76                     [4 * 11 + 0] =
77                         FC_FLEXSPI_LUT_SEQ(FC_CMD_SDR, FC_FLEXSPI_1PAD, 0xC7, FC_STOP_EXE, FC_FLEXSPI_1PAD, 0x00),
78                 },
79         },
80     .pageSize           = 0x100,
81     .sectorSize         = 0x1000,
82     .ipcmdSerialClkFreq = 0,
83     .blockSize          = 0x10000,
84     .fcb_fill[0]        = 0xFFFFFFFF,
85 };
86 #endif /* BOOT_HEADER_ENABLE */
87