1 /*
2 * Copyright 2017,2019 ,2021 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 /***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12 /*
13 * How to setup clock using clock driver functions:
14 *
15 * 1. call CLOCK_SetSimSafeDivs() to set the system clock dividers in SIM to safe value.
16 *
17 * 2. If external oscillator is used Call CLOCK_SetXtal0Freq() to set XTAL0 frequency based on board settings and
18 * call CLOCK_InitOsc0() to init the OSC.
19 *
20 * 3. Call CLOCK_BootToXxxMode()/CLOCK_SetXxxMode() to set ICS run at the target mode.
21 *
22 * 4. If ICSIRCLK is needed, call CLOCK_SetInternalRefClkConfig() to enable the clock.
23 *
24 * 5. call CLOCK_SetSimConfig() to configure the divider in sim.
25 */
26
27 /* clang-format off */
28 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
29 !!GlobalInfo
30 product: Clocks v7.0
31 processor: MKE02Z64xxx4
32 package_id: MKE02Z64VQH4
33 mcu_data: ksdk2_0
34 processor_version: 9.0.0
35 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
36 /* clang-format on */
37
38 #include "clock_config.h"
39
40 /*******************************************************************************
41 * Definitions
42 ******************************************************************************/
43
44 /*******************************************************************************
45 * Variables
46 ******************************************************************************/
47 /* System clock frequency. */
48 extern uint32_t SystemCoreClock;
49
50 /*******************************************************************************
51 ************************ BOARD_InitBootClocks function ************************
52 ******************************************************************************/
BOARD_InitBootClocks(void)53 void BOARD_InitBootClocks(void)
54 {
55 BOARD_BootClockRUN();
56 }
57
58 /*******************************************************************************
59 ********************** Configuration BOARD_BootClockRUN ***********************
60 ******************************************************************************/
61 /* clang-format off */
62 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
63 !!Configuration
64 name: BOARD_BootClockRUN
65 called_from_default_init: true
66 outputs:
67 - {id: Bus_clock.outFreq, value: 20 MHz}
68 - {id: Core_clock.outFreq, value: 40 MHz}
69 - {id: Flash_clock.outFreq, value: 20 MHz}
70 - {id: ICSFF_clock.outFreq, value: 39.0625/2 kHz}
71 - {id: ICSIR_clock.outFreq, value: 31.25 kHz}
72 - {id: LPO_clock.outFreq, value: 1 kHz}
73 - {id: OSCER_clock.outFreq, value: 10 MHz}
74 - {id: Plat_clock.outFreq, value: 40 MHz}
75 - {id: System_clock.outFreq, value: 40 MHz}
76 settings:
77 - {id: ICSMode, value: FEE}
78 - {id: ICS.BDIV.scale, value: '1', locked: true}
79 - {id: ICS.IREFS.sel, value: ICS.RDIV}
80 - {id: ICS.RDIV.scale, value: '256', locked: true}
81 - {id: ICS_C1_IRCLKEN_CFG, value: Enabled}
82 - {id: OSC_CR_OSCEN_CFG, value: Enabled}
83 - {id: OSC_CR_OSC_MODE_CFG, value: ModeOscLowPower}
84 - {id: OSC_CR_RANGE_CFG, value: High}
85 - {id: OSC_CR_RANGE_RDIV_CFG, value: High}
86 - {id: SIM.BUSDIV.scale, value: '2'}
87 sources:
88 - {id: OSC.OSC.outFreq, value: 10 MHz, enabled: true}
89 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
90 /* clang-format on */
91
92 /*******************************************************************************
93 * Variables for BOARD_BootClockRUN configuration
94 ******************************************************************************/
95 const ics_config_t icsConfig_BOARD_BootClockRUN =
96 {
97 .icsMode = kICS_ModeFEE, /* FEE - FLL Engaged External */
98 .irClkEnableMode = kICS_IrclkEnable, /* ICSIRCLK enabled, ICSIRCLK disabled in STOP mode */
99 .bDiv = 0x0U, /* Bus clock divider: divided by 1 */
100 .rDiv = 0x3U, /* FLL external reference clock divider: divided by 256 */
101 };
102 const sim_clock_config_t simConfig_BOARD_BootClockRUN =
103 {
104 .busDiv = 0x1U, /* BUSDIV clock divider: divided by 2 */
105 .busClkPrescaler = 0x0U, /* bus clock optional prescaler */
106 };
107 const osc_config_t oscConfig_BOARD_BootClockRUN =
108 {
109 .freq = 10000000U, /* Oscillator frequency: 10000000Hz */
110 .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */
111 .enableMode = kOSC_Enable, /* Enable external reference clock, disable external reference clock in STOP mode */
112 };
113
114 /*******************************************************************************
115 * Code for BOARD_BootClockRUN configuration
116 ******************************************************************************/
BOARD_BootClockRUN(void)117 void BOARD_BootClockRUN(void)
118 {
119 /* Set the system clock dividers in SIM to safe value. */
120 CLOCK_SetSimSafeDivs();
121 /* Initializes OSC0 according to board configuration. */
122 CLOCK_InitOsc0(&oscConfig_BOARD_BootClockRUN);
123 CLOCK_SetXtal0Freq(oscConfig_BOARD_BootClockRUN.freq);
124 /* Set ICS to FEE mode. */
125 CLOCK_BootToFeeMode(icsConfig_BOARD_BootClockRUN.bDiv,
126 icsConfig_BOARD_BootClockRUN.rDiv);
127 /* Configure the Internal Reference clock (ICSIRCLK). */
128 CLOCK_SetInternalRefClkConfig(icsConfig_BOARD_BootClockRUN.irClkEnableMode);
129 /* Set the clock configuration in SIM module. */
130 CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
131 /* Set SystemCoreClock variable. */
132 SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
133 }
134
135
