1 /*
2  * Copyright 2022 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "xmcd.h"
9 
10 /* Component ID definition, used by tools. */
11 #ifndef FSL_COMPONENT_ID
12 #define FSL_COMPONENT_ID "platform.xmcd"
13 #endif
14 
15 #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
16 
17 #if defined(XIP_BOOT_HEADER_XMCD_ENABLE) && (XIP_BOOT_HEADER_XMCD_ENABLE == 1)
18 
19 #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
20 __attribute__((section(".boot_hdr.xmcd_data"), used))
21 #elif defined(__ICCARM__)
22 #pragma location = ".boot_hdr.xmcd_data"
23 #endif
24 
25 const uint32_t xmcd_data[] = {
26     /* Tag = 0xC, Version = 0, Memory Interface: SEMC, Instance: 0 - ignored,
27     Configuration block type: 0 - Ignored(Handled inside the SDRAM configuration structure)
28     Configuration block size: 13 (4-byte header + 9-byte option block) */
29     0xC010000D,
30     /* Magic_number = 0xA1, Version = 1, Config_option: Simplified, SDRAM clock: 198MHz */
31     0xC60001A1,
32     /* SDRAM CS0 size: 64MBytes */
33     0x00010000,
34     /* Port_size: 32-bit */
35     0x02};
36 
37 #endif /* XIP_BOOT_HEADER_XMCD_ENABLE */
38 #endif /* XIP_BOOT_HEADER_ENABLE */
39