1 /*
2  * Copyright 2023 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include "xmcd.h"
8 
9 /* Component ID definition, used by tools. */
10 #ifndef FSL_COMPONENT_ID
11 #define FSL_COMPONENT_ID "platform.xmcd"
12 #endif
13 
14 #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
15 
16 #if defined(XIP_BOOT_HEADER_XMCD_ENABLE) && (XIP_BOOT_HEADER_XMCD_ENABLE == 1)
17 
18 #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
19 __attribute__((section(".boot_hdr.xmcd_data"), used))
20 #elif defined(__ICCARM__)
21 #pragma location = ".boot_hdr.xmcd_data"
22 #endif
23 
24 const uint32_t xmcd_data[] = {
25     /* Tag = 0xC, Version = 0, Memory Interface: SEMC, Instance: 0 - ignored,
26     Configuration block type: 0 - Ignored(Handled inside the SDRAM configuration structure)
27     Configuration block size: 13 (4-byte header + 9-byte option block) */
28     0xC010000D,
29     /* Magic_number = 0xA1, Version = 1, Config_option: Simplified, SDRAM clock: 198MHz */
30     0xC60001A1,
31     /* SDRAM CS0 size: 64MBytes */
32     0x00010000,
33     /* Port_size: 32-bit */
34     0x02};
35 
36 #endif /* XIP_BOOT_HEADER_XMCD_ENABLE */
37 #endif /* XIP_BOOT_HEADER_ENABLE */
38