1 /*!
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * All rights reserved.
4 *
5 * \file MCR20Overwrites.h
6 * Description: Overwrites header file for MCR20 Register values
7 *
8 * Redistribution and use in source and binary forms, with or without modification,
9 * are permitted provided that the following conditions are met:
10 *
11 * o Redistributions of source code must retain the above copyright notice, this list
12 *   of conditions and the following disclaimer.
13 *
14 * o Redistributions in binary form must reproduce the above copyright notice, this
15 *   list of conditions and the following disclaimer in the documentation and/or
16 *   other materials provided with the distribution.
17 *
18 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
19 *   contributors may be used to endorse or promote products derived from this
20 *   software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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31 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33 
34 #ifndef OVERWRITES_H_
35 #define OVERWRITES_H_
36 
37 typedef struct overwrites_tag {
38  char address;
39  char data;
40 }overwrites_t;
41 
42 
43 /*****************************************************************************************************************/
44 //         This file is created exclusively for use with the transceiver 2.0 silicon
45 //         and is provided for the world to use. It contains a list of all
46 //         known overwrite values. Overwrite values are non-default register
47 //         values that configure the transceiver device to a more optimally performing
48 //         posture. It is expected that low level software (i.e. PHY) will
49 //         consume this file as a #include, and transfer the contents to the
50 //         the indicated addresses in the transceiver's memory space. This file has
51 //         at least one required entry, that being its own version current version
52 //         number, to be stored at transceiver's location 0x3B the
53 //         OVERWRITES_VERSION_NUMBER register. The RAM register is provided in
54 //         the transceiver address space to assist in future debug efforts. The
55 //         analyst may read this location (once device has been booted with
56 //         mysterious software) and have a good indication of what register
57 //         overwrites were performed (with all versions of the overwrites.h file
58 //         being archived forever at the Compass location shown above.
59 //
60 //     The transceiver has an indirect register (IAR) space. Write access to this space
61 //         requires 3 or more writes:
62 //         1st) the first write is an index value to the indirect (write Bit7=0, register access Bit 6=0) + 0x3E
63 //         2nd) IAR Register #0x00 - 0xFF.
64 //     3rd) The data to write
65 //         nth) Burst mode additional data if required.
66 //
67 //     Write access to direct space requires only a single address, data pair.
68 
69 overwrites_t const overwrites_direct[] ={
70 {0x3B, 0x0C}, //version 0C: new value for ACKDELAY targeting 198us (23 May, 2013, Larry Roshak)
71 {0x23, 0x17}  //PA_PWR new default Power Step is "23"
72 };
73 
74 overwrites_t const overwrites_indirect[] ={
75 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
76 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
77 {0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
78 {0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
79 {0x79, 0x2F}, //CHF_IBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
80 {0x7A, 0x2F}, //CHF_QBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
81 {0x7B, 0x24}, //CHF_IRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
82 {0x7C, 0x24}, //CHF_QRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
83 {0x7D, 0x24}, //CHF_IL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
84 {0x7E, 0x24}, //CHF_QL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
85 {0x7F, 0x32}, //CHF_CC1   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
86 {0x80, 0x1D}, //CHF_CCL   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
87 {0x81, 0x2D}, //CHF_CC2   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
88 {0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
89 {0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
90 {0x64, 0x28}, //PA_CAL_DIS=1  Disabled PA calibration
91 {0x52, 0x55}, //AGC_THR1 RSSI tune up
92 {0x53, 0x2D}, //AGC_THR2 RSSI tune up
93 {0x66, 0x5F}, //ATT_RSSI1 tune up
94 {0x67, 0x8F}, //ATT_RSSI2 tune up
95 {0x68, 0x61}, //RSSI_OFFSET
96 {0x78, 0x03}, //CHF_PMAGAIN
97 {0x22, 0x50}, //CCA1_THRESH
98 {0x4D, 0x13}, //CORR_NVAL moved from 0x14 to 0x13 for 0.5 dB improved Rx Sensitivity
99 {0x39, 0x3D}  //ACKDELAY new value targeting a delay of 198us (23 May, 2013, Larry Roshak)
100 };
101 
102 
103 /* begin of deprecated versions
104 
105 ==VERSION 1==
106 (version 1 is empty)
107 
108 ==VERSION 2==
109 overwrites_t const overwrites_indirect[] ={
110 {0x31, 0x02}  //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
111 };
112 
113 ==VERSION 3==
114 overwrites_t const overwrites_indirect[] ={
115 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
116 {0x91, 0xB3}, //VCO_CTRL1: override VCOALC_REF_TX to 3
117 {0x92, 0x07}  //VCO_CTRL2: override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
118 };
119 
120 ==VERSION 4==
121 overwrites_t const overwrites_direct[] ={
122 {0x3B, 0x04}  //version 04 is the current version: update PA_COILTUNING default
123 };
124 
125 overwrites_t const overwrites_indirect[] ={
126 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
127 {0x91, 0xB3}, //VCO_CTRL1: override VCOALC_REF_TX to 3
128 {0x92, 0x07}  //VCO_CTRL2: override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
129 {0x8A, 0x71}  //PA_TUNING: override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
130 };
131 
132 ==VERSION 5==
133 overwrites_t const overwrites_direct[] ={
134 {0x3B, 0x05}  //version 05: updates Channel Filter Register set (21 Dec 2012, on behalf of S. Soca)
135 };
136 
137 overwrites_t const overwrites_indirect[] ={
138 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
139 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
140 {0x92, 0x07}  //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
141 {0x8A, 0x71}  //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
142 {0x79, 0x2F}  //CHF_IBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
143 {0x7A, 0x2F}  //CHF_QBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
144 {0x7B, 0x24}  //CHF_IRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
145 {0x7C, 0x24}  //CHF_QRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
146 {0x7D, 0x24}  //CHF_IL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
147 {0x7E, 0x24}  //CHF_QL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
148 {0x82, 0x24}  //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
149 {0x83, 0x24}  //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
150 {0x7F, 0x32}  //CHF_CC1   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
151 {0x80, 0x1D}  //CHF_CCL   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
152 {0x81, 0x2D}  //CHF_CC2   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
153 };
154 
155 ==VERSION 6==
156 overwrites_t const overwrites_direct[] ={
157 {0x3B, 0x06}  //version 06: disable PA calibration
158 };
159 
160 overwrites_t const overwrites_indirect[] ={
161 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
162 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
163 {0x92, 0x07}  //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
164 {0x8A, 0x71}  //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
165 {0x79, 0x2F}  //CHF_IBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
166 {0x7A, 0x2F}  //CHF_QBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
167 {0x7B, 0x24}  //CHF_IRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
168 {0x7C, 0x24}  //CHF_QRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
169 {0x7D, 0x24}  //CHF_IL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
170 {0x7E, 0x24}  //CHF_QL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
171 {0x82, 0x24}  //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
172 {0x83, 0x24}  //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
173 {0x7F, 0x32}  //CHF_CC1   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
174 {0x80, 0x1D}  //CHF_CCL   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
175 {0x81, 0x2D}  //CHF_CC2   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
176 {0x64, 0x28}  //PA_CAL_DIS=1  Disabled PA calibration
177 };
178 
179 ==VERSION 7==
180 overwrites_t const overwrites_direct[] ={
181 {0x3B, 0x07}  //version 07: updated registers for ED/RSSI
182 };
183 
184 overwrites_t const overwrites_indirect[] ={
185 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
186 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
187 {0x92, 0x07},  //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
188 {0x8A, 0x71},  //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
189 {0x79, 0x2F},  //CHF_IBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
190 {0x7A, 0x2F},  //CHF_QBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
191 {0x7B, 0x24},  //CHF_IRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
192 {0x7C, 0x24},  //CHF_QRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
193 {0x7D, 0x24},  //CHF_IL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
194 {0x7E, 0x24},  //CHF_QL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
195 {0x82, 0x24},  //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
196 {0x83, 0x24},  //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
197 {0x7F, 0x32}, //CHF_CC1   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
198 {0x80, 0x1D},  //CHF_CCL   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
199 {0x81, 0x2D},  //CHF_CC2   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
200 {0x64, 0x28},  //PA_CAL_DIS=1  Disabled PA calibration
201 {0x52, 0x73},  //AGC_THR1 RSSI tune up
202 {0x53, 0x2D}, //AGC_THR2 RSSI tune up
203 {0x66, 0x5F}, //ATT_RSSI1 tune up
204 {0x67, 0x8F}, //ATT_RSSI2 tune up
205 {0x68, 0x60}, //RSSI_OFFSET
206 {0x69, 0x65}  //RSSI_SLOPE
207 };
208 
209 
210 ==VERSION 8==
211 overwrites_t const overwrites_direct[] ={
212 {0x3B, 0x08}  //version 08: updated registers for ED/RSSI
213 };
214 
215 overwrites_t const overwrites_indirect[] ={
216 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
217 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
218 {0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
219 {0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
220 {0x79, 0x2F}, //CHF_IBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
221 {0x7A, 0x2F}, //CHF_QBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
222 {0x7B, 0x24}, //CHF_IRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
223 {0x7C, 0x24}, //CHF_QRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
224 {0x7D, 0x24}, //CHF_IL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
225 {0x7E, 0x24}, //CHF_QL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
226 {0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
227 {0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
228 {0x7F, 0x32}, //CHF_CC1   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
229 {0x80, 0x1D}, //CHF_CCL   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
230 {0x81, 0x2D}, //CHF_CC2   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
231 {0x64, 0x28}, //PA_CAL_DIS=1  Disabled PA calibration
232 {0x52, 0x73}, //AGC_THR1 RSSI tune up
233 {0x53, 0x2D}, //AGC_THR2 RSSI tune up
234 {0x66, 0x5F}, //ATT_RSSI1 tune up
235 {0x67, 0x8F}, //ATT_RSSI2 tune up
236 {0x69, 0x65}  //RSSI_SLOPE
237 {0x68, 0x61}, //RSSI_OFFSET
238 {0x78, 0x03}  //CHF_PMAGAIN
239 };
240 
241 
242 ==VERSION 9==
243 overwrites_t const overwrites_direct[] ={
244 {0x3B, 0x09}  //version 09: updated registers for ED/RSSI and PowerStep
245 {0x23, 0x17}  //PA_PWR new default value
246 };
247 
248 overwrites_t const overwrites_indirect[] ={
249 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
250 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
251 {0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
252 {0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
253 {0x79, 0x2F}, //CHF_IBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
254 {0x7A, 0x2F}, //CHF_QBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
255 {0x7B, 0x24}, //CHF_IRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
256 {0x7C, 0x24}, //CHF_QRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
257 {0x7D, 0x24}, //CHF_IL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
258 {0x7E, 0x24}, //CHF_QL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
259 {0x7F, 0x32}, //CHF_CC1   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
260 {0x80, 0x1D}, //CHF_CCL   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
261 {0x81, 0x2D}, //CHF_CC2   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
262 {0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
263 {0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
264 {0x64, 0x28}, //PA_CAL_DIS=1  Disabled PA calibration
265 {0x52, 0x55}, //AGC_THR1 RSSI tune up
266 {0x53, 0x2D}, //AGC_THR2 RSSI tune up
267 {0x66, 0x5F}, //ATT_RSSI1 tune up
268 {0x67, 0x8F}, //ATT_RSSI2 tune up
269 {0x68, 0x61}, //RSSI_OFFSET
270 {0x78, 0x03}  //CHF_PMAGAIN
271 };
272 
273 ==VERSION A==
274 overwrites_t const overwrites_direct[] ={
275 {0x3B, 0x0A}  //version 0A: updated registers for CCA
276 {0x23, 0x17}  //PA_PWR new default Power Step is "23"
277 };
278 
279 overwrites_t const overwrites_indirect[] ={
280 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
281 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
282 {0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
283 {0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
284 {0x79, 0x2F}, //CHF_IBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
285 {0x7A, 0x2F}, //CHF_QBUF  Adjust the gm-C filter gain (+/- 6dB)         (21 Dec, 2012, on behalf of S. Soca)
286 {0x7B, 0x24}, //CHF_IRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
287 {0x7C, 0x24}, //CHF_QRIN  Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
288 {0x7D, 0x24}, //CHF_IL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
289 {0x7E, 0x24}, //CHF_QL    Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
290 {0x7F, 0x32}, //CHF_CC1   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
291 {0x80, 0x1D}, //CHF_CCL   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
292 {0x81, 0x2D}, //CHF_CC2   Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
293 {0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
294 {0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz)      (21 Dec, 2012, on behalf of S. Soca)
295 {0x64, 0x28}, //PA_CAL_DIS=1  Disabled PA calibration
296 {0x52, 0x55}, //AGC_THR1 RSSI tune up
297 {0x53, 0x2D}, //AGC_THR2 RSSI tune up
298 {0x66, 0x5F}, //ATT_RSSI1 tune up
299 {0x67, 0x8F}, //ATT_RSSI2 tune up
300 {0x68, 0x61}, //RSSI_OFFSET
301 {0x78, 0x03}  //CHF_PMAGAIN
302 {0x22, 0x50}  //CCA1_THRESH
303 };
304 
305 end of deprecated versions */
306 
307 
308 #endif  //OVERWRITES_H_
309 
310