1 /*
2 * Copyright 2021-2023 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 /**
7 * @file Clock_Ip_Selector.c
8 * @version 1.0.0
9 *
10 * @brief CLOCK driver implementations.
11 * @details CLOCK driver implementations.
12 *
13 * @addtogroup CLOCK_DRIVER Clock Ip Driver
14 * @{
15 */
16
17
18 #ifdef __cplusplus
19 extern "C"{
20 #endif
21
22
23 /*==================================================================================================
24 * INCLUDE FILES
25 * 1) system and project includes
26 * 2) needed interfaces from external units
27 * 3) internal and external interfaces from this unit
28 ==================================================================================================*/
29
30 #include "Clock_Ip_Private.h"
31
32 /*==================================================================================================
33 SOURCE FILE VERSION INFORMATION
34 ==================================================================================================*/
35 #define CLOCK_IP_SELECTOR_VENDOR_ID_C 43
36 #define CLOCK_IP_SELECTOR_AR_RELEASE_MAJOR_VERSION_C 4
37 #define CLOCK_IP_SELECTOR_AR_RELEASE_MINOR_VERSION_C 7
38 #define CLOCK_IP_SELECTOR_AR_RELEASE_REVISION_VERSION_C 0
39 #define CLOCK_IP_SELECTOR_SW_MAJOR_VERSION_C 1
40 #define CLOCK_IP_SELECTOR_SW_MINOR_VERSION_C 0
41 #define CLOCK_IP_SELECTOR_SW_PATCH_VERSION_C 0
42
43 /*==================================================================================================
44 * FILE VERSION CHECKS
45 ==================================================================================================*/
46 /* Check if Clock_Ip_Selector.c file and Clock_Ip_Private.h file are of the same vendor */
47 #if (CLOCK_IP_SELECTOR_VENDOR_ID_C != CLOCK_IP_PRIVATE_VENDOR_ID)
48 #error "Clock_Ip_Selector.c and Clock_Ip_Private.h have different vendor ids"
49 #endif
50
51 /* Check if Clock_Ip_Selector.c file and Clock_Ip_Private.h file are of the same Autosar version */
52 #if ((CLOCK_IP_SELECTOR_AR_RELEASE_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION) || \
53 (CLOCK_IP_SELECTOR_AR_RELEASE_MINOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION) || \
54 (CLOCK_IP_SELECTOR_AR_RELEASE_REVISION_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION) \
55 )
56 #error "AutoSar Version Numbers of Clock_Ip_Selector.c and Clock_Ip_Private.h are different"
57 #endif
58
59 /* Check if Clock_Ip_Selector.c file and Clock_Ip_Private.h file are of the same Software version */
60 #if ((CLOCK_IP_SELECTOR_SW_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MAJOR_VERSION) || \
61 (CLOCK_IP_SELECTOR_SW_MINOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MINOR_VERSION) || \
62 (CLOCK_IP_SELECTOR_SW_PATCH_VERSION_C != CLOCK_IP_PRIVATE_SW_PATCH_VERSION) \
63 )
64 #error "Software Version Numbers of Clock_Ip_Selector.c and Clock_Ip_Private.h are different"
65 #endif
66 /*==================================================================================================
67 * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
68 ==================================================================================================*/
69
70 /*==================================================================================================
71 * LOCAL MACROS
72 ==================================================================================================*/
73
74 /*==================================================================================================
75 * LOCAL CONSTANTS
76 ==================================================================================================*/
77
78 /*==================================================================================================
79 * LOCAL VARIABLES
80 ==================================================================================================*/
81
82 /*==================================================================================================
83 * GLOBAL CONSTANTS
84 ==================================================================================================*/
85
86 /*==================================================================================================
87 * GLOBAL VARIABLES
88 ==================================================================================================*/
89
90 /*==================================================================================================
91 * GLOBAL FUNCTION PROTOTYPES
92 ==================================================================================================*/
93 /* Clock start section code */
94 #define MCU_START_SEC_CODE
95
96 #include "Mcu_MemMap.h"
97
98 #ifdef CLOCK_IP_MC_ME_AE_GS_S_SYSCLK
99 void Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const *Config);
100 void Clock_Ip_SetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const *Config);
101 #endif
102
103 /*==================================================================================================
104 * LOCAL FUNCTION PROTOTYPES
105 ==================================================================================================*/
106
107 static void Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const* Config);
108
109 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_SWIP
110 static void Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config);
111 static void Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config);
112 #endif
113
114 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CS_GRIP
115 static void Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config);
116 static void Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config);
117 #endif
118
119 #ifdef CLOCK_IP_GPR_X_CLKOUT_SEL_MUXSEL
120 static void Clock_Ip_ResetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const *Config);
121 static void Clock_Ip_SetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const *Config);
122 #endif
123
124 #ifdef CLOCK_IP_MC_ME_AE_GS_S_SYSCLK
125 static void Clock_Ip_ResetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const *Config);
126 static void Clock_Ip_SetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const *Config);
127 #endif
128
129 /* Clock stop section code */
130 #define MCU_STOP_SEC_CODE
131
132 #include "Mcu_MemMap.h"
133 /*==================================================================================================
134 * LOCAL FUNCTIONS
135 ==================================================================================================*/
136 /* Clock start section code */
137 #define MCU_START_SEC_CODE
138
139 #include "Mcu_MemMap.h"
140
Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const * Config)141 static void Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const* Config)
142 {
143 (void)Config;
144 /* No implementation */
145 }
146
147 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_SWIP
148 /* Reset MC_CGM_m_MUX_n[CSC] register */
Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const * Config)149 static void Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config)
150 {
151
152 uint32 Instance;
153 uint32 SelectorIndex;
154 uint32 SelectorMask;
155
156 if (NULL_PTR != Config)
157 {
158 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
159 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
160 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
161
162 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC |= MC_CGM_MUX_CSC_SAFE_SW_MASK;
163 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC &= ~SelectorMask;
164 }
165 else
166 {
167 (void)Instance;
168 (void)SelectorIndex;
169 (void)SelectorMask;
170 }
171 }
172
173 /* Set MC_CGM_m_MUX_n[CSC] register */
Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const * Config)174 static void Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config)
175 {
176
177 uint32 Instance;
178 uint32 SelectorIndex;
179 uint32 SelectorValue; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
180
181 uint32 SelectorMask;
182 uint32 SelectorShift;
183
184 uint32 RegValue;
185 boolean TimeoutOccurred = FALSE;
186 uint32 StartTime;
187 uint32 ElapsedTime;
188 uint32 TimeoutTicks;
189
190 if (NULL_PTR != Config)
191 {
192 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
193 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
194 SelectorValue = Clock_Ip_au16SelectorEntryHardwareValue[Config->Value]; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
195
196 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
197 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
198
199 /* Do not configure mux if it is already set to the selector value from configuration.*/
200 if (SelectorValue != ((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & SelectorMask) >> SelectorShift))
201 {
202 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
203 do
204 {
205 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
206 }
207 while((MC_CGM_MUX_CSS_SWIP_IN_PROGRESS == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWIP_MASK)) && (FALSE == TimeoutOccurred));
208
209 if (FALSE == TimeoutOccurred)
210 {
211 RegValue = Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC;
212 RegValue &= ~SelectorMask;
213 RegValue |= (SelectorValue << SelectorShift) & SelectorMask;
214 RegValue |= (MC_CGM_MUX_CSC_CLK_SW_MASK); /* Clock switch operation is requested */
215 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC = RegValue;
216
217 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
218 /* Wait for CLK_SW to auto-clear */
219 do
220 {
221 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
222 } /* No safe clock switch operation was requested. */
223 while((CLOCK_IP_MC_CGM_MUX_CSS_CLK_SW_NOT_REQUESTED == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CLK_SW_MASK)) && (FALSE == TimeoutOccurred));
224
225 if (FALSE == TimeoutOccurred)
226 {
227 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
228 /* Wait for acknowledge to be cleared. */
229 do
230 {
231 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
232 }
233 while((MC_CGM_MUX_CSS_SWIP_IN_PROGRESS == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWIP_MASK)) && (FALSE == TimeoutOccurred) );
234
235 if (FALSE == TimeoutOccurred)
236 {
237 /* Check the switch status. */
238 if (CLOCK_IP_MC_CGM_MUX_CSS_SWTRG_SUCCEEDED != ((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWTRG_MASK) >> MC_CGM_MUX_0_CSS_SWTRG_SHIFT))
239 {
240 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_CLOCK_MUX_SWITCH_ERROR, Config->Name);
241 }
242 }
243 else
244 {
245 /* Report timeout error */
246 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
247 }
248 }
249 else
250 {
251 /* Report timeout error */
252 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
253 }
254 }
255 else {
256
257 /* Report timeout error */
258 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
259 }
260 }
261 }
262 else
263 {
264 (void)Instance;
265 (void)SelectorIndex;
266 (void)SelectorValue;
267 (void)SelectorMask;
268 (void)SelectorShift;
269 (void)RegValue;
270 (void)TimeoutOccurred;
271 (void)StartTime;
272 (void)ElapsedTime;
273 (void)TimeoutTicks;
274 }
275 }
276 #endif
277
278 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CS_GRIP
Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const * Config)279 static void Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config)
280 {
281 uint32 Instance;
282 uint32 SelectorIndex;
283 uint32 SelectorResetValue; /* Hw value corresponding to software mux reset. */
284
285 uint32 SelectorMask;
286 uint32 SelectorShift;
287
288 uint32 RegValue;
289 boolean TimeoutOccurred = FALSE;
290 uint32 StartTime;
291 uint32 ElapsedTime;
292 uint32 TimeoutTicks;
293
294 if (NULL_PTR != Config)
295 {
296 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
297 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
298 SelectorResetValue = Clock_Ip_au8SoftwareMuxResetValue[Config->Name]; /* Hw value corresponding to software mux reset. */
299
300 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
301 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
302
303 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC |= (MC_CGM_MUX_CSC_CG_MASK);
304
305 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
306 do
307 {
308 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
309 }
310 while ((MC_CGM_MUX_CSS_CS_TRANSPARENT == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CS_MASK)) && (FALSE == TimeoutOccurred));
311
312 if (FALSE == TimeoutOccurred)
313 {
314 /* Set the reset value for this mux. */
315 RegValue = Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC;
316 RegValue &= ~SelectorMask;
317 RegValue |= (SelectorResetValue << SelectorShift) & SelectorMask;
318 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC = RegValue;
319
320 /* Clear CG and FCG bit after set the SELCTL bit */
321 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC &= ~(MC_CGM_MUX_CSC_FCG_MASK | MC_CGM_MUX_CSC_CG_MASK);
322 }
323 else
324 {
325 /* Report timeout error */
326 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
327 }
328 }
329 else
330 {
331 (void)Instance;
332 (void)SelectorIndex;
333 (void)SelectorResetValue;
334 (void)SelectorMask;
335 (void)SelectorShift;
336 (void)RegValue;
337 (void)TimeoutOccurred;
338 (void)StartTime;
339 (void)ElapsedTime;
340 (void)TimeoutTicks;
341 }
342 }
Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const * Config)343 static void Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config)
344 {
345
346 uint32 Instance;
347 uint32 SelectorIndex;
348 uint32 SelectorValue; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
349
350 uint32 SelectorMask;
351 uint32 SelectorShift;
352
353 uint32 RegValue;
354 boolean TimeoutOccurred = FALSE;
355 uint32 StartTime;
356 uint32 ElapsedTime;
357 uint32 TimeoutTicks;
358
359 if (NULL_PTR != Config)
360 {
361 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
362 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
363 SelectorValue = Clock_Ip_au16SelectorEntryHardwareValue[Config->Value]; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
364
365 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
366 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
367
368 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC |= (MC_CGM_MUX_CSC_CG_MASK);
369
370 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
371 do
372 {
373 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
374 }
375 while ((MC_CGM_MUX_CSS_CS_TRANSPARENT == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CS_MASK)) && (FALSE == TimeoutOccurred));
376
377 if (FALSE == TimeoutOccurred)
378 {
379 /* Configure clock source. */
380 RegValue = Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC;
381 RegValue &= ~SelectorMask;
382 RegValue |= (SelectorValue << SelectorShift) & SelectorMask;
383 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC = RegValue;
384
385 /* Clear CG and FCG bit after set the SELCTL bit */
386 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC &= ~(MC_CGM_MUX_CSC_FCG_MASK | MC_CGM_MUX_CSC_CG_MASK);
387
388 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
389 /* Wait until the output clock is ungated. */
390 do
391 {
392 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
393 }
394 while (((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CS_MASK) != MC_CGM_MUX_CSS_CS_TRANSPARENT) && (FALSE == TimeoutOccurred));
395
396 if (TRUE == TimeoutOccurred)
397 {
398 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_CLOCK_MUX_SWITCH_ERROR, Config->Name);
399 }
400 }
401 else
402 {
403 /* Report timeout error */
404 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
405 }
406 }
407 else
408 {
409 (void)Instance;
410 (void)SelectorIndex;
411 (void)SelectorValue;
412 (void)SelectorMask;
413 (void)SelectorShift;
414 (void)RegValue;
415 (void)TimeoutOccurred;
416 (void)StartTime;
417 (void)ElapsedTime;
418 (void)TimeoutTicks;
419 }
420 }
421 #endif
422
423
424 #ifdef CLOCK_IP_GPR_X_CLKOUT_SEL_MUXSEL
425 /* No implementation */
Clock_Ip_ResetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const * Config)426 static void Clock_Ip_ResetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const *Config)
427 {
428 (void)Config;
429 /* No implementation for reset value */
430 }
431
432 /* Set GPR_m_CLKOUTnSEL[MUXSEL] register */
Clock_Ip_SetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const * Config)433 static void Clock_Ip_SetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const *Config)
434 {
435
436 uint32 Instance;
437 uint32 SelectorIndex;
438 uint32 SelectorValue; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
439 uint32 SelectorMask;
440 uint32 SelectorShift;
441
442 uint32 RegValue;
443
444 if (NULL_PTR != Config)
445 {
446 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
447 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
448 SelectorValue = Clock_Ip_au16SelectorEntryClkoutHardwareValue[Config->Value];
449 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
450 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
451
452 RegValue = *Clock_Ip_apxGprClkout[Instance][SelectorIndex];
453 RegValue &= ~SelectorMask;
454 RegValue |= (SelectorValue << SelectorShift) & SelectorMask;
455 *Clock_Ip_apxGprClkout[Instance][SelectorIndex] = RegValue;
456 }
457 else
458 {
459 (void)Instance;
460 (void)SelectorIndex;
461 (void)SelectorValue;
462 (void)SelectorMask;
463 (void)SelectorShift;
464 }
465 }
466 #endif
467
468
469 #ifdef CLOCK_IP_MC_ME_AE_GS_S_SYSCLK
470 /* Reset IP_MC_ME_AE[SAFE_MC] register */
Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const * Config)471 void Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const *Config)
472 {
473 uint32 PowerModeIndexIndex;
474
475 if (NULL_PTR != Config)
476 {
477 PowerModeIndexIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_POWER_MODE_INDEX];
478
479 Clock_Ip_apxSystemClock->POWER_MODE_CONFIG[PowerModeIndexIndex] &= ~MC_ME_AE_GS_S_SYSCLK_MASK;
480 }
481 else
482 {
483 (void)PowerModeIndexIndex;
484 }
485 }
486 /* Set IP_MC_ME_AE[SAFE_MC] register */
Clock_Ip_SetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const * Config)487 void Clock_Ip_SetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const *Config)
488 {
489 uint32 SelectorValue; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
490 uint32 PowerModeIndexIndex;
491 uint32 McMeAeCurrentMode = 0U;
492
493 uint32 regValue;
494 boolean TimeoutOccurred = FALSE;
495 uint32 StartTime;
496 uint32 ElapsedTime;
497 uint32 TimeoutTicks;
498
499 if (NULL_PTR != Config)
500 {
501 SelectorValue = Clock_Ip_au16SelectorEntryAeHardwareValue[Config->Value];
502 PowerModeIndexIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_POWER_MODE_INDEX];
503
504 regValue = Clock_Ip_apxSystemClock->POWER_MODE_CONFIG[PowerModeIndexIndex];;
505 regValue &= ~MC_ME_AE_GS_S_SYSCLK_MASK;
506 regValue |= MC_ME_AE_GS_S_SYSCLK(SelectorValue);
507
508 McMeAeCurrentMode = IP_MC_ME_AE->GS & MC_ME_AE_GS_S_CURRENT_MODE_MASK;
509 Clock_Ip_apxSystemClock->POWER_MODE_CONFIG[PowerModeIndexIndex] = regValue;
510
511 /* Enter key */
512 IP_MC_ME_AE->MCTL = McMeAeCurrentMode | 0x5AF0U;
513 IP_MC_ME_AE->MCTL = McMeAeCurrentMode | 0xA50FU;
514
515 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
516 do
517 {
518 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
519 }
520 while ((MC_ME_AE_TRANSITION_IS_ON_GOING == (IP_MC_ME_AE->GS & MC_ME_AE_GS_S_MTRANS_MASK)) && (FALSE == TimeoutOccurred));
521
522 if (TRUE == TimeoutOccurred)
523 {
524 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_CLOCK_MUX_SWITCH_ERROR, Config->Name);
525 }
526 }
527 else
528 {
529 (void)SelectorValue;
530 (void)PowerModeIndexIndex;
531 (void)McMeAeCurrentMode;
532 (void)regValue;
533 (void)TimeoutOccurred;
534 (void)StartTime;
535 (void)ElapsedTime;
536 (void)TimeoutTicks;
537 }
538 }
539 #endif
540
541 #ifdef CLOCK_IP_MC_ME_AE_GS_S_SYSCLK
Clock_Ip_ResetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const * Config)542 static void Clock_Ip_ResetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const *Config)
543 {
544 #ifdef CLOCK_IP_ENABLE_USER_MODE_SUPPORT
545 #if (STD_ON == CLOCK_IP_ENABLE_USER_MODE_SUPPORT)
546 OsIf_Trusted_Call1param(Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall,(Config));
547 #else
548 Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall(Config);
549 #endif
550 #endif /* CLOCK_IP_ENABLE_USER_MODE_SUPPORT */
551 }
Clock_Ip_SetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const * Config)552 static void Clock_Ip_SetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const *Config)
553 {
554 #ifdef CLOCK_IP_ENABLE_USER_MODE_SUPPORT
555 #if (STD_ON == CLOCK_IP_ENABLE_USER_MODE_SUPPORT)
556 OsIf_Trusted_Call1param(Clock_Ip_SetMcMeAeGssSysclk_TrustedCall,(Config));
557 #else
558 Clock_Ip_SetMcMeAeGssSysclk_TrustedCall(Config);
559 #endif
560 #endif /* CLOCK_IP_ENABLE_USER_MODE_SUPPORT */
561 }
562 #endif
563
564 /*==================================================================================================
565 * GLOBAL FUNCTIONS
566 ==================================================================================================*/
567 /* Clock stop section code */
568 #define MCU_STOP_SEC_CODE
569
570 #include "Mcu_MemMap.h"
571
572 /*==================================================================================================
573 * GLOBAL CONSTANTS
574 ==================================================================================================*/
575
576 /* Clock start constant section data */
577 #define MCU_START_SEC_CONST_UNSPECIFIED
578
579 #include "Mcu_MemMap.h"
580
581 const Clock_Ip_SelectorCallbackType Clock_Ip_axSelectorCallbacks[CLOCK_IP_SELECTOR_CALLBACKS_COUNT] =
582 {
583 {
584 Clock_Ip_CallbackSelectorEmpty, /* Reset */
585 Clock_Ip_CallbackSelectorEmpty, /* Set */
586 },
587 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_SWIP
588 {
589 Clock_Ip_ResetCgmXCscCssClkswSwip, /* Reset */
590 Clock_Ip_SetCgmXCscCssClkswSwip, /* Set */
591 },
592 #endif
593
594 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CS_GRIP
595 {
596 Clock_Ip_ResetCgmXCscCssCsGrip, /* Reset */
597 Clock_Ip_SetCgmXCscCssCsGrip, /* Set */
598 },
599 #endif
600
601 #ifdef CLOCK_IP_GPR_X_CLKOUT_SEL_MUXSEL
602 {
603 Clock_Ip_ResetGprXClkoutSelMuxsel, /* Reset */
604 Clock_Ip_SetGprXClkoutSelMuxsel, /* Set */
605 },
606 #endif
607
608 #ifdef CLOCK_IP_MC_ME_AE_GS_S_SYSCLK
609 {
610 Clock_Ip_ResetMcMeAeGssSysclk, /* Reset */
611 Clock_Ip_SetMcMeAeGssSysclk, /* Set */
612 },
613 #endif
614
615 };
616
617 /* Clock stop constant section data */
618 #define MCU_STOP_SEC_CONST_UNSPECIFIED
619
620 #include "Mcu_MemMap.h"
621
622
623
624 #ifdef __cplusplus
625 }
626 #endif
627
628 /** @} */
629