1 /*
2 * Copyright 2021-2023 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 /**
7 * @file Clock_Ip_Monitor.c
8 * @version 1.0.0
9 *
10 * @brief CLOCK driver implementations.
11 * @details CLOCK driver implementations.
12 *
13 * @addtogroup CLOCK_DRIVER Clock Ip Driver
14 * @{
15 */
16
17
18 #ifdef __cplusplus
19 extern "C"{
20 #endif
21
22
23 /*==================================================================================================
24 * INCLUDE FILES
25 * 1) system and project includes
26 * 2) needed interfaces from external units
27 * 3) internal and external interfaces from this unit
28 ==================================================================================================*/
29
30 #include "Clock_Ip_Private.h"
31 #include "SchM_Mcu.h"
32
33 /*==================================================================================================
34 SOURCE FILE VERSION INFORMATION
35 ==================================================================================================*/
36 #define CLOCK_IP_MONITOR_VENDOR_ID_C 43
37 #define CLOCK_IP_MONITOR_AR_RELEASE_MAJOR_VERSION_C 4
38 #define CLOCK_IP_MONITOR_AR_RELEASE_MINOR_VERSION_C 7
39 #define CLOCK_IP_MONITOR_AR_RELEASE_REVISION_VERSION_C 0
40 #define CLOCK_IP_MONITOR_SW_MAJOR_VERSION_C 1
41 #define CLOCK_IP_MONITOR_SW_MINOR_VERSION_C 0
42 #define CLOCK_IP_MONITOR_SW_PATCH_VERSION_C 0
43
44 /*==================================================================================================
45 * FILE VERSION CHECKS
46 ==================================================================================================*/
47 /* Check if Clock_Ip_Monitor.c file and Clock_Ip_Private.h file are of the same vendor */
48 #if (CLOCK_IP_MONITOR_VENDOR_ID_C != CLOCK_IP_PRIVATE_VENDOR_ID)
49 #error "Clock_Ip_Monitor.c and Clock_Ip_Private.h have different vendor ids"
50 #endif
51
52 /* Check if Clock_Ip_Monitor.c file and Clock_Ip_Private.h file are of the same Autosar version */
53 #if ((CLOCK_IP_MONITOR_AR_RELEASE_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION) || \
54 (CLOCK_IP_MONITOR_AR_RELEASE_MINOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION) || \
55 (CLOCK_IP_MONITOR_AR_RELEASE_REVISION_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION) \
56 )
57 #error "AutoSar Version Numbers of Clock_Ip_Monitor.c and Clock_Ip_Private.h are different"
58 #endif
59
60 /* Check if Clock_Ip_Monitor.c file and Clock_Ip_Private.h file are of the same Software version */
61 #if ((CLOCK_IP_MONITOR_SW_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MAJOR_VERSION) || \
62 (CLOCK_IP_MONITOR_SW_MINOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MINOR_VERSION) || \
63 (CLOCK_IP_MONITOR_SW_PATCH_VERSION_C != CLOCK_IP_PRIVATE_SW_PATCH_VERSION) \
64 )
65 #error "Software Version Numbers of Clock_Ip_Monitor.c and Clock_Ip_Private.h are different"
66 #endif
67 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
68 /* Check if Clock_Ip_Monitor.c file and SchM_Mcu.h file are of the same Autosar version */
69 #if ((CLOCK_IP_MONITOR_AR_RELEASE_MAJOR_VERSION_C != SCHM_MCU_AR_RELEASE_MAJOR_VERSION) || \
70 (CLOCK_IP_MONITOR_AR_RELEASE_MINOR_VERSION_C != SCHM_MCU_AR_RELEASE_MINOR_VERSION))
71 #error "AutoSar Version Numbers of Clock_Ip_Monitor.c and SchM_Mcu.h are different"
72 #endif
73 #endif
74
75 /*==================================================================================================
76 * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
77 ==================================================================================================*/
78
79 /*==================================================================================================
80 * LOCAL MACROS
81 ==================================================================================================*/
82 #ifdef CLOCK_IP_CMU_FC_FCE_REF_CNT_LFREF_HFREF
83 #define CLOCK_IP_CMU_REFERENCE_COUNTER_MINIMUM_VALUE_MULTIPLIER 80U
84 #define CLOCK_IP_CMU_FC_VAR 3U
85 #define CLOCK_IP_CMU_REFERENCE_CLOCK_VARIATION 33U
86 #define CLOCK_IP_CMU_MONITORED_CLOCK_VARIATION 11U
87 #define CLOCK_IP_DIVIDE_BY_1000 1000U
88
89 #if defined(CLOCK_IP_FEATURE_OFFSET_REFERENCE_COUNT_FORMULA1)
90 #define CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA1 CLOCK_IP_FEATURE_OFFSET_REFERENCE_COUNT_FORMULA1
91 #else
92 #define CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA1 1U
93 #endif
94
95 #if defined(CLOCK_IP_FEATURE_MULTIPLIER_REFERENCE_COUNT_FORMULA1)
96 #define CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA1 CLOCK_IP_FEATURE_MULTIPLIER_REFERENCE_COUNT_FORMULA1
97 #else
98 #define CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA1 3U
99 #endif
100
101 #if defined(CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA2)
102 #define CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA2 CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA2
103 #else
104 #define CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA2 9U
105 #endif
106
107 #if defined(CLOCK_IP_FEATURE_MULTIPLIER_REFERENCE_COUNT_FORMULA2)
108 #define CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA2 CLOCK_IP_FEATURE_MULTIPLIER_REFERENCE_COUNT_FORMULA2
109 #else
110 #define CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA2 5U
111 #endif
112
113 #endif
114
115 /*==================================================================================================
116 * LOCAL CONSTANTS
117 ==================================================================================================*/
118
119 /*==================================================================================================
120 * LOCAL VARIABLES
121 ==================================================================================================*/
122
123 /* Clock start initialized section data */
124 #define MCU_START_SEC_VAR_CLEARED_32
125 #include "Mcu_MemMap.h"
126
127 #ifdef CLOCK_IP_CMU_FC_FCE_REF_CNT_LFREF_HFREF
128 #if !(defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
129 static uint32 HashCmu[CLOCK_IP_CMUS_COUNT];
130 #endif
131 #endif
132
133 /* Clock stop initialized section data */
134 #define MCU_STOP_SEC_VAR_CLEARED_32
135 #include "Mcu_MemMap.h"
136
137 /*==================================================================================================
138 * GLOBAL VARIABLES
139 ==================================================================================================*/
140
141 /*==================================================================================================
142 * LOCAL FUNCTION PROTOTYPES
143 ==================================================================================================*/
144 /* Clock start section code */
145 #define MCU_START_SEC_CODE
146
147 #include "Mcu_MemMap.h"
148
149 /* TODO ARTD-738 Implement CMU in Clock_Ip driver */
150
151 static void Clock_Ip_ClockMonitorEmpty(Clock_Ip_CmuConfigType const* Config);
152 static void Clock_Ip_ClockMonitorEmpty_Set( Clock_Ip_CmuConfigType const* Config,
153 uint32 Index
154 );
155 static void Clock_Ip_ClockMonitorEmpty_Disable(Clock_Ip_NameType Name);
156
157 #ifdef CLOCK_IP_CMU_FC_FCE_REF_CNT_LFREF_HFREF
158 static void Clock_Ip_ResetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config);
159 #if !(defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
160 static void Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config, uint32 Index);
161 #endif
162 static void Clock_Ip_DisableCmuFcFceRefCntLfrefHfref(Clock_Ip_NameType Name);
163 static void Clock_Ip_EnableCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config);
164 #endif
165
166 #if (defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
167 /* Set clock monitor via register value configuration */
168 static void Clock_Ip_SetClockMonitorRegisterValues(Clock_Ip_CmuConfigType const* Config, uint32 Index);
169 #endif
170
171
172
173
174 /* Clock stop section code */
175 #define MCU_STOP_SEC_CODE
176
177 #include "Mcu_MemMap.h"
178
179 /*==================================================================================================
180 * LOCAL FUNCTIONS
181 ==================================================================================================*/
182
183 /* Clock start section code */
184 #define MCU_START_SEC_CODE
185
186 #include "Mcu_MemMap.h"
187
Clock_Ip_ClockMonitorEmpty(Clock_Ip_CmuConfigType const * Config)188 static void Clock_Ip_ClockMonitorEmpty(Clock_Ip_CmuConfigType const* Config)
189 {
190 (void)Config;
191 /* No implementation */
192 }
193
Clock_Ip_ClockMonitorEmpty_Set(Clock_Ip_CmuConfigType const * Config,uint32 Index)194 static void Clock_Ip_ClockMonitorEmpty_Set( Clock_Ip_CmuConfigType const* Config,
195 uint32 Index
196 )
197 {
198 (void)Config;
199 (void)Index;
200 /* No implementation */
201 }
202
Clock_Ip_ClockMonitorEmpty_Disable(Clock_Ip_NameType Name)203 static void Clock_Ip_ClockMonitorEmpty_Disable(Clock_Ip_NameType Name)
204 {
205 (void)Name;
206 /* No implementation */
207 }
208
209 #if (defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
210 /* Set clock monitor via register value configuration */
Clock_Ip_SetClockMonitorRegisterValues(Clock_Ip_CmuConfigType const * Config,uint32 Index)211 static void Clock_Ip_SetClockMonitorRegisterValues( Clock_Ip_CmuConfigType const* Config,
212 uint32 Index
213 )
214 {
215 (void)Index;
216
217 if (NULL_PTR != Config)
218 {
219 Clock_Ip_WriteRegisterValues(&Config->Indexes);
220 }
221 }
222
223 #endif
224
225 #ifdef CLOCK_IP_CMU_FC_FCE_REF_CNT_LFREF_HFREF
Clock_Ip_DisableCmuFcFceRefCntLfrefHfref(Clock_Ip_NameType Name)226 static void Clock_Ip_DisableCmuFcFceRefCntLfrefHfref(Clock_Ip_NameType Name)
227 {
228 const Clock_Ip_CmuInfoType * CmuInformation = &Clock_Ip_axCmuInfo[Clock_Ip_au8ClockFeatures[Name][CLOCK_IP_CMU_INDEX]];
229 Clock_Ip_ClockMonitorType* const CmuFc = CmuInformation->CmuInstance;
230
231 boolean TimeoutOccurred = FALSE;
232 uint32 StartTime;
233 uint32 ElapsedTime;
234 uint32 TimeoutTicks;
235 uint32 FrequencyCheckStatus;
236
237 /* Enter critical region*/
238 SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01();
239 /* Only disable frequency check if it is enabled */
240 if (CLOCK_IP_CMU_FREQUENCY_CHECK_ENABLED == (CmuFc->GCR & CMU_FC_GCR_FCE_MASK))
241 {
242 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
243 /* Wait for frequency check to be running. */
244 do
245 {
246 FrequencyCheckStatus = (CmuFc->SR & CMU_FC_SR_RS_MASK);
247 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
248 }
249 while ((CLOCK_IP_CMU_FREQUENCY_CHECK_STOPPED == FrequencyCheckStatus) && (!TimeoutOccurred));
250
251 /* timeout notification */
252 if (TimeoutOccurred)
253 {
254 /* Report timeout error */
255 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Name);
256 }
257
258 /* Disable frequency check */
259 CmuFc->GCR &= ~(uint8)(CMU_FC_GCR_FCE_MASK);
260
261 }
262
263 /* Disable interupts */
264 CmuFc->IER &= ~(CMU_FC_IER_FLLIE_MASK | CMU_FC_IER_FHHIE_MASK | CMU_FC_IER_FLLAIE_MASK | CMU_FC_IER_FHHAIE_MASK);
265
266 /* Clear flags */
267 CmuFc->SR |= (CMU_FC_SR_FLL_MASK | CMU_FC_SR_FHH_MASK);
268
269 /* Exit critical region. */
270 SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01();
271 }
272
273 /* Reset CMU register */
Clock_Ip_ResetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const * Config)274 static void Clock_Ip_ResetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config)
275 {
276 if (NULL_PTR != Config)
277 {
278 Clock_Ip_DisableCmuFcFceRefCntLfrefHfref(Config->Name);
279 }
280 }
281
282 #if !(defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const * Config,uint32 Index)283 static void Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config, uint32 Index)
284 {
285 const Clock_Ip_CmuInfoType * CmuInformation;
286 Clock_Ip_ClockMonitorType* CmuFc;
287
288 uint32 ReferenceClk = 0U;
289 uint32 MonitoredClk = 0U;
290 uint32 BusClk = 0U;
291 uint32 RefCount = 0U;
292 uint32 HfRef = 0U;
293 uint32 LfRef = 0U;
294 uint32 Cmp1;
295 uint32 Cmp2;
296 uint32 DivideBy;
297 uint32 DividerResult;
298 uint32 ModuloValue;
299
300 if (NULL_PTR != Config)
301 {
302 CmuInformation = &Clock_Ip_axCmuInfo[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_CMU_INDEX]];
303 CmuFc = CmuInformation->CmuInstance;
304
305 /* Do not calculate cmu values if these values are already calculated and written in hw registers */
306 if (HashCmu[Index] != ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->MonitoredClockFrequency) ^ ((uint32)Config->Name))))
307 {
308 HashCmu[Index] = ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->MonitoredClockFrequency) ^ ((uint32)Config->Name)));
309
310 ReferenceClk = (*Clock_Ip_pxConfig->ConfiguredFrequencies)[Clock_Ip_FreqIds[CmuInformation->Reference]].ConfiguredFrequencyValue / CLOCK_IP_DIVIDE_BY_1000;
311 BusClk = (*Clock_Ip_pxConfig->ConfiguredFrequencies)[Clock_Ip_FreqIds[CmuInformation->Bus]].ConfiguredFrequencyValue / CLOCK_IP_DIVIDE_BY_1000;
312 MonitoredClk = Config->MonitoredClockFrequency / CLOCK_IP_DIVIDE_BY_1000;
313
314 #if (defined(CLOCK_IP_DEV_ERROR_DETECT) && (CLOCK_IP_DEV_ERROR_DETECT == STD_ON))
315 CLOCK_IP_DEV_ASSERT(ReferenceClk != 0U);
316 CLOCK_IP_DEV_ASSERT(BusClk != 0U);
317 CLOCK_IP_DEV_ASSERT(MonitoredClk != 0U);
318 #endif
319 /* Avoid divide by zero */
320 if ((ReferenceClk != 0U) && (BusClk != 0U) && (MonitoredClk != 0U))
321 {
322 /* Cmp1 = ceiling of (3 * fRef/ fBus) */
323 Cmp1 = CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA1 + (uint32)((CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA1 * ReferenceClk) / BusClk);
324 /* Cmp2 = ceiling of (8 + (5 * fRef / fMonitor)) */
325 Cmp2 = CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA2 + (uint32)((CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA2 * ReferenceClk) / MonitoredClk);
326
327 /* REF count = Max(cmp1,cmp2) */
328 RefCount = (Cmp1 > Cmp2) ? Cmp1 : Cmp2;
329 RefCount = (CLOCK_IP_CMU_REFERENCE_COUNTER_MINIMUM_VALUE_MULTIPLIER > RefCount) ? CLOCK_IP_CMU_REFERENCE_COUNTER_MINIMUM_VALUE_MULTIPLIER: RefCount;
330
331
332 /* HTCR[HFREF] is ((fMonitoredClk mul_by (1000U plus CLOCK_IP_CMU_MONITORED_CLOCK_VARIATION)) divide_by (fReferenceClk mul_by (1000U minus CLOCK_IP_CMU_REFERENCE_CLOCK_VARIATION)) * RefCount) plus CLOCK_IP_CMU_FC_VAR plus 1U */
333
334 /* MonitoredClk max */
335 HfRef = MonitoredClk * (1000U + CLOCK_IP_CMU_MONITORED_CLOCK_VARIATION);
336 /* ReferenceClk min */
337 DivideBy = ReferenceClk * (1000U - CLOCK_IP_CMU_REFERENCE_CLOCK_VARIATION);
338 /* (MonitoredClk max) div (ReferenceClk min) */
339 DividerResult = (uint32) HfRef / DivideBy;
340 ModuloValue = HfRef - (DivideBy * DividerResult);
341
342 /* DividerResult mul RefCount */
343 HfRef = (DividerResult * RefCount) + ((ModuloValue * RefCount) / DivideBy);
344 HfRef += (CLOCK_IP_CMU_FC_VAR + 1U);
345
346 /* Do not program HFREF to a value greater than 0x00FFFFFC */
347 HfRef = (HfRef > (uint32)0xFFFFFC)? (uint32)0xFFFFFC : HfRef;
348
349
350 /* LTCR[LFREF] is ((fMonitoredClk mul_by (1000U minus CLOCK_IP_CMU_MONITORED_CLOCK_VARIATION)) divide_by (fReferenceClk mul_by (1000U plus CLOCK_IP_CMU_REFERENCE_CLOCK_VARIATION)) * RefCount) minus CLOCK_IP_CMU_FC_VAR */
351
352 /* MonitoredClk min */
353 LfRef = MonitoredClk * (1000U - CLOCK_IP_CMU_MONITORED_CLOCK_VARIATION);
354 /* ReferenceClk max */
355 DivideBy = ReferenceClk * (1000U + CLOCK_IP_CMU_REFERENCE_CLOCK_VARIATION);
356 /* (MonitoredClk min) div (ReferenceClk max) */
357 DividerResult = (uint32) LfRef / DivideBy;
358 ModuloValue = LfRef - (DivideBy * DividerResult);
359
360 LfRef = (DividerResult * RefCount) + ((ModuloValue * RefCount) / DivideBy);
361 LfRef -= CLOCK_IP_CMU_FC_VAR;
362
363 /* Do not program LFREF to a value less than 0x00000003 */
364 LfRef = (LfRef < (uint32)3U)? (uint32)3U : LfRef;
365
366 /* Set reference counter */
367 CmuFc->RCCR = RefCount;
368
369 /* Set high limit */
370 CmuFc->HTCR = HfRef;
371
372 /* Set low limit */
373 CmuFc->LTCR = LfRef;
374 }
375 }
376
377 /* Enable/disable interrupts */
378 CmuFc->IER = Config->Interrupt;
379 }
380 else
381 {
382 (void)Index;
383 (void)CmuInformation;
384 (void)CmuFc;
385 (void)ReferenceClk;
386 (void)MonitoredClk;
387 (void)BusClk;
388 (void)RefCount;
389 (void)HfRef;
390 (void)LfRef;
391 (void)Cmp1;
392 (void)Cmp2;
393 (void)DivideBy;
394 (void)DividerResult;
395 (void)ModuloValue;
396 }
397 }
398 #endif
399
Clock_Ip_EnableCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const * Config)400 static void Clock_Ip_EnableCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config)
401 {
402 const Clock_Ip_CmuInfoType *CmuInformation;
403 Clock_Ip_ClockMonitorType* CmuFc;
404
405 if (NULL_PTR != Config)
406 {
407 CmuInformation = &Clock_Ip_axCmuInfo[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_CMU_INDEX]];
408 CmuFc = CmuInformation->CmuInstance;
409
410 /* Enable cmu */
411 if (Config->Enable != 0U)
412 {
413 CmuFc->GCR |= (uint8)(CMU_FC_GCR_FCE_MASK);
414 }
415 else
416 {
417 CmuFc->GCR &= ~(uint8)(CMU_FC_GCR_FCE_MASK);
418 }
419 }
420 else
421 {
422 (void)CmuInformation;
423 (void)CmuFc;
424 }
425 }
426
427 #endif
428
429
430 /*==================================================================================================
431 * GLOBAL FUNCTIONS
432 ==================================================================================================*/
433
434 #if CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE > 0U
435
Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu)436 uint32 Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu)
437 {
438 uint32 CmuIsrValue;
439
440 /* Read flags */
441 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK;
442
443 return CmuIsrValue;
444 }
445
446 /**
447 * @brief This function clear the CMU interrupt flag from CMU module.
448 * @details Called by RGM ISR routine when a user notification for CMU FCCU events is configured
449 *
450 * @return void
451 *
452 * @implements Clock_Ip_CMU_ClockFailInt_Activity
453 *
454 */
Clock_Ip_CMU_ClockFailInt(void)455 void Clock_Ip_CMU_ClockFailInt(void)
456 {
457 uint32 CmuIerValue;
458 uint32 CmuIsrValue = 0U;
459 uint32 IndexCmu;
460
461 for (IndexCmu = 0U; IndexCmu < CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE; IndexCmu++)
462 {
463 /* Read flags */
464 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK;
465
466 /* Check whether driver is initialized */
467 if(NULL_PTR != Clock_Ip_pxConfig)
468 {
469 /* Read interrupt enable */
470 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK;
471 /* Filter all interrupts that are not enabled from cmuIsrValue */
472 CmuIsrValue = CmuIsrValue & CmuIerValue;
473
474 /* If at least one interrupt has been triggered */
475 if (CmuIsrValue != 0U)
476 {
477 /* Clear status flag */
478 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue;
479 #ifdef CLOCK_IP_CMU_FCCU_NOTIFICATION
480 CLOCK_IP_CMU_FCCU_NOTIFICATION(Clock_Ip_aeCmuNames[IndexCmu]);
481 #else
482 Clock_Ip_ReportClockErrors(CLOCK_IP_CMU_ERROR, Clock_Ip_aeCmuNames[IndexCmu]);
483 #endif
484 }
485 }
486 else
487 {
488 /* Clear status flag */
489 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue;
490 }
491 }
492 }
493 #endif
494
495
496 /* Clock stop section code */
497 #define MCU_STOP_SEC_CODE
498
499 #include "Mcu_MemMap.h"
500
501 /*==================================================================================================
502 * GLOBAL CONSTANTS
503 ==================================================================================================*/
504
505 /* Clock start constant section data */
506 #define MCU_START_SEC_CONST_UNSPECIFIED
507
508 #include "Mcu_MemMap.h"
509
510 const Clock_Ip_ClockMonitorCallbackType Clock_Ip_axCmuCallbacks[CLOCK_IP_CMU_CALLBACKS_COUNT] =
511 {
512 {
513 Clock_Ip_ClockMonitorEmpty, /* Reset */
514 Clock_Ip_ClockMonitorEmpty_Set, /* Set */
515 Clock_Ip_ClockMonitorEmpty_Disable, /* Disable */
516 Clock_Ip_ClockMonitorEmpty, /* Enable */
517 },
518 #ifdef CLOCK_IP_CMU_FC_FCE_REF_CNT_LFREF_HFREF
519 {
520 Clock_Ip_ResetCmuFcFceRefCntLfrefHfref, /* Reset */
521 #if (defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
522 Clock_Ip_SetClockMonitorRegisterValues, /* Set */
523 #else
524 Clock_Ip_SetCmuFcFceRefCntLfrefHfref, /* Set */
525 #endif
526 Clock_Ip_DisableCmuFcFceRefCntLfrefHfref, /* Disable */
527 Clock_Ip_EnableCmuFcFceRefCntLfrefHfref, /* Enable */
528 },
529 #endif
530
531
532 };
533
534 /* Clock stop constant section data */
535 #define MCU_STOP_SEC_CONST_UNSPECIFIED
536
537 #include "Mcu_MemMap.h"
538
539
540 #ifdef __cplusplus
541 }
542 #endif
543
544 /** @} */
545
546