1 /*
2 * Copyright 2020-2023 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 /**
7 * @file Clock_Ip_Selector.c
8 * @version 3.0.0
9 *
10 * @brief CLOCK driver implementations.
11 * @details CLOCK driver implementations.
12 *
13 * @addtogroup CLOCK_DRIVER Clock Ip Driver
14 * @{
15 */
16
17
18 #ifdef __cplusplus
19 extern "C"{
20 #endif
21
22
23 /*==================================================================================================
24 * INCLUDE FILES
25 * 1) system and project includes
26 * 2) needed interfaces from external units
27 * 3) internal and external interfaces from this unit
28 ==================================================================================================*/
29
30 #include "Clock_Ip_Private.h"
31
32 /*==================================================================================================
33 SOURCE FILE VERSION INFORMATION
34 ==================================================================================================*/
35 #define CLOCK_IP_SELECTOR_VENDOR_ID_C 43
36 #define CLOCK_IP_SELECTOR_AR_RELEASE_MAJOR_VERSION_C 4
37 #define CLOCK_IP_SELECTOR_AR_RELEASE_MINOR_VERSION_C 7
38 #define CLOCK_IP_SELECTOR_AR_RELEASE_REVISION_VERSION_C 0
39 #define CLOCK_IP_SELECTOR_SW_MAJOR_VERSION_C 3
40 #define CLOCK_IP_SELECTOR_SW_MINOR_VERSION_C 0
41 #define CLOCK_IP_SELECTOR_SW_PATCH_VERSION_C 0
42
43 /*==================================================================================================
44 * FILE VERSION CHECKS
45 ==================================================================================================*/
46 /* Check if Clock_Ip_Selector.c file and Clock_Ip_Private.h file are of the same vendor */
47 #if (CLOCK_IP_SELECTOR_VENDOR_ID_C != CLOCK_IP_PRIVATE_VENDOR_ID)
48 #error "Clock_Ip_Selector.c and Clock_Ip_Private.h have different vendor ids"
49 #endif
50
51 /* Check if Clock_Ip_Selector.c file and Clock_Ip_Private.h file are of the same Autosar version */
52 #if ((CLOCK_IP_SELECTOR_AR_RELEASE_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION) || \
53 (CLOCK_IP_SELECTOR_AR_RELEASE_MINOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION) || \
54 (CLOCK_IP_SELECTOR_AR_RELEASE_REVISION_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION) \
55 )
56 #error "AutoSar Version Numbers of Clock_Ip_Selector.c and Clock_Ip_Private.h are different"
57 #endif
58
59 /* Check if Clock_Ip_Selector.c file and Clock_Ip_Private.h file are of the same Software version */
60 #if ((CLOCK_IP_SELECTOR_SW_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MAJOR_VERSION) || \
61 (CLOCK_IP_SELECTOR_SW_MINOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MINOR_VERSION) || \
62 (CLOCK_IP_SELECTOR_SW_PATCH_VERSION_C != CLOCK_IP_PRIVATE_SW_PATCH_VERSION) \
63 )
64 #error "Software Version Numbers of Clock_Ip_Selector.c and Clock_Ip_Private.h are different"
65 #endif
66 /*==================================================================================================
67 * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
68 ==================================================================================================*/
69
70 /*==================================================================================================
71 * LOCAL MACROS
72 ==================================================================================================*/
73
74 /*==================================================================================================
75 * LOCAL CONSTANTS
76 ==================================================================================================*/
77
78 /*==================================================================================================
79 * LOCAL VARIABLES
80 ==================================================================================================*/
81
82 /*==================================================================================================
83 * GLOBAL CONSTANTS
84 ==================================================================================================*/
85
86 /*==================================================================================================
87 * GLOBAL VARIABLES
88 ==================================================================================================*/
89
90 /*==================================================================================================
91 * GLOBAL FUNCTION PROTOTYPES
92 ==================================================================================================*/
93 /* Clock start section code */
94 #define MCU_START_SEC_CODE
95
96 #include "Mcu_MemMap.h"
97
98 #ifdef CLOCK_IP_RTC_RTCC_CLKSELECT
99 void Clock_Ip_SetRtcRtccClksel_TrustedCall(Clock_Ip_SelectorConfigType const *Config);
100 #endif
101
102 /*==================================================================================================
103 * LOCAL FUNCTION PROTOTYPES
104 ==================================================================================================*/
105
106 static void Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const* Config);
107
108 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_SWIP
109 static void Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config);
110 static void Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config);
111 #endif
112
113 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_RAMPDOWN_RAMPUP_SWIP
114 static void Clock_Ip_ResetCgmXCscCssClkswRampupRampdownSwip(Clock_Ip_SelectorConfigType const *Config);
115 static void Clock_Ip_SetCgmXCscCssClkswRampupRampdownSwip(Clock_Ip_SelectorConfigType const *Config);
116 #endif
117
118 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CS_GRIP
119 static void Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config);
120 static void Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config);
121 #endif
122
123 #ifdef CLOCK_IP_RTC_RTCC_CLKSELECT
124 static void Clock_Ip_SetRtcRtccClksel(Clock_Ip_SelectorConfigType const *Config);
125 #endif
126
127 /* Clock stop section code */
128 #define MCU_STOP_SEC_CODE
129
130 #include "Mcu_MemMap.h"
131 /*==================================================================================================
132 * LOCAL FUNCTIONS
133 ==================================================================================================*/
134 /* Clock start section code */
135 #define MCU_START_SEC_CODE
136
137 #include "Mcu_MemMap.h"
138
Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const * Config)139 static void Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const* Config)
140 {
141 (void)Config;
142 /* No implementation */
143 }
144
145 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_SWIP
146 /* Reset MC_CGM_m_MUX_n[CSC] register */
Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const * Config)147 static void Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config)
148 {
149
150 uint32 Instance;
151 uint32 SelectorIndex;
152 uint32 SelectorMask;
153
154 if (NULL_PTR != Config)
155 {
156 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
157 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
158 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
159
160 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC |= MC_CGM_MUX_CSC_SAFE_SW_MASK;
161 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC &= ~SelectorMask;
162 }
163 else
164 {
165 (void)Instance;
166 (void)SelectorIndex;
167 (void)SelectorMask;
168 }
169 }
170
171 /* Set MC_CGM_m_MUX_n[CSC] register */
Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const * Config)172 static void Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config)
173 {
174
175 uint32 Instance;
176 uint32 SelectorIndex;
177 uint32 SelectorValue; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
178
179 uint32 SelectorMask;
180 uint32 SelectorShift;
181
182 uint32 RegValue;
183 boolean TimeoutOccurred = FALSE;
184 uint32 StartTime;
185 uint32 ElapsedTime;
186 uint32 TimeoutTicks;
187
188 if (NULL_PTR != Config)
189 {
190 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
191 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
192 SelectorValue = Clock_Ip_au16SelectorEntryHardwareValue[Config->Value]; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
193
194 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
195 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
196
197 /* Do not configure mux if it is already set to the selector value from configuration.*/
198 if (SelectorValue != ((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & SelectorMask) >> SelectorShift))
199 {
200 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
201 do
202 {
203 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
204 }
205 while((MC_CGM_MUX_CSS_SWIP_IN_PROGRESS == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWIP_MASK)) && (FALSE == TimeoutOccurred));
206
207 if (FALSE == TimeoutOccurred)
208 {
209 RegValue = Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC;
210 RegValue &= ~SelectorMask;
211 RegValue |= (SelectorValue << SelectorShift) & SelectorMask;
212 RegValue |= (MC_CGM_MUX_CSC_CLK_SW_MASK); /* Clock switch operation is requested */
213 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC = RegValue;
214
215 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
216 /* Wait for CLK_SW to auto-clear */
217 do
218 {
219 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
220 } /* No safe clock switch operation was requested. */
221 while((CLOCK_IP_MC_CGM_MUX_CSS_CLK_SW_NOT_REQUESTED == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CLK_SW_MASK)) && (FALSE == TimeoutOccurred));
222
223 if (FALSE == TimeoutOccurred)
224 {
225 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
226 /* Wait for acknowledge to be cleared. */
227 do
228 {
229 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
230 }
231 while((MC_CGM_MUX_CSS_SWIP_IN_PROGRESS == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWIP_MASK)) && (FALSE == TimeoutOccurred) );
232
233 if (FALSE == TimeoutOccurred)
234 {
235 /* Check the switch status. */
236 if (CLOCK_IP_MC_CGM_MUX_CSS_SWTRG_SUCCEEDED != ((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWTRG_MASK) >> MC_CGM_MUX_0_CSS_SWTRG_SHIFT))
237 {
238 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_CLOCK_MUX_SWITCH_ERROR, Config->Name);
239 }
240 }
241 else
242 {
243 /* Report timeout error */
244 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
245 }
246 }
247 else
248 {
249 /* Report timeout error */
250 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
251 }
252 }
253 else {
254
255 /* Report timeout error */
256 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
257 }
258 }
259 }
260 else
261 {
262 (void)Instance;
263 (void)SelectorIndex;
264 (void)SelectorValue;
265 (void)SelectorMask;
266 (void)SelectorShift;
267 (void)RegValue;
268 (void)TimeoutOccurred;
269 (void)StartTime;
270 (void)ElapsedTime;
271 (void)TimeoutTicks;
272 }
273 }
274 #endif
275
276 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_RAMPDOWN_RAMPUP_SWIP
277 /* Reset MC_CGM_m_MUX_n[CSC] register */
Clock_Ip_ResetCgmXCscCssClkswRampupRampdownSwip(Clock_Ip_SelectorConfigType const * Config)278 static void Clock_Ip_ResetCgmXCscCssClkswRampupRampdownSwip(Clock_Ip_SelectorConfigType const *Config)
279 {
280
281 uint32 Instance;
282 uint32 SelectorIndex;
283 uint32 SelectorMask;
284
285 if (NULL_PTR != Config)
286 {
287 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
288 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
289
290 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
291
292 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC |= MC_CGM_MUX_CSC_SAFE_SW_MASK;
293 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC &= ~SelectorMask;
294 }
295 else
296 {
297 (void)Instance;
298 (void)SelectorIndex;
299 (void)SelectorMask;
300 }
301 }
302
303 /* Set MC_CGM_m_MUX_n[CSC] register */
Clock_Ip_SetCgmXCscCssClkswRampupRampdownSwip(Clock_Ip_SelectorConfigType const * Config)304 static void Clock_Ip_SetCgmXCscCssClkswRampupRampdownSwip(Clock_Ip_SelectorConfigType const *Config)
305 {
306
307 uint32 Instance;
308 uint32 SelectorIndex;
309 uint32 SelectorValue; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
310
311 uint32 SelectorMask;
312 uint32 SelectorShift;
313
314 uint32 RegValue;
315 boolean TimeoutOccurred = FALSE;
316 uint32 StartTime;
317 uint32 ElapsedTime;
318 uint32 TimeoutTicks;
319
320 if (NULL_PTR != Config)
321 {
322 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
323 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
324 SelectorValue = Clock_Ip_au16SelectorEntryHardwareValue[Config->Value]; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
325
326 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
327 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
328
329 /* Do not configure mux if it is already set to the selector value from configuration.*/
330 if (SelectorValue != ((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & SelectorMask) >> SelectorShift))
331 {
332 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
333 do
334 {
335 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
336 }
337 while ((MC_CGM_MUX_CSS_SWIP_IN_PROGRESS == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWIP_MASK)) && (FALSE == TimeoutOccurred));
338
339 if (FALSE == TimeoutOccurred)
340 {
341 RegValue = Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC;
342 RegValue &= ~SelectorMask;
343 RegValue |= (SelectorValue << SelectorShift) & SelectorMask;
344 /* All the PCFS commands should be atomic in nature (i.e. a single register write should provide a complete PCFS sequence
345 * to be executed, that is ramp-down, clock switch, and ramp-up. It is necessary to set both RAMPUP and RAMPDOWN bits
346 * together even if you want to trigger either RAMPUP or RAMPDOWN process, otherwise the PCFS effect will not manifest. */
347 RegValue |= (MC_CGM_MUX_CSC_CLK_SW_MASK | MC_CGM_MUX_CSC_RAMPUP_MASK | MC_CGM_MUX_CSC_RAMPDOWN_MASK);
348 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC = RegValue;
349
350 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
351 /* Wait for CLK_SW to auto-clear */
352 do
353 {
354 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
355 } /* No safe clock switch operation was requested. */
356 while((CLOCK_IP_MC_CGM_MUX_CSS_CLK_SW_NOT_REQUESTED == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CLK_SW_MASK)) && (FALSE == TimeoutOccurred));
357
358 if (FALSE == TimeoutOccurred)
359 {
360 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
361 /* Wait for acknowledge to be cleared. */
362 do
363 {
364 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
365 }
366 while ((MC_CGM_MUX_CSS_SWIP_IN_PROGRESS == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWIP_MASK)) && (FALSE == TimeoutOccurred) );
367
368 if (FALSE == TimeoutOccurred)
369 {
370 /* Check the switch status. */
371 if (CLOCK_IP_MC_CGM_MUX_CSS_SWTRG_SUCCEEDED != ((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_SWTRG_MASK) >> MC_CGM_MUX_CSS_SWTRG_SHIFT))
372 {
373 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_CLOCK_MUX_SWITCH_ERROR, Config->Name);
374 }
375 }
376 else
377 {
378 /* Report timeout error */
379 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
380 }
381 }
382 else
383 {
384 /* Report timeout error */
385 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
386 }
387 }
388 else
389 {
390 /* Report timeout error */
391 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
392 }
393 }
394 }
395 else
396 {
397 (void)Instance;
398 (void)SelectorIndex;
399 (void)SelectorValue;
400 (void)SelectorMask;
401 (void)SelectorShift;
402 (void)RegValue;
403 (void)TimeoutOccurred;
404 (void)StartTime;
405 (void)ElapsedTime;
406 (void)TimeoutTicks;
407 }
408 }
409 #endif
410
411 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CS_GRIP
Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const * Config)412 static void Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config)
413 {
414 uint32 Instance;
415 uint32 SelectorIndex;
416 uint32 SelectorResetValue; /* Hw value corresponding to software mux reset. */
417
418 uint32 SelectorMask;
419 uint32 SelectorShift;
420
421 uint32 RegValue;
422 boolean TimeoutOccurred = FALSE;
423 uint32 StartTime;
424 uint32 ElapsedTime;
425 uint32 TimeoutTicks;
426
427 if (NULL_PTR != Config)
428 {
429 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
430 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
431 SelectorResetValue = Clock_Ip_au8SoftwareMuxResetValue[Config->Name]; /* Hw value corresponding to software mux reset. */
432
433 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
434 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
435
436 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC |= (MC_CGM_MUX_CSC_CG_MASK | MC_CGM_MUX_CSC_FCG_MASK);
437
438 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
439 do
440 {
441 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
442 }
443 while ((MC_CGM_MUX_CSS_CS_TRANSPARENT == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CS_MASK)) && (FALSE == TimeoutOccurred));
444
445 if (FALSE == TimeoutOccurred)
446 {
447 /* Set the reset value for this mux. */
448 RegValue = Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC;
449 RegValue &= ~SelectorMask;
450 RegValue |= (SelectorResetValue << SelectorShift) & SelectorMask;
451 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC = RegValue;
452
453 /* Clear CG and FCG bit after set the SELCTL bit */
454 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC &= ~(MC_CGM_MUX_CSC_FCG_MASK | MC_CGM_MUX_CSC_CG_MASK);
455 }
456 else
457 {
458 /* Report timeout error */
459 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
460 }
461 }
462 else
463 {
464 (void)Instance;
465 (void)SelectorIndex;
466 (void)SelectorResetValue;
467 (void)SelectorMask;
468 (void)SelectorShift;
469 (void)RegValue;
470 (void)TimeoutOccurred;
471 (void)StartTime;
472 (void)ElapsedTime;
473 (void)TimeoutTicks;
474 }
475 }
Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const * Config)476 static void Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config)
477 {
478
479 uint32 Instance;
480 uint32 SelectorIndex;
481 uint32 SelectorValue; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
482
483 uint32 SelectorMask;
484 uint32 SelectorShift;
485
486 uint32 RegValue;
487 boolean TimeoutOccurred = FALSE;
488 uint32 StartTime;
489 uint32 ElapsedTime;
490 uint32 TimeoutTicks;
491
492 if (NULL_PTR != Config)
493 {
494 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE];
495 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX];
496 SelectorValue = Clock_Ip_au16SelectorEntryHardwareValue[Config->Value]; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
497
498 SelectorMask = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueMask;
499 SelectorShift = Clock_Ip_axFeatureExtensions[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_EXTENSION_INDEX]].SelectorValueShift;
500
501 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC |= (MC_CGM_MUX_CSC_CG_MASK | MC_CGM_MUX_CSC_FCG_MASK);
502
503 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
504 do
505 {
506 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
507 }
508 while ((MC_CGM_MUX_CSS_CS_TRANSPARENT == (Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CS_MASK)) && (FALSE == TimeoutOccurred));
509
510 if (FALSE == TimeoutOccurred)
511 {
512 /* Configure clock source. */
513 RegValue = Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC;
514 RegValue &= ~SelectorMask;
515 RegValue |= (SelectorValue << SelectorShift) & SelectorMask;
516 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC = RegValue;
517
518 /* Clear CG and FCG bit after set the SELCTL bit */
519 Clock_Ip_apxCgm[Instance][SelectorIndex]->CSC &= ~(MC_CGM_MUX_CSC_FCG_MASK | MC_CGM_MUX_CSC_CG_MASK);
520
521 Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
522 /* Wait until the output clock is ungated. */
523 do
524 {
525 TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
526 }
527 while (((Clock_Ip_apxCgm[Instance][SelectorIndex]->CSS & MC_CGM_MUX_CSS_CS_MASK) != MC_CGM_MUX_CSS_CS_TRANSPARENT) && (FALSE == TimeoutOccurred));
528
529 if (TRUE == TimeoutOccurred)
530 {
531 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_CLOCK_MUX_SWITCH_ERROR, Config->Name);
532 }
533 }
534 else
535 {
536 /* Report timeout error */
537 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name);
538 }
539 }
540 else
541 {
542 (void)Instance;
543 (void)SelectorIndex;
544 (void)SelectorValue;
545 (void)SelectorMask;
546 (void)SelectorShift;
547 (void)RegValue;
548 (void)TimeoutOccurred;
549 (void)StartTime;
550 (void)ElapsedTime;
551 (void)TimeoutTicks;
552 }
553 }
554 #endif
555
556 #ifdef CLOCK_IP_RTC_RTCC_CLKSELECT
Clock_Ip_SetRtcRtccClksel(Clock_Ip_SelectorConfigType const * Config)557 static void Clock_Ip_SetRtcRtccClksel(Clock_Ip_SelectorConfigType const *Config)
558 {
559 if (NULL_PTR != Config)
560 {
561 #ifdef CLOCK_IP_ENABLE_USER_MODE_SUPPORT
562 #if (STD_ON == CLOCK_IP_ENABLE_USER_MODE_SUPPORT)
563 OsIf_Trusted_Call1param(Clock_Ip_SetRtcRtccClksel_TrustedCall,(Config));
564 #else
565 Clock_Ip_SetRtcRtccClksel_TrustedCall(Config);
566 #endif
567 #endif /* CLOCK_IP_ENABLE_USER_MODE_SUPPORT */
568 }
569 }
570 #endif
571
572
573 /*==================================================================================================
574 * GLOBAL FUNCTIONS
575 ==================================================================================================*/
576 #ifdef CLOCK_IP_RTC_RTCC_CLKSELECT
Clock_Ip_SetRtcRtccClksel_TrustedCall(Clock_Ip_SelectorConfigType const * Config)577 void Clock_Ip_SetRtcRtccClksel_TrustedCall(Clock_Ip_SelectorConfigType const *Config)
578 {
579 uint32 RegValue;
580 uint32 SelectorValue = Clock_Ip_au16SelectorEntryRtcHardwareValue[Config->Value]; /* Hw value corresponding to selector entry. Translate input clock source to hardware value. */
581
582 RegValue = IP_RTC->RTCC;
583 RegValue &= ~RTC_RTCC_CLKSEL_MASK;
584 RegValue |= RTC_RTCC_CLKSEL(SelectorValue);
585 IP_RTC->RTCC = RegValue;
586 }
587 #endif
588
589 /* Clock stop section code */
590 #define MCU_STOP_SEC_CODE
591
592 #include "Mcu_MemMap.h"
593
594 /*==================================================================================================
595 * GLOBAL CONSTANTS
596 ==================================================================================================*/
597
598 /* Clock start constant section data */
599 #define MCU_START_SEC_CONST_UNSPECIFIED
600
601 #include "Mcu_MemMap.h"
602
603 const Clock_Ip_SelectorCallbackType Clock_Ip_axSelectorCallbacks[CLOCK_IP_SELECTOR_CALLBACKS_COUNT] =
604 {
605 {
606 Clock_Ip_CallbackSelectorEmpty, /* Reset */
607 Clock_Ip_CallbackSelectorEmpty, /* Set */
608 },
609 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_SWIP
610 {
611 Clock_Ip_ResetCgmXCscCssClkswSwip, /* Reset */
612 Clock_Ip_SetCgmXCscCssClkswSwip, /* Set */
613 },
614 #endif
615
616 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CLK_SW_RAMPDOWN_RAMPUP_SWIP
617 {
618 Clock_Ip_ResetCgmXCscCssClkswRampupRampdownSwip, /* Reset */
619 Clock_Ip_SetCgmXCscCssClkswRampupRampdownSwip, /* Set */
620 },
621 #endif
622
623 #ifdef CLOCK_IP_CGM_X_CSC_CSS_CS_GRIP
624 {
625 Clock_Ip_ResetCgmXCscCssCsGrip, /* Reset */
626 Clock_Ip_SetCgmXCscCssCsGrip, /* Set */
627 },
628 #endif
629
630 #ifdef CLOCK_IP_RTC_RTCC_CLKSELECT
631 {
632 Clock_Ip_CallbackSelectorEmpty, /* Reset */
633 Clock_Ip_SetRtcRtccClksel, /* Set */
634 },
635 #endif
636
637 };
638
639 /* Clock stop constant section data */
640 #define MCU_STOP_SEC_CONST_UNSPECIFIED
641
642 #include "Mcu_MemMap.h"
643
644
645
646 #ifdef __cplusplus
647 }
648 #endif
649
650 /** @} */
651
