1 /*
2  * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
3  * Copyright 2016-2022 NXP
4  * All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 #ifndef FSL_LPUART_H_
9 #define FSL_LPUART_H_
10 
11 #include "fsl_common.h"
12 
13 /*!
14  * @addtogroup lpuart_driver
15  * @{
16  */
17 
18 /*******************************************************************************
19  * Definitions
20  ******************************************************************************/
21 
22 /*! @name Driver version */
23 /*! @{ */
24 /*! @brief LPUART driver version. */
25 #define FSL_LPUART_DRIVER_VERSION (MAKE_VERSION(2, 7, 6))
26 /*! @} */
27 
28 /*! @brief Retry times for waiting flag. */
29 #ifndef UART_RETRY_TIMES
30 #define UART_RETRY_TIMES 0U /* Defining to zero means to keep waiting for the flag until it is assert/deassert. */
31 #endif
32 
33 /*! @brief Error codes for the LPUART driver. */
34 enum
35 {
36     kStatus_LPUART_TxBusy                  = MAKE_STATUS(kStatusGroup_LPUART, 0), /*!< TX busy */
37     kStatus_LPUART_RxBusy                  = MAKE_STATUS(kStatusGroup_LPUART, 1), /*!< RX busy */
38     kStatus_LPUART_TxIdle                  = MAKE_STATUS(kStatusGroup_LPUART, 2), /*!< LPUART transmitter is idle. */
39     kStatus_LPUART_RxIdle                  = MAKE_STATUS(kStatusGroup_LPUART, 3), /*!< LPUART receiver is idle. */
40     kStatus_LPUART_TxWatermarkTooLarge     = MAKE_STATUS(kStatusGroup_LPUART, 4), /*!< TX FIFO watermark too large  */
41     kStatus_LPUART_RxWatermarkTooLarge     = MAKE_STATUS(kStatusGroup_LPUART, 5), /*!< RX FIFO watermark too large  */
42     kStatus_LPUART_FlagCannotClearManually = MAKE_STATUS(kStatusGroup_LPUART, 6), /*!< Some flag can't manually clear */
43     kStatus_LPUART_Error                   = MAKE_STATUS(kStatusGroup_LPUART, 7), /*!< Error happens on LPUART. */
44     kStatus_LPUART_RxRingBufferOverrun =
45         MAKE_STATUS(kStatusGroup_LPUART, 8), /*!< LPUART RX software ring buffer overrun. */
46     kStatus_LPUART_RxHardwareOverrun = MAKE_STATUS(kStatusGroup_LPUART, 9),  /*!< LPUART RX receiver overrun. */
47     kStatus_LPUART_NoiseError        = MAKE_STATUS(kStatusGroup_LPUART, 10), /*!< LPUART noise error. */
48     kStatus_LPUART_FramingError      = MAKE_STATUS(kStatusGroup_LPUART, 11), /*!< LPUART framing error. */
49     kStatus_LPUART_ParityError       = MAKE_STATUS(kStatusGroup_LPUART, 12), /*!< LPUART parity error. */
50     kStatus_LPUART_BaudrateNotSupport =
51         MAKE_STATUS(kStatusGroup_LPUART, 13), /*!< Baudrate is not support in current clock source */
52     kStatus_LPUART_IdleLineDetected = MAKE_STATUS(kStatusGroup_LPUART, 14), /*!< IDLE flag. */
53     kStatus_LPUART_Timeout          = MAKE_STATUS(kStatusGroup_LPUART, 15), /*!< LPUART times out. */
54 };
55 
56 /*! @brief LPUART parity mode. */
57 typedef enum _lpuart_parity_mode
58 {
59     kLPUART_ParityDisabled = 0x0U, /*!< Parity disabled */
60     kLPUART_ParityEven     = 0x2U, /*!< Parity enabled, type even, bit setting: PE|PT = 10 */
61     kLPUART_ParityOdd      = 0x3U, /*!< Parity enabled, type odd,  bit setting: PE|PT = 11 */
62 } lpuart_parity_mode_t;
63 
64 /*! @brief LPUART data bits count. */
65 typedef enum _lpuart_data_bits
66 {
67     kLPUART_EightDataBits = 0x0U, /*!< Eight data bit */
68 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
69     kLPUART_SevenDataBits = 0x1U, /*!< Seven data bit */
70 #endif
71 } lpuart_data_bits_t;
72 
73 /*! @brief LPUART stop bit count. */
74 typedef enum _lpuart_stop_bit_count
75 {
76     kLPUART_OneStopBit = 0U, /*!< One stop bit */
77     kLPUART_TwoStopBit = 1U, /*!< Two stop bits */
78 } lpuart_stop_bit_count_t;
79 
80 #if defined(FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) && FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT
81 /*! @brief LPUART transmit CTS source. */
82 typedef enum _lpuart_transmit_cts_source
83 {
84     kLPUART_CtsSourcePin         = 0U, /*!< CTS resource is the LPUART_CTS pin. */
85     kLPUART_CtsSourceMatchResult = 1U, /*!< CTS resource is the match result. */
86 } lpuart_transmit_cts_source_t;
87 
88 /*! @brief LPUART transmit CTS configure. */
89 typedef enum _lpuart_transmit_cts_config
90 {
91     kLPUART_CtsSampleAtStart = 0U, /*!< CTS input is sampled at the start of each character. */
92     kLPUART_CtsSampleAtIdle  = 1U, /*!< CTS input is sampled when the transmitter is idle */
93 } lpuart_transmit_cts_config_t;
94 #endif
95 
96 /*! @brief LPUART idle flag type defines when the receiver starts counting. */
97 typedef enum _lpuart_idle_type_select
98 {
99     kLPUART_IdleTypeStartBit = 0U, /*!< Start counting after a valid start bit. */
100     kLPUART_IdleTypeStopBit  = 1U, /*!< Start counting after a stop bit. */
101 } lpuart_idle_type_select_t;
102 
103 /*! @brief LPUART idle detected configuration.
104  *  This structure defines the number of idle characters that must be received before
105  *  the IDLE flag is set.
106  */
107 typedef enum _lpuart_idle_config
108 {
109     kLPUART_IdleCharacter1   = 0U, /*!< the number of idle characters. */
110     kLPUART_IdleCharacter2   = 1U, /*!< the number of idle characters. */
111     kLPUART_IdleCharacter4   = 2U, /*!< the number of idle characters. */
112     kLPUART_IdleCharacter8   = 3U, /*!< the number of idle characters. */
113     kLPUART_IdleCharacter16  = 4U, /*!< the number of idle characters. */
114     kLPUART_IdleCharacter32  = 5U, /*!< the number of idle characters. */
115     kLPUART_IdleCharacter64  = 6U, /*!< the number of idle characters. */
116     kLPUART_IdleCharacter128 = 7U, /*!< the number of idle characters. */
117 } lpuart_idle_config_t;
118 
119 /*!
120  * @brief LPUART interrupt configuration structure, default settings all disabled.
121  *
122  * This structure contains the settings for all LPUART interrupt configurations.
123  */
124 enum _lpuart_interrupt_enable
125 {
126 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
127     kLPUART_LinBreakInterruptEnable = (LPUART_BAUD_LBKDIE_MASK >> 8U), /*!< LIN break detect. bit 7 */
128 #endif
129     kLPUART_RxActiveEdgeInterruptEnable         = (LPUART_BAUD_RXEDGIE_MASK >> 8U), /*!< Receive Active Edge. bit 6 */
130     kLPUART_TxDataRegEmptyInterruptEnable       = (LPUART_CTRL_TIE_MASK),  /*!< Transmit data register empty. bit 23 */
131     kLPUART_TransmissionCompleteInterruptEnable = (LPUART_CTRL_TCIE_MASK), /*!< Transmission complete. bit 22 */
132     kLPUART_RxDataRegFullInterruptEnable        = (LPUART_CTRL_RIE_MASK),  /*!< Receiver data register full. bit 21 */
133     kLPUART_IdleLineInterruptEnable             = (LPUART_CTRL_ILIE_MASK), /*!< Idle line. bit 20 */
134     kLPUART_RxOverrunInterruptEnable            = (LPUART_CTRL_ORIE_MASK), /*!< Receiver Overrun. bit 27 */
135     kLPUART_NoiseErrorInterruptEnable           = (LPUART_CTRL_NEIE_MASK), /*!< Noise error flag. bit 26 */
136     kLPUART_FramingErrorInterruptEnable         = (LPUART_CTRL_FEIE_MASK), /*!< Framing error flag. bit 25 */
137     kLPUART_ParityErrorInterruptEnable          = (LPUART_CTRL_PEIE_MASK), /*!< Parity error flag. bit 24 */
138 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
139     kLPUART_Match1InterruptEnable = (LPUART_CTRL_MA1IE_MASK), /*!< Parity error flag. bit 15 */
140     kLPUART_Match2InterruptEnable = (LPUART_CTRL_MA2IE_MASK), /*!< Parity error flag. bit 14 */
141 #endif
142 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
143     kLPUART_TxFifoOverflowInterruptEnable  = (LPUART_FIFO_TXOFE_MASK), /*!< Transmit FIFO Overflow. bit 9 */
144     kLPUART_RxFifoUnderflowInterruptEnable = (LPUART_FIFO_RXUFE_MASK), /*!< Receive FIFO Underflow. bit 8 */
145 #endif
146 
147     kLPUART_AllInterruptEnable = kLPUART_RxActiveEdgeInterruptEnable | kLPUART_TxDataRegEmptyInterruptEnable |
148                                  kLPUART_TransmissionCompleteInterruptEnable | kLPUART_RxDataRegFullInterruptEnable |
149                                  kLPUART_IdleLineInterruptEnable | kLPUART_RxOverrunInterruptEnable |
150                                  kLPUART_NoiseErrorInterruptEnable | kLPUART_FramingErrorInterruptEnable |
151                                  kLPUART_ParityErrorInterruptEnable
152 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
153                                  | kLPUART_LinBreakInterruptEnable
154 #endif
155 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
156                                  | kLPUART_Match1InterruptEnable | kLPUART_Match2InterruptEnable
157 #endif
158 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
159                                  | kLPUART_TxFifoOverflowInterruptEnable | kLPUART_RxFifoUnderflowInterruptEnable
160 #endif
161     ,
162 };
163 
164 /*!
165  * @brief LPUART status flags.
166  *
167  * This provides constants for the LPUART status flags for use in the LPUART functions.
168  */
169 enum _lpuart_flags
170 {
171     kLPUART_TxDataRegEmptyFlag =
172         (LPUART_STAT_TDRE_MASK), /*!< Transmit data register empty flag, sets when transmit buffer is empty. bit 23 */
173     kLPUART_TransmissionCompleteFlag =
174         (LPUART_STAT_TC_MASK), /*!< Transmission complete flag, sets when transmission activity complete. bit 22 */
175     kLPUART_RxDataRegFullFlag = (LPUART_STAT_RDRF_MASK), /*!< Receive data register full flag, sets when the receive
176                                                             data buffer is full. bit 21 */
177     kLPUART_IdleLineFlag  = (LPUART_STAT_IDLE_MASK), /*!< Idle line detect flag, sets when idle line detected. bit 20 */
178     kLPUART_RxOverrunFlag = (LPUART_STAT_OR_MASK),   /*!< Receive Overrun, sets when new data is received before data is
179                                                         read from receive register. bit 19 */
180     kLPUART_NoiseErrorFlag = (LPUART_STAT_NF_MASK),  /*!< Receive takes 3 samples of each received bit.  If any of these
181                                                         samples differ, noise flag sets. bit 18 */
182     kLPUART_FramingErrorFlag =
183         (LPUART_STAT_FE_MASK), /*!< Frame error flag, sets if logic 0 was detected where stop bit expected. bit 17 */
184     kLPUART_ParityErrorFlag = (LPUART_STAT_PF_MASK), /*!< If parity enabled, sets upon parity error detection. bit 16 */
185 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
186     kLPUART_LinBreakFlag = (LPUART_STAT_LBKDIF_MASK), /*!< LIN break detect interrupt flag, sets when LIN break
187                                                          char detected and LIN circuit enabled. bit 31 */
188 #endif
189     kLPUART_RxActiveEdgeFlag = (LPUART_STAT_RXEDGIF_MASK), /*!< Receive pin active edge interrupt flag, sets when active
190                                                               edge detected. bit 30 */
191     kLPUART_RxActiveFlag =
192         (LPUART_STAT_RAF_MASK), /*!< Receiver Active Flag (RAF), sets at beginning of valid start. bit 24 */
193 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
194     kLPUART_DataMatch1Flag =
195         LPUART_STAT_MA1F_MASK, /*!< The next character to be read from LPUART_DATA matches MA1. bit 15 */
196     kLPUART_DataMatch2Flag =
197         LPUART_STAT_MA2F_MASK, /*!< The next character to be read from LPUART_DATA matches MA2. bit 14 */
198 #endif
199 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
200     kLPUART_TxFifoEmptyFlag =
201         (LPUART_FIFO_TXEMPT_MASK >> 16), /*!< TXEMPT bit, sets if transmit buffer is empty. bit 7 */
202     kLPUART_RxFifoEmptyFlag =
203         (LPUART_FIFO_RXEMPT_MASK >> 16), /*!< RXEMPT bit, sets if receive buffer is empty. bit 6 */
204     kLPUART_TxFifoOverflowFlag =
205         (LPUART_FIFO_TXOF_MASK >> 16), /*!< TXOF bit, sets if transmit buffer overflow occurred. bit 1 */
206     kLPUART_RxFifoUnderflowFlag =
207         (LPUART_FIFO_RXUF_MASK >> 16), /*!< RXUF bit, sets if receive buffer underflow occurred. bit 0 */
208 #endif
209 
210     kLPUART_AllClearFlags = kLPUART_RxActiveEdgeFlag | kLPUART_IdleLineFlag | kLPUART_RxOverrunFlag |
211                             kLPUART_NoiseErrorFlag | kLPUART_FramingErrorFlag | kLPUART_ParityErrorFlag
212 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
213                             | kLPUART_DataMatch1Flag | kLPUART_DataMatch2Flag
214 #endif
215 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
216                             | kLPUART_TxFifoOverflowFlag | kLPUART_RxFifoUnderflowFlag
217 #endif
218 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
219                             | kLPUART_LinBreakFlag
220 #endif
221     ,
222 
223     kLPUART_AllFlags =
224         kLPUART_RxActiveEdgeFlag | kLPUART_IdleLineFlag | kLPUART_RxOverrunFlag | kLPUART_TxDataRegEmptyFlag |
225         kLPUART_TransmissionCompleteFlag | kLPUART_RxDataRegFullFlag | kLPUART_RxActiveFlag | kLPUART_NoiseErrorFlag |
226         kLPUART_FramingErrorFlag | kLPUART_ParityErrorFlag
227 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
228         | kLPUART_DataMatch1Flag | kLPUART_DataMatch2Flag
229 #endif
230 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
231         | kLPUART_TxFifoOverflowFlag | kLPUART_RxFifoUnderflowFlag | kLPUART_TxFifoEmptyFlag | kLPUART_RxFifoEmptyFlag
232 #endif
233 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
234         | kLPUART_LinBreakFlag
235 #endif
236     ,
237 };
238 
239 /*! @brief LPUART configuration structure. */
240 typedef struct _lpuart_config
241 {
242     uint32_t baudRate_Bps;            /*!< LPUART baud rate  */
243     lpuart_parity_mode_t parityMode;  /*!< Parity mode, disabled (default), even, odd */
244     lpuart_data_bits_t dataBitsCount; /*!< Data bits count, eight (default), seven */
245     bool isMsb;                       /*!< Data bits order, LSB (default), MSB */
246 #if defined(FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT
247     lpuart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits  */
248 #endif
249 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
250     uint8_t txFifoWatermark; /*!< TX FIFO watermark */
251     uint8_t rxFifoWatermark; /*!< RX FIFO watermark */
252 #endif
253 #if defined(FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) && FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT
254     bool enableRxRTS;                         /*!< RX RTS enable */
255     bool enableTxCTS;                         /*!< TX CTS enable */
256     lpuart_transmit_cts_source_t txCtsSource; /*!< TX CTS source */
257     lpuart_transmit_cts_config_t txCtsConfig; /*!< TX CTS configure */
258 #endif
259     lpuart_idle_type_select_t rxIdleType; /*!< RX IDLE type. */
260     lpuart_idle_config_t rxIdleConfig;    /*!< RX IDLE configuration. */
261     bool enableTx;                        /*!< Enable TX */
262     bool enableRx;                        /*!< Enable RX */
263 } lpuart_config_t;
264 
265 /*! @brief LPUART transfer structure. */
266 typedef struct _lpuart_transfer
267 {
268     /*
269      * Use separate TX and RX data pointer, because TX data is const data.
270      * The member data is kept for backward compatibility.
271      */
272     union
273     {
274         uint8_t *data;         /*!< The buffer of data to be transfer.*/
275         uint8_t *rxData;       /*!< The buffer to receive data. */
276         const uint8_t *txData; /*!< The buffer of data to be sent. */
277     };
278     size_t dataSize; /*!< The byte count to be transfer. */
279 } lpuart_transfer_t;
280 
281 /* Forward declaration of the handle typedef. */
282 typedef struct _lpuart_handle lpuart_handle_t;
283 
284 /*! @brief LPUART transfer callback function. */
285 typedef void (*lpuart_transfer_callback_t)(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *userData);
286 
287 /*! @brief LPUART handle structure. */
288 struct _lpuart_handle
289 {
290     const uint8_t *volatile txData; /*!< Address of remaining data to send. */
291     volatile size_t txDataSize;     /*!< Size of the remaining data to send. */
292     size_t txDataSizeAll;           /*!< Size of the data to send out. */
293     uint8_t *volatile rxData;       /*!< Address of remaining data to receive. */
294     volatile size_t rxDataSize;     /*!< Size of the remaining data to receive. */
295     size_t rxDataSizeAll;           /*!< Size of the data to receive. */
296 
297     uint8_t *rxRingBuffer;              /*!< Start address of the receiver ring buffer. */
298     size_t rxRingBufferSize;            /*!< Size of the ring buffer. */
299     volatile uint16_t rxRingBufferHead; /*!< Index for the driver to store received data into ring buffer. */
300     volatile uint16_t rxRingBufferTail; /*!< Index for the user to get data from the ring buffer. */
301 
302     lpuart_transfer_callback_t callback; /*!< Callback function. */
303     void *userData;                      /*!< LPUART callback function parameter.*/
304 
305     volatile uint8_t txState; /*!< TX transfer state. */
306     volatile uint8_t rxState; /*!< RX transfer state. */
307 
308 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
309     bool isSevenDataBits; /*!< Seven data bits flag. */
310 #endif
311 };
312 
313 /* Typedef for interrupt handler. */
314 typedef void (*lpuart_isr_t)(LPUART_Type *base, void *handle);
315 
316 /*******************************************************************************
317  * Variables
318  ******************************************************************************/
319 /* Array of LPUART handle. */
320 extern void *s_lpuartHandle[];
321 
322 /* Array of LPUART IRQ number. */
323 #if defined(FSL_FEATURE_LPUART_HAS_SEPARATE_RX_TX_IRQ) && FSL_FEATURE_LPUART_HAS_SEPARATE_RX_TX_IRQ
324 extern const IRQn_Type s_lpuartTxIRQ[];
325 #else
326 extern const IRQn_Type s_lpuartIRQ[];
327 #endif
328 
329 /* LPUART ISR for transactional APIs. */
330 extern lpuart_isr_t s_lpuartIsr[];
331 
332 /*******************************************************************************
333  * API
334  ******************************************************************************/
335 
336 #if defined(__cplusplus)
337 extern "C" {
338 #endif /* _cplusplus */
339 
340 #if defined(FSL_FEATURE_LPUART_HAS_GLOBAL) && FSL_FEATURE_LPUART_HAS_GLOBAL
341 
342 /*!
343  * @name Software Reset
344  * @{
345  */
346 
347 /*!
348  * @brief Resets the LPUART using software.
349  *
350  * This function resets all internal logic and registers except the Global Register.
351  * Remains set until cleared by software.
352  *
353  * @param base LPUART peripheral base address.
354  */
LPUART_SoftwareReset(LPUART_Type * base)355 static inline void LPUART_SoftwareReset(LPUART_Type *base)
356 {
357     base->GLOBAL |= LPUART_GLOBAL_RST_MASK;
358     base->GLOBAL &= ~LPUART_GLOBAL_RST_MASK;
359 }
360 /*! @} */
361 #endif /*FSL_FEATURE_LPUART_HAS_GLOBAL*/
362 
363 /*!
364  * @name Initialization and deinitialization
365  * @{
366  */
367 
368 /*!
369  * @brief Initializes an LPUART instance with the user configuration structure and the peripheral clock.
370  *
371  * This function configures the LPUART module with user-defined settings. Call the LPUART_GetDefaultConfig() function
372  * to configure the configuration structure and get the default configuration.
373  * The example below shows how to use this API to configure the LPUART.
374  * @code
375  *  lpuart_config_t lpuartConfig;
376  *  lpuartConfig.baudRate_Bps = 115200U;
377  *  lpuartConfig.parityMode = kLPUART_ParityDisabled;
378  *  lpuartConfig.dataBitsCount = kLPUART_EightDataBits;
379  *  lpuartConfig.isMsb = false;
380  *  lpuartConfig.stopBitCount = kLPUART_OneStopBit;
381  *  lpuartConfig.txFifoWatermark = 0;
382  *  lpuartConfig.rxFifoWatermark = 1;
383  *  LPUART_Init(LPUART1, &lpuartConfig, 20000000U);
384  * @endcode
385  *
386  * @param base LPUART peripheral base address.
387  * @param config Pointer to a user-defined configuration structure.
388  * @param srcClock_Hz LPUART clock source frequency in HZ.
389  * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not support in current clock source.
390  * @retval kStatus_Success LPUART initialize succeed
391  */
392 status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz);
393 
394 /*!
395  * @brief Deinitializes a LPUART instance.
396  *
397  * This function waits for transmit to complete, disables TX and RX, and disables the LPUART clock.
398  *
399  * @param base LPUART peripheral base address.
400  */
401 void LPUART_Deinit(LPUART_Type *base);
402 
403 /*!
404  * @brief Gets the default configuration structure.
405  *
406  * This function initializes the LPUART configuration structure to a default value. The default
407  * values are:
408  *   lpuartConfig->baudRate_Bps = 115200U;
409  *   lpuartConfig->parityMode = kLPUART_ParityDisabled;
410  *   lpuartConfig->dataBitsCount = kLPUART_EightDataBits;
411  *   lpuartConfig->isMsb = false;
412  *   lpuartConfig->stopBitCount = kLPUART_OneStopBit;
413  *   lpuartConfig->txFifoWatermark = 0;
414  *   lpuartConfig->rxFifoWatermark = 1;
415  *   lpuartConfig->rxIdleType = kLPUART_IdleTypeStartBit;
416  *   lpuartConfig->rxIdleConfig = kLPUART_IdleCharacter1;
417  *   lpuartConfig->enableTx = false;
418  *   lpuartConfig->enableRx = false;
419  *
420  * @param config Pointer to a configuration structure.
421  */
422 void LPUART_GetDefaultConfig(lpuart_config_t *config);
423 /*! @} */
424 
425 /*!
426  * @name Module configuration
427  * @{
428  */
429 /*!
430  * @brief Sets the LPUART instance baudrate.
431  *
432  * This function configures the LPUART module baudrate. This function is used to update
433  * the LPUART module baudrate after the LPUART module is initialized by the LPUART_Init.
434  * @code
435  *  LPUART_SetBaudRate(LPUART1, 115200U, 20000000U);
436  * @endcode
437  *
438  * @param base LPUART peripheral base address.
439  * @param baudRate_Bps LPUART baudrate to be set.
440  * @param srcClock_Hz LPUART clock source frequency in HZ.
441  * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not supported in the current clock source.
442  * @retval kStatus_Success Set baudrate succeeded.
443  */
444 status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
445 
446 /*!
447  * @brief Enable 9-bit data mode for LPUART.
448  *
449  * This function set the 9-bit mode for LPUART module. The 9th bit is not used for parity thus can be modified by user.
450  *
451  * @param base LPUART peripheral base address.
452  * @param enable true to enable, flase to disable.
453  */
454 void LPUART_Enable9bitMode(LPUART_Type *base, bool enable);
455 
456 /*!
457  * @brief Set the LPUART address.
458  *
459  * This function configures the address for LPUART module that works as slave in 9-bit data mode. One or two address
460  * fields can be configured. When the address field's match enable bit is set, the frame it receices with MSB being
461  * 1 is considered as an address frame, otherwise it is considered as data frame. Once the address frame matches one
462  * of slave's own addresses, this slave is addressed. This address frame and its following data frames are stored in
463  * the receive buffer, otherwise the frames will be discarded. To un-address a slave, just send an address frame with
464  * unmatched address.
465  *
466  * @note Any LPUART instance joined in the multi-slave system can work as slave. The position of the address mark is the
467  * same as the parity bit when parity is enabled for 8 bit and 9 bit data formats.
468  *
469  * @param base LPUART peripheral base address.
470  * @param address1 LPUART slave address1.
471  * @param address2 LPUART slave address2.
472  */
LPUART_SetMatchAddress(LPUART_Type * base,uint16_t address1,uint16_t address2)473 static inline void LPUART_SetMatchAddress(LPUART_Type *base, uint16_t address1, uint16_t address2)
474 {
475     /* Configure match address. */
476     uint32_t address = ((uint32_t)address2 << 16U) | (uint32_t)address1 | 0x1000100UL;
477     base->MATCH      = address;
478 }
479 
480 /*!
481  * @brief Enable the LPUART match address feature.
482  *
483  * @param base LPUART peripheral base address.
484  * @param match1 true to enable match address1, false to disable.
485  * @param match2 true to enable match address2, false to disable.
486  */
LPUART_EnableMatchAddress(LPUART_Type * base,bool match1,bool match2)487 static inline void LPUART_EnableMatchAddress(LPUART_Type *base, bool match1, bool match2)
488 {
489     /* Configure match address1 enable bit. */
490     if (match1)
491     {
492         base->BAUD |= (uint32_t)LPUART_BAUD_MAEN1_MASK;
493     }
494     else
495     {
496         base->BAUD &= ~(uint32_t)LPUART_BAUD_MAEN1_MASK;
497     }
498     /* Configure match address2 enable bit. */
499     if (match2)
500     {
501         base->BAUD |= (uint32_t)LPUART_BAUD_MAEN2_MASK;
502     }
503     else
504     {
505         base->BAUD &= ~(uint32_t)LPUART_BAUD_MAEN2_MASK;
506     }
507 }
508 
509 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
510 /*!
511  * @brief Sets the rx FIFO watermark.
512  *
513  * @param base LPUART peripheral base address.
514  * @param water Rx FIFO watermark.
515  */
LPUART_SetRxFifoWatermark(LPUART_Type * base,uint8_t water)516 static inline void LPUART_SetRxFifoWatermark(LPUART_Type *base, uint8_t water)
517 {
518     assert((uint8_t)FSL_FEATURE_LPUART_FIFO_SIZEn(base) > water);
519     base->WATER = (base->WATER & ~LPUART_WATER_RXWATER_MASK) | LPUART_WATER_RXWATER(water);
520 }
521 
522 /*!
523  * @brief Sets the tx FIFO watermark.
524  *
525  * @param base LPUART peripheral base address.
526  * @param water Tx FIFO watermark.
527  */
LPUART_SetTxFifoWatermark(LPUART_Type * base,uint8_t water)528 static inline void LPUART_SetTxFifoWatermark(LPUART_Type *base, uint8_t water)
529 {
530     assert((uint8_t)FSL_FEATURE_LPUART_FIFO_SIZEn(base) > water);
531     base->WATER = (base->WATER & ~LPUART_WATER_TXWATER_MASK) | LPUART_WATER_TXWATER(water);
532 }
533 #endif
534 /*! @} */
535 
536 /*!
537  * @name Status
538  * @{
539  */
540 
541 /*!
542  * @brief Gets LPUART status flags.
543  *
544  * This function gets all LPUART status flags. The flags are returned as the logical
545  * OR value of the enumerators @ref _lpuart_flags. To check for a specific status,
546  * compare the return value with enumerators in the @ref _lpuart_flags.
547  * For example, to check whether the TX is empty:
548  * @code
549  *     if (kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(LPUART1))
550  *     {
551  *         ...
552  *     }
553  * @endcode
554  *
555  * @param base LPUART peripheral base address.
556  * @return LPUART status flags which are ORed by the enumerators in the _lpuart_flags.
557  */
558 uint32_t LPUART_GetStatusFlags(LPUART_Type *base);
559 
560 /*!
561  * @brief Clears status flags with a provided mask.
562  *
563  * This function clears LPUART status flags with a provided mask. Automatically cleared flags
564  * can't be cleared by this function.
565  * Flags that can only cleared or set by hardware are:
566  *    kLPUART_TxDataRegEmptyFlag, kLPUART_TransmissionCompleteFlag, kLPUART_RxDataRegFullFlag,
567  *    kLPUART_RxActiveFlag, kLPUART_NoiseErrorFlag, kLPUART_ParityErrorFlag,
568  *    kLPUART_TxFifoEmptyFlag,kLPUART_RxFifoEmptyFlag
569  * Note: This API should be called when the Tx/Rx is idle, otherwise it takes no effects.
570  *
571  * @param base LPUART peripheral base address.
572  * @param mask the status flags to be cleared. The user can use the enumerators in the
573  *  _lpuart_status_flag_t to do the OR operation and get the mask.
574  * @return 0 succeed, others failed.
575  * @retval kStatus_LPUART_FlagCannotClearManually The flag can't be cleared by this function but
576  *         it is cleared automatically by hardware.
577  * @retval kStatus_Success Status in the mask are cleared.
578  */
579 status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask);
580 /*! @} */
581 
582 /*!
583  * @name Interrupts
584  * @{
585  */
586 
587 /*!
588  * @brief Enables LPUART interrupts according to a provided mask.
589  *
590  * This function enables the LPUART interrupts according to a provided mask. The mask
591  * is a logical OR of enumeration members. See the @ref _lpuart_interrupt_enable.
592  * This examples shows how to enable TX empty interrupt and RX full interrupt:
593  * @code
594  *     LPUART_EnableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);
595  * @endcode
596  *
597  * @param base LPUART peripheral base address.
598  * @param mask The interrupts to enable. Logical OR of @ref _lpuart_interrupt_enable.
599  */
600 void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask);
601 
602 /*!
603  * @brief Disables  LPUART interrupts according to a provided mask.
604  *
605  * This function disables the LPUART interrupts according to a provided mask. The mask
606  * is a logical OR of enumeration members. See @ref _lpuart_interrupt_enable.
607  * This example shows how to disable the TX empty interrupt and RX full interrupt:
608  * @code
609  *     LPUART_DisableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);
610  * @endcode
611  *
612  * @param base LPUART peripheral base address.
613  * @param mask The interrupts to disable. Logical OR of @ref _lpuart_interrupt_enable.
614  */
615 void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask);
616 
617 /*!
618  * @brief Gets enabled LPUART interrupts.
619  *
620  * This function gets the enabled LPUART interrupts. The enabled interrupts are returned
621  * as the logical OR value of the enumerators @ref _lpuart_interrupt_enable. To check
622  * a specific interrupt enable status, compare the return value with enumerators
623  * in @ref _lpuart_interrupt_enable.
624  * For example, to check whether the TX empty interrupt is enabled:
625  * @code
626  *     uint32_t enabledInterrupts = LPUART_GetEnabledInterrupts(LPUART1);
627  *
628  *     if (kLPUART_TxDataRegEmptyInterruptEnable & enabledInterrupts)
629  *     {
630  *         ...
631  *     }
632  * @endcode
633  *
634  * @param base LPUART peripheral base address.
635  * @return LPUART interrupt flags which are logical OR of the enumerators in @ref _lpuart_interrupt_enable.
636  */
637 uint32_t LPUART_GetEnabledInterrupts(LPUART_Type *base);
638 /*! @} */
639 
640 #if defined(FSL_FEATURE_LPUART_HAS_DMA_ENABLE) && FSL_FEATURE_LPUART_HAS_DMA_ENABLE
641 /*!
642  * @name DMA Configuration
643  * @{
644  */
645 /*!
646  * @brief Gets the LPUART data register address.
647  *
648  * This function returns the LPUART data register address, which is mainly used by the DMA/eDMA.
649  *
650  * @param base LPUART peripheral base address.
651  * @return LPUART data register addresses which are used both by the transmitter and receiver.
652  */
LPUART_GetDataRegisterAddress(LPUART_Type * base)653 static inline uintptr_t LPUART_GetDataRegisterAddress(LPUART_Type *base)
654 {
655     return (uintptr_t) & (base->DATA);
656 }
657 
658 /*!
659  * @brief Enables or disables the LPUART transmitter DMA request.
660  *
661  * This function enables or disables the transmit data register empty flag, STAT[TDRE], to generate DMA requests.
662  *
663  * @param base LPUART peripheral base address.
664  * @param enable True to enable, false to disable.
665  */
LPUART_EnableTxDMA(LPUART_Type * base,bool enable)666 static inline void LPUART_EnableTxDMA(LPUART_Type *base, bool enable)
667 {
668     if (enable)
669     {
670         base->BAUD |= LPUART_BAUD_TDMAE_MASK;
671     }
672     else
673     {
674         base->BAUD &= ~LPUART_BAUD_TDMAE_MASK;
675     }
676 }
677 
678 /*!
679  * @brief Enables or disables the LPUART receiver DMA.
680  *
681  * This function enables or disables the receiver data register full flag, STAT[RDRF], to generate DMA requests.
682  *
683  * @param base LPUART peripheral base address.
684  * @param enable True to enable, false to disable.
685  */
LPUART_EnableRxDMA(LPUART_Type * base,bool enable)686 static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable)
687 {
688     if (enable)
689     {
690         base->BAUD |= LPUART_BAUD_RDMAE_MASK;
691     }
692     else
693     {
694         base->BAUD &= ~LPUART_BAUD_RDMAE_MASK;
695     }
696 }
697 /*! @} */
698 #endif /* FSL_FEATURE_LPUART_HAS_DMA_ENABLE */
699 
700 /*!
701  * @name Bus Operations
702  * @{
703  */
704 
705 /*!
706  * @brief Get the LPUART instance from peripheral base address.
707  *
708  * @param base LPUART peripheral base address.
709  * @return LPUART instance.
710  */
711 uint32_t LPUART_GetInstance(LPUART_Type *base);
712 
713 /*!
714  * @brief Enables or disables the LPUART transmitter.
715  *
716  * This function enables or disables the LPUART transmitter.
717  *
718  * @param base LPUART peripheral base address.
719  * @param enable True to enable, false to disable.
720  */
LPUART_EnableTx(LPUART_Type * base,bool enable)721 static inline void LPUART_EnableTx(LPUART_Type *base, bool enable)
722 {
723     if (enable)
724     {
725         base->CTRL |= LPUART_CTRL_TE_MASK;
726     }
727     else
728     {
729         base->CTRL &= ~LPUART_CTRL_TE_MASK;
730     }
731 }
732 
733 /*!
734  * @brief Enables or disables the LPUART receiver.
735  *
736  * This function enables or disables the LPUART receiver.
737  *
738  * @param base LPUART peripheral base address.
739  * @param enable True to enable, false to disable.
740  */
LPUART_EnableRx(LPUART_Type * base,bool enable)741 static inline void LPUART_EnableRx(LPUART_Type *base, bool enable)
742 {
743     if (enable)
744     {
745         base->CTRL |= LPUART_CTRL_RE_MASK;
746     }
747     else
748     {
749         base->CTRL &= ~LPUART_CTRL_RE_MASK;
750     }
751 }
752 
753 /*!
754  * @brief Writes to the transmitter register.
755  *
756  * This function writes data to the transmitter register directly. The upper layer must
757  * ensure that the TX register is empty or that the TX FIFO has room before calling this function.
758  *
759  * @param base LPUART peripheral base address.
760  * @param data Data write to the TX register.
761  */
LPUART_WriteByte(LPUART_Type * base,uint8_t data)762 static inline void LPUART_WriteByte(LPUART_Type *base, uint8_t data)
763 {
764     base->DATA = data;
765 }
766 
767 /*!
768  * @brief Reads the receiver register.
769  *
770  * This function reads data from the receiver register directly. The upper layer must
771  * ensure that the receiver register is full or that the RX FIFO has data before calling this function.
772  *
773  * @param base LPUART peripheral base address.
774  * @return Data read from data register.
775  */
LPUART_ReadByte(LPUART_Type * base)776 static inline uint8_t LPUART_ReadByte(LPUART_Type *base)
777 {
778 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
779     uint32_t ctrl = base->CTRL;
780     uint8_t result;
781     /*
782      * $Branch Coverage Justification$
783      * (ctrl & LPUART_CTRL_M7_MASK) == 0U) false is not covered.
784      * If ctrl & LPUART_CTRL_M7_MASK is 0, it can't be !0 in next judge.
785      */
786     bool isSevenDataBits = (((ctrl & LPUART_CTRL_M7_MASK) != 0U) ||
787                             (((ctrl & LPUART_CTRL_M7_MASK) == 0U) && ((ctrl & LPUART_CTRL_M_MASK) == 0U) &&
788                              ((ctrl & LPUART_CTRL_PE_MASK) != 0U)));
789 
790     if (isSevenDataBits)
791     {
792         result = (uint8_t)(base->DATA & 0x7FU);
793     }
794     else
795     {
796         result = (uint8_t)base->DATA;
797     }
798 
799     return result;
800 #else
801     return (uint8_t)(base->DATA);
802 #endif
803 }
804 
805 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
806 /*!
807  * @brief Gets the rx FIFO data count.
808  *
809  * @param base LPUART peripheral base address.
810  * @return rx FIFO data count.
811  */
LPUART_GetRxFifoCount(LPUART_Type * base)812 static inline uint8_t LPUART_GetRxFifoCount(LPUART_Type *base)
813 {
814     return (uint8_t)((base->WATER & LPUART_WATER_RXCOUNT_MASK) >> LPUART_WATER_RXCOUNT_SHIFT);
815 }
816 
817 /*!
818  * @brief Gets the tx FIFO data count.
819  *
820  * @param base LPUART peripheral base address.
821  * @return tx FIFO data count.
822  */
LPUART_GetTxFifoCount(LPUART_Type * base)823 static inline uint8_t LPUART_GetTxFifoCount(LPUART_Type *base)
824 {
825     return (uint8_t)((base->WATER & LPUART_WATER_TXCOUNT_MASK) >> LPUART_WATER_TXCOUNT_SHIFT);
826 }
827 #endif
828 
829 /*!
830  * @brief Transmit an address frame in 9-bit data mode.
831  *
832  * @param base LPUART peripheral base address.
833  * @param address LPUART slave address.
834  */
835 void LPUART_SendAddress(LPUART_Type *base, uint8_t address);
836 
837 /*!
838  * @brief Writes to the transmitter register using a blocking method.
839  *
840  * This function polls the transmitter register, first waits for the register to be empty or TX FIFO to have room,
841  * and writes data to the transmitter buffer, then waits for the dat to be sent out to the bus.
842  *
843  * @param base LPUART peripheral base address.
844  * @param data Start address of the data to write.
845  * @param length Size of the data to write.
846  * @retval kStatus_LPUART_Timeout Transmission timed out and was aborted.
847  * @retval kStatus_Success Successfully wrote all data.
848  */
849 status_t LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length);
850 
851 /*!
852  * @brief Reads the receiver data register using a blocking method.
853  *
854  * This function polls the receiver register, waits for the receiver register full or receiver FIFO
855  * has data, and reads data from the TX register.
856  *
857  * @param base LPUART peripheral base address.
858  * @param data Start address of the buffer to store the received data.
859  * @param length Size of the buffer.
860  * @retval kStatus_LPUART_RxHardwareOverrun Receiver overrun happened while receiving data.
861  * @retval kStatus_LPUART_NoiseError Noise error happened while receiving data.
862  * @retval kStatus_LPUART_FramingError Framing error happened while receiving data.
863  * @retval kStatus_LPUART_ParityError Parity error happened while receiving data.
864  * @retval kStatus_LPUART_Timeout Transmission timed out and was aborted.
865  * @retval kStatus_Success Successfully received all data.
866  */
867 status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length);
868 
869 /*! @} */
870 
871 /*!
872  * @name Transactional
873  * @{
874  */
875 
876 /*!
877  * @brief Initializes the LPUART handle.
878  *
879  * This function initializes the LPUART handle, which can be used for other LPUART
880  * transactional APIs. Usually, for a specified LPUART instance,
881  * call this API once to get the initialized handle.
882  *
883  * The LPUART driver supports the "background" receiving, which means that user can set up
884  * an RX ring buffer optionally. Data received is stored into the ring buffer even when the
885  * user doesn't call the LPUART_TransferReceiveNonBlocking() API. If there is already data received
886  * in the ring buffer, the user can get the received data from the ring buffer directly.
887  * The ring buffer is disabled if passing NULL as @p ringBuffer.
888  *
889  * @param base LPUART peripheral base address.
890  * @param handle LPUART handle pointer.
891  * @param callback Callback function.
892  * @param userData User data.
893  */
894 void LPUART_TransferCreateHandle(LPUART_Type *base,
895                                  lpuart_handle_t *handle,
896                                  lpuart_transfer_callback_t callback,
897                                  void *userData);
898 /*!
899  * @brief Transmits a buffer of data using the interrupt method.
900  *
901  * This function send data using an interrupt method. This is a non-blocking function, which
902  * returns directly without waiting for all data written to the transmitter register. When
903  * all data is written to the TX register in the ISR, the LPUART driver calls the callback
904  * function and passes the @ref kStatus_LPUART_TxIdle as status parameter.
905  *
906  * @note The kStatus_LPUART_TxIdle is passed to the upper layer when all data are written
907  * to the TX register. However, there is no check to ensure that all the data sent out. Before disabling the TX,
908  * check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is finished.
909  *
910  * @param base LPUART peripheral base address.
911  * @param handle LPUART handle pointer.
912  * @param xfer LPUART transfer structure, see #lpuart_transfer_t.
913  * @retval kStatus_Success Successfully start the data transmission.
914  * @retval kStatus_LPUART_TxBusy Previous transmission still not finished, data not all written to the TX register.
915  * @retval kStatus_InvalidArgument Invalid argument.
916  */
917 status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer);
918 
919 /*!
920  * @brief Sets up the RX ring buffer.
921  *
922  * This function sets up the RX ring buffer to a specific UART handle.
923  *
924  * When the RX ring buffer is used, data received is stored into the ring buffer even when
925  * the user doesn't call the UART_TransferReceiveNonBlocking() API. If there is already data received
926  * in the ring buffer, the user can get the received data from the ring buffer directly.
927  *
928  * @note When using RX ring buffer, one byte is reserved for internal use. In other
929  * words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data.
930  *
931  * @param base LPUART peripheral base address.
932  * @param handle LPUART handle pointer.
933  * @param ringBuffer Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
934  * @param ringBufferSize size of the ring buffer.
935  */
936 void LPUART_TransferStartRingBuffer(LPUART_Type *base,
937                                     lpuart_handle_t *handle,
938                                     uint8_t *ringBuffer,
939                                     size_t ringBufferSize);
940 
941 /*!
942  * @brief Aborts the background transfer and uninstalls the ring buffer.
943  *
944  * This function aborts the background transfer and uninstalls the ring buffer.
945  *
946  * @param base LPUART peripheral base address.
947  * @param handle LPUART handle pointer.
948  */
949 void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle);
950 
951 /*!
952  * @brief Get the length of received data in RX ring buffer.
953  *
954  * @param base LPUART peripheral base address.
955  * @param handle LPUART handle pointer.
956  * @return Length of received data in RX ring buffer.
957  */
958 size_t LPUART_TransferGetRxRingBufferLength(LPUART_Type *base, lpuart_handle_t *handle);
959 
960 /*!
961  * @brief Aborts the interrupt-driven data transmit.
962  *
963  * This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out
964  * how many bytes are not sent out.
965  *
966  * @param base LPUART peripheral base address.
967  * @param handle LPUART handle pointer.
968  */
969 void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle);
970 
971 /*!
972  * @brief Gets the number of bytes that have been sent out to bus.
973  *
974  * This function gets the number of bytes that have been sent out to bus by an interrupt method.
975  *
976  * @param base LPUART peripheral base address.
977  * @param handle LPUART handle pointer.
978  * @param count Send bytes count.
979  * @retval kStatus_NoTransferInProgress No send in progress.
980  * @retval kStatus_InvalidArgument Parameter is invalid.
981  * @retval kStatus_Success Get successfully through the parameter \p count;
982  */
983 status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
984 
985 /*!
986  * @brief Receives a buffer of data using the interrupt method.
987  *
988  * This function receives data using an interrupt method. This is a non-blocking function
989  * which returns without waiting to ensure that all data are received.
990  * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and
991  * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer.
992  * After copying, if the data in the ring buffer is not enough for read, the receive
993  * request is saved by the LPUART driver. When the new data arrives, the receive request
994  * is serviced first. When all data is received, the LPUART driver notifies the upper layer
995  * through a callback function and passes a status parameter kStatus_UART_RxIdle.
996  * For example, the upper layer needs 10 bytes but there are only 5 bytes in ring buffer.
997  * The 5 bytes are copied to xfer->data, which returns with the
998  * parameter @p receivedBytes set to 5. For the remaining 5 bytes, the newly arrived data is
999  * saved from xfer->data[5]. When 5 bytes are received, the LPUART driver notifies the upper layer.
1000  * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt
1001  * to receive data to xfer->data. When all data is received, the upper layer is notified.
1002  *
1003  * @param base LPUART peripheral base address.
1004  * @param handle LPUART handle pointer.
1005  * @param xfer LPUART transfer structure, see uart_transfer_t.
1006  * @param receivedBytes Bytes received from the ring buffer directly.
1007  * @retval kStatus_Success Successfully queue the transfer into the transmit queue.
1008  * @retval kStatus_LPUART_RxBusy Previous receive request is not finished.
1009  * @retval kStatus_InvalidArgument Invalid argument.
1010  */
1011 status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base,
1012                                            lpuart_handle_t *handle,
1013                                            lpuart_transfer_t *xfer,
1014                                            size_t *receivedBytes);
1015 
1016 /*!
1017  * @brief Aborts the interrupt-driven data receiving.
1018  *
1019  * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out
1020  * how many bytes not received yet.
1021  *
1022  * @param base LPUART peripheral base address.
1023  * @param handle LPUART handle pointer.
1024  */
1025 void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle);
1026 
1027 /*!
1028  * @brief Gets the number of bytes that have been received.
1029  *
1030  * This function gets the number of bytes that have been received.
1031  *
1032  * @param base LPUART peripheral base address.
1033  * @param handle LPUART handle pointer.
1034  * @param count Receive bytes count.
1035  * @retval kStatus_NoTransferInProgress No receive in progress.
1036  * @retval kStatus_InvalidArgument Parameter is invalid.
1037  * @retval kStatus_Success Get successfully through the parameter \p count;
1038  */
1039 status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
1040 
1041 /*!
1042  * @brief LPUART IRQ handle function.
1043  *
1044  * This function handles the LPUART transmit and receive IRQ request.
1045  *
1046  * @param base LPUART peripheral base address.
1047  * @param irqHandle LPUART handle pointer.
1048  */
1049 void LPUART_TransferHandleIRQ(LPUART_Type *base, void *irqHandle);
1050 
1051 /*!
1052  * @brief LPUART Error IRQ handle function.
1053  *
1054  * This function handles the LPUART error IRQ request.
1055  *
1056  * @param base LPUART peripheral base address.
1057  * @param irqHandle LPUART handle pointer.
1058  */
1059 void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, void *irqHandle);
1060 
1061 /*! @} */
1062 
1063 #if defined(__cplusplus)
1064 }
1065 #endif
1066 
1067 /*! @}*/
1068 
1069 #endif /* FSL_LPUART_H_ */
1070