1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2023 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef FSL_USART_H_
9 #define FSL_USART_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup usart_driver
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21
22 /*! @name Driver version */
23 /*! @{ */
24 /*! @brief USART driver version. */
25 #define FSL_USART_DRIVER_VERSION (MAKE_VERSION(2, 8, 3))
26 /*! @} */
27
28 #define USART_FIFOTRIG_TXLVL_GET(base) (((base)->FIFOTRIG & USART_FIFOTRIG_TXLVL_MASK) >> USART_FIFOTRIG_TXLVL_SHIFT)
29 #define USART_FIFOTRIG_RXLVL_GET(base) (((base)->FIFOTRIG & USART_FIFOTRIG_RXLVL_MASK) >> USART_FIFOTRIG_RXLVL_SHIFT)
30
31 /*! @brief Retry times for waiting flag.
32 *
33 * Defining to zero means to keep waiting for the flag until it is assert/deassert in blocking transfer,
34 * otherwise the program will wait until the UART_RETRY_TIMES counts down to 0,
35 * if the flag still remains unchanged then program will return kStatus_USART_Timeout.
36 * It is not advised to use this macro in formal application to prevent any hardware error
37 * because the actual wait period is affected by the compiler and optimization.
38 */
39 #ifndef UART_RETRY_TIMES
40 #define UART_RETRY_TIMES 0U
41 #endif
42
43 /*! @brief Error codes for the USART driver. */
44 enum
45 {
46 kStatus_USART_TxBusy = MAKE_STATUS(kStatusGroup_LPC_USART, 0), /*!< Transmitter is busy. */
47 kStatus_USART_RxBusy = MAKE_STATUS(kStatusGroup_LPC_USART, 1), /*!< Receiver is busy. */
48 kStatus_USART_TxIdle = MAKE_STATUS(kStatusGroup_LPC_USART, 2), /*!< USART transmitter is idle. */
49 kStatus_USART_RxIdle = MAKE_STATUS(kStatusGroup_LPC_USART, 3), /*!< USART receiver is idle. */
50 kStatus_USART_TxError = MAKE_STATUS(kStatusGroup_LPC_USART, 7), /*!< Error happens on txFIFO. */
51 kStatus_USART_RxError = MAKE_STATUS(kStatusGroup_LPC_USART, 9), /*!< Error happens on rxFIFO. */
52 kStatus_USART_RxRingBufferOverrun = MAKE_STATUS(kStatusGroup_LPC_USART, 8), /*!< Error happens on rx ring buffer */
53 kStatus_USART_NoiseError = MAKE_STATUS(kStatusGroup_LPC_USART, 10), /*!< USART noise error. */
54 kStatus_USART_FramingError = MAKE_STATUS(kStatusGroup_LPC_USART, 11), /*!< USART framing error. */
55 kStatus_USART_ParityError = MAKE_STATUS(kStatusGroup_LPC_USART, 12), /*!< USART parity error. */
56 kStatus_USART_BaudrateNotSupport =
57 MAKE_STATUS(kStatusGroup_LPC_USART, 13), /*!< Baudrate is not support in current clock source */
58 #if UART_RETRY_TIMES
59 kStatus_USART_Timeout = MAKE_STATUS(kStatusGroup_LPC_USART, 14), /*!< USART time out. */
60 #endif
61 };
62
63 /*! @brief USART synchronous mode. */
64 typedef enum _usart_sync_mode
65 {
66 kUSART_SyncModeDisabled = 0x0U, /*!< Asynchronous mode. */
67 kUSART_SyncModeSlave = 0x2U, /*!< Synchronous slave mode. */
68 kUSART_SyncModeMaster = 0x3U, /*!< Synchronous master mode. */
69 } usart_sync_mode_t;
70
71 /*! @brief USART parity mode. */
72 typedef enum _usart_parity_mode
73 {
74 kUSART_ParityDisabled = 0x0U, /*!< Parity disabled */
75 kUSART_ParityEven = 0x2U, /*!< Parity enabled, type even, bit setting: PE|PT = 10 */
76 kUSART_ParityOdd = 0x3U, /*!< Parity enabled, type odd, bit setting: PE|PT = 11 */
77 } usart_parity_mode_t;
78
79 /*! @brief USART stop bit count. */
80 typedef enum _usart_stop_bit_count
81 {
82 kUSART_OneStopBit = 0U, /*!< One stop bit */
83 kUSART_TwoStopBit = 1U, /*!< Two stop bits */
84 } usart_stop_bit_count_t;
85
86 /*! @brief USART data size. */
87 typedef enum _usart_data_len
88 {
89 kUSART_7BitsPerChar = 0U, /*!< Seven bit mode */
90 kUSART_8BitsPerChar = 1U, /*!< Eight bit mode */
91 } usart_data_len_t;
92
93 /*! @brief USART clock polarity configuration, used in sync mode.*/
94 typedef enum _usart_clock_polarity
95 {
96 kUSART_RxSampleOnFallingEdge = 0x0U, /*!< Un_RXD is sampled on the falling edge of SCLK. */
97 kUSART_RxSampleOnRisingEdge = 0x1U, /*!< Un_RXD is sampled on the rising edge of SCLK. */
98 } usart_clock_polarity_t;
99
100 /*! @brief txFIFO watermark values */
101 typedef enum _usart_txfifo_watermark
102 {
103 kUSART_TxFifo0 = 0, /*!< USART tx watermark is empty */
104 kUSART_TxFifo1 = 1, /*!< USART tx watermark at 1 item */
105 kUSART_TxFifo2 = 2, /*!< USART tx watermark at 2 items */
106 kUSART_TxFifo3 = 3, /*!< USART tx watermark at 3 items */
107 kUSART_TxFifo4 = 4, /*!< USART tx watermark at 4 items */
108 kUSART_TxFifo5 = 5, /*!< USART tx watermark at 5 items */
109 kUSART_TxFifo6 = 6, /*!< USART tx watermark at 6 items */
110 kUSART_TxFifo7 = 7, /*!< USART tx watermark at 7 items */
111 } usart_txfifo_watermark_t;
112
113 /*! @brief rxFIFO watermark values */
114 typedef enum _usart_rxfifo_watermark
115 {
116 kUSART_RxFifo1 = 0, /*!< USART rx watermark at 1 item */
117 kUSART_RxFifo2 = 1, /*!< USART rx watermark at 2 items */
118 kUSART_RxFifo3 = 2, /*!< USART rx watermark at 3 items */
119 kUSART_RxFifo4 = 3, /*!< USART rx watermark at 4 items */
120 kUSART_RxFifo5 = 4, /*!< USART rx watermark at 5 items */
121 kUSART_RxFifo6 = 5, /*!< USART rx watermark at 6 items */
122 kUSART_RxFifo7 = 6, /*!< USART rx watermark at 7 items */
123 kUSART_RxFifo8 = 7, /*!< USART rx watermark at 8 items */
124 } usart_rxfifo_watermark_t;
125
126 /*!
127 * @brief USART interrupt configuration structure, default settings all disabled.
128 */
129 enum _usart_interrupt_enable
130 {
131 kUSART_TxErrorInterruptEnable = (USART_FIFOINTENSET_TXERR_MASK),
132 kUSART_RxErrorInterruptEnable = (USART_FIFOINTENSET_RXERR_MASK),
133 kUSART_TxLevelInterruptEnable = (USART_FIFOINTENSET_TXLVL_MASK),
134 kUSART_RxLevelInterruptEnable = (USART_FIFOINTENSET_RXLVL_MASK),
135 kUSART_TxIdleInterruptEnable = (USART_INTENSET_TXIDLEEN_MASK << 16U), /*!< Transmitter idle. */
136 kUSART_CtsChangeInterruptEnable =
137 (USART_INTENSET_DELTACTSEN_MASK << 16U), /*!< Change in the state of the CTS input. */
138 kUSART_RxBreakChangeInterruptEnable =
139 (USART_INTENSET_DELTARXBRKEN_MASK), /*!< Break condition asserted or deasserted. */
140 kUSART_RxStartInterruptEnable = (USART_INTENSET_STARTEN_MASK), /*!< Rx start bit detected. */
141 kUSART_FramingErrorInterruptEnable = (USART_INTENSET_FRAMERREN_MASK), /*!< Framing error detected. */
142 kUSART_ParityErrorInterruptEnable = (USART_INTENSET_PARITYERREN_MASK), /*!< Parity error detected. */
143 kUSART_NoiseErrorInterruptEnable = (USART_INTENSET_RXNOISEEN_MASK), /*!< Noise error detected. */
144 kUSART_AutoBaudErrorInterruptEnable = (USART_INTENSET_ABERREN_MASK), /*!< Auto baudrate error detected. */
145 #if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
146 kUSART_RxTimeoutInterruptEnable = (USART_FIFOINTENSET_RXTIMEOUT_MASK), /*!< Receive timeout detected. */
147 #endif
148 kUSART_AllInterruptEnables =
149 kUSART_TxErrorInterruptEnable | kUSART_RxErrorInterruptEnable | kUSART_TxLevelInterruptEnable |
150 kUSART_RxLevelInterruptEnable | kUSART_TxIdleInterruptEnable | kUSART_CtsChangeInterruptEnable |
151 kUSART_RxBreakChangeInterruptEnable | kUSART_RxStartInterruptEnable | kUSART_FramingErrorInterruptEnable |
152 kUSART_ParityErrorInterruptEnable | kUSART_NoiseErrorInterruptEnable |
153 #if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
154 kUSART_RxTimeoutInterruptEnable |
155 #endif
156 kUSART_AutoBaudErrorInterruptEnable,
157 };
158
159 /*!
160 * @brief USART status flags.
161 *
162 * This provides constants for the USART status flags for use in the USART functions.
163 */
164 enum _usart_flags
165 {
166 kUSART_TxError = (USART_FIFOSTAT_TXERR_MASK), /*!< TEERR bit, sets if TX buffer is error */
167 kUSART_RxError = (USART_FIFOSTAT_RXERR_MASK), /*!< RXERR bit, sets if RX buffer is error */
168 kUSART_TxFifoEmptyFlag = (USART_FIFOSTAT_TXEMPTY_MASK), /*!< TXEMPTY bit, sets if TX buffer is empty */
169 kUSART_TxFifoNotFullFlag = (USART_FIFOSTAT_TXNOTFULL_MASK), /*!< TXNOTFULL bit, sets if TX buffer is not full */
170 kUSART_RxFifoNotEmptyFlag = (USART_FIFOSTAT_RXNOTEMPTY_MASK), /*!< RXNOEMPTY bit, sets if RX buffer is not empty */
171 kUSART_RxFifoFullFlag = (USART_FIFOSTAT_RXFULL_MASK), /*!< RXFULL bit, sets if RX buffer is full */
172 kUSART_RxIdleFlag = (USART_STAT_RXIDLE_MASK << 16U), /*!< Receiver idle. */
173 kUSART_TxIdleFlag = (USART_STAT_TXIDLE_MASK << 16U), /*!< Transmitter idle. */
174 kUSART_CtsAssertFlag = (USART_STAT_CTS_MASK << 16U), /*!< CTS signal high. */
175 kUSART_CtsChangeFlag = (USART_STAT_DELTACTS_MASK << 16U), /*!< CTS signal changed interrupt status. */
176 kUSART_BreakDetectFlag = (USART_STAT_RXBRK_MASK), /*!< Break detected. Self cleared when rx pin goes high again. */
177 kUSART_BreakDetectChangeFlag = (USART_STAT_DELTARXBRK_MASK), /*!< Break detect change interrupt flag. A change in
178 the state of receiver break detection. */
179 kUSART_RxStartFlag = (USART_STAT_START_MASK), /*!< Rx start bit detected interrupt flag. */
180 kUSART_FramingErrorFlag = (USART_STAT_FRAMERRINT_MASK), /*!< Framing error interrupt flag. */
181 kUSART_ParityErrorFlag = (USART_STAT_PARITYERRINT_MASK), /*!< parity error interrupt flag. */
182 kUSART_NoiseErrorFlag = (USART_STAT_RXNOISEINT_MASK), /*!< Noise error interrupt flag. */
183 kUSART_AutobaudErrorFlag = (USART_STAT_ABERR_MASK), /*!< Auto baudrate error interrupt flag, caused by the baudrate
184 counter timeout before the end of start bit. */
185 #if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
186 kUSART_RxTimeoutFlag = (USART_FIFOSTAT_RXTIMEOUT_MASK), /*!< RXTIMEOUT bit, sets if RX FIFO Timeout. */
187 #endif
188 kUSART_AllClearFlags = kUSART_TxError | kUSART_RxError | kUSART_CtsChangeFlag | kUSART_BreakDetectChangeFlag |
189 kUSART_RxStartFlag | kUSART_FramingErrorFlag | kUSART_ParityErrorFlag |
190 #if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
191 kUSART_RxTimeoutFlag |
192 #endif
193 kUSART_NoiseErrorFlag | kUSART_AutobaudErrorFlag,
194 };
195
196 #if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
197 /*! @brief USART receive timeout configuration structure. */
198 typedef struct _usart_rx_timeout_config
199 {
200 bool enable; /*!< Enable RX timeout */
201 bool resetCounterOnEmpty; /*!< Enable RX timeout counter reset when RX FIFO becames empty. */
202 bool resetCounterOnReceive; /*!< Enable RX timeout counter reset when RX FIFO receives data from the transmitter
203 side. */
204 uint32_t counter; /*!< RX timeout counter*/
205 uint8_t prescaler; /*!< RX timeout prescaler*/
206 } usart_rx_timeout_config;
207 #endif
208
209 /*! @brief USART configuration structure. */
210 typedef struct _usart_config
211 {
212 uint32_t baudRate_Bps; /*!< USART baud rate */
213 usart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */
214 usart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */
215 usart_data_len_t bitCountPerChar; /*!< Data length - 7 bit, 8 bit */
216 bool loopback; /*!< Enable peripheral loopback */
217 bool enableRx; /*!< Enable RX */
218 bool enableTx; /*!< Enable TX */
219 bool enableContinuousSCLK; /*!< USART continuous Clock generation enable in synchronous master mode. */
220 bool enableMode32k; /*!< USART uses 32 kHz clock from the RTC oscillator as the clock source. */
221 bool enableHardwareFlowControl; /*!< Enable hardware control RTS/CTS */
222 usart_txfifo_watermark_t txWatermark; /*!< txFIFO watermark */
223 usart_rxfifo_watermark_t rxWatermark; /*!< rxFIFO watermark */
224 usart_sync_mode_t syncMode; /*!< Transfer mode select - asynchronous, synchronous master, synchronous slave. */
225 usart_clock_polarity_t clockPolarity; /*!< Selects the clock polarity and sampling edge in synchronous mode. */
226 #if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
227 usart_rx_timeout_config rxTimeout; /*!< rx timeout configuration */
228 #endif
229 } usart_config_t;
230
231 /*! @brief USART transfer structure. */
232 typedef struct _usart_transfer
233 {
234 /*
235 * Use separate TX and RX data pointer, because TX data is const data.
236 * The member data is kept for backward compatibility.
237 */
238 union
239 {
240 uint8_t *data; /*!< The buffer of data to be transfer.*/
241 uint8_t *rxData; /*!< The buffer to receive data. */
242 const uint8_t *txData; /*!< The buffer of data to be sent. */
243 };
244 size_t dataSize; /*!< The byte count to be transfer. */
245 } usart_transfer_t;
246
247 /* Forward declaration of the handle typedef. */
248 typedef struct _usart_handle usart_handle_t;
249
250 /*! @brief USART transfer callback function. */
251 typedef void (*usart_transfer_callback_t)(USART_Type *base, usart_handle_t *handle, status_t status, void *userData);
252
253 /*! @brief USART handle structure. */
254 struct _usart_handle
255 {
256 const uint8_t *volatile txData; /*!< Address of remaining data to send. */
257 volatile size_t txDataSize; /*!< Size of the remaining data to send. */
258 size_t txDataSizeAll; /*!< Size of the data to send out. */
259 uint8_t *volatile rxData; /*!< Address of remaining data to receive. */
260 volatile size_t rxDataSize; /*!< Size of the remaining data to receive. */
261 size_t rxDataSizeAll; /*!< Size of the data to receive. */
262
263 uint8_t *rxRingBuffer; /*!< Start address of the receiver ring buffer. */
264 size_t rxRingBufferSize; /*!< Size of the ring buffer. */
265 volatile uint16_t rxRingBufferHead; /*!< Index for the driver to store received data into ring buffer. */
266 volatile uint16_t rxRingBufferTail; /*!< Index for the user to get data from the ring buffer. */
267
268 usart_transfer_callback_t callback; /*!< Callback function. */
269 void *userData; /*!< USART callback function parameter.*/
270
271 volatile uint8_t txState; /*!< TX transfer state. */
272 volatile uint8_t rxState; /*!< RX transfer state */
273
274 uint8_t txWatermark; /*!< txFIFO watermark */
275 uint8_t rxWatermark; /*!< rxFIFO watermark */
276 };
277
278 /*! @brief Typedef for usart interrupt handler. */
279 typedef void (*flexcomm_usart_irq_handler_t)(USART_Type *base, usart_handle_t *handle);
280
281 /*******************************************************************************
282 * API
283 ******************************************************************************/
284
285 #if defined(__cplusplus)
286 extern "C" {
287 #endif /* _cplusplus */
288
289 /*! @brief Returns instance number for USART peripheral base address. */
290 uint32_t USART_GetInstance(USART_Type *base);
291
292 /*!
293 * @name Initialization and deinitialization
294 * @{
295 */
296
297 /*!
298 * @brief Initializes a USART instance with user configuration structure and peripheral clock.
299 *
300 * This function configures the USART module with the user-defined settings. The user can configure the configuration
301 * structure and also get the default configuration by using the USART_GetDefaultConfig() function.
302 * Example below shows how to use this API to configure USART.
303 * @code
304 * usart_config_t usartConfig;
305 * usartConfig.baudRate_Bps = 115200U;
306 * usartConfig.parityMode = kUSART_ParityDisabled;
307 * usartConfig.stopBitCount = kUSART_OneStopBit;
308 * USART_Init(USART1, &usartConfig, 20000000U);
309 * @endcode
310 *
311 * @param base USART peripheral base address.
312 * @param config Pointer to user-defined configuration structure.
313 * @param srcClock_Hz USART clock source frequency in HZ.
314 * @retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source.
315 * @retval kStatus_InvalidArgument USART base address is not valid
316 * @retval kStatus_Success Status USART initialize succeed
317 */
318 status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz);
319 #if defined(FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG) && FSL_FEATURE_USART_HAS_FIFORXTIMEOUTCFG
320 /*!
321 * @brief Calculate the USART instance RX timeout prescaler and counter.
322 *
323 * This function for calculate the USART RXFIFO timeout config. This function is used to calculate
324 * suitable prescaler and counter for target_us.
325 * @code
326 * usart_config_t config;
327 * config.rxWatermark = kUSART_RxFifo2;
328 * config.rxTimeout.enable = true;
329 * config.rxTimeout.resetCounterOnEmpty = true;
330 * config.rxTimeout.resetCounterOnReceive = true;
331 * USART_CalcTimeoutConfig(200U, &config.rxTimeout.prescaler, &config.rxTimeout.counter,
332 * CLOCK_GetFreq(kCLOCK_BusClk));
333 * @endcode
334 * @param target_us Time for rx timeout unit us.
335 * @param rxTimeoutPrescaler The prescaler to be setted after function.
336 * @param rxTimeoutcounter The counter to be setted after function.
337 * @param srcClock_Hz The clockSrc for rx timeout.
338 */
339 void USART_CalcTimeoutConfig(uint32_t target_us,
340 uint8_t *rxTimeoutPrescaler,
341 uint32_t *rxTimeoutcounter,
342 uint32_t srcClock_Hz);
343 /*!
344 * @brief Sets the USART instance RX timeout config.
345 *
346 * This function configures the USART RXFIFO timeout config. This function is used to config
347 * the USART RXFIFO timeout config after the USART module is initialized by the USART_Init.
348 *
349 * @param base USART peripheral base address.
350 * @param config pointer to receive timeout configuration structure.
351 */
352 void USART_SetRxTimeoutConfig(USART_Type *base, const usart_rx_timeout_config *config);
353 #endif
354 /*!
355 * @brief Deinitializes a USART instance.
356 *
357 * This function waits for TX complete, disables TX and RX, and disables the USART clock.
358 *
359 * @param base USART peripheral base address.
360 */
361 void USART_Deinit(USART_Type *base);
362
363 /*!
364 * @brief Gets the default configuration structure.
365 *
366 * This function initializes the USART configuration structure to a default value. The default
367 * values are:
368 * usartConfig->baudRate_Bps = 115200U;
369 * usartConfig->parityMode = kUSART_ParityDisabled;
370 * usartConfig->stopBitCount = kUSART_OneStopBit;
371 * usartConfig->bitCountPerChar = kUSART_8BitsPerChar;
372 * usartConfig->loopback = false;
373 * usartConfig->enableTx = false;
374 * usartConfig->enableRx = false;
375 *
376 * @param config Pointer to configuration structure.
377 */
378 void USART_GetDefaultConfig(usart_config_t *config);
379
380 /*!
381 * @brief Sets the USART instance baud rate.
382 *
383 * This function configures the USART module baud rate. This function is used to update
384 * the USART module baud rate after the USART module is initialized by the USART_Init.
385 * @code
386 * USART_SetBaudRate(USART1, 115200U, 20000000U);
387 * @endcode
388 *
389 * @param base USART peripheral base address.
390 * @param baudrate_Bps USART baudrate to be set.
391 * @param srcClock_Hz USART clock source frequency in HZ.
392 * @retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source.
393 * @retval kStatus_Success Set baudrate succeed.
394 * @retval kStatus_InvalidArgument One or more arguments are invalid.
395 */
396 status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz);
397
398 /*!
399 * @brief Enable 32 kHz mode which USART uses clock from the RTC oscillator as the clock source
400 *
401 * Please note that in order to use a 32 kHz clock to operate USART properly, the RTC oscillator
402 * and its 32 kHz output must be manully enabled by user, by calling RTC_Init and setting
403 * SYSCON_RTCOSCCTRL_EN bit to 1.
404 * And in 32kHz clocking mode the USART can only work at 9600 baudrate or at the baudrate that
405 * 9600 can evenly divide, eg: 4800, 3200.
406 *
407 * @param base USART peripheral base address.
408 * @param baudRate_Bps USART baudrate to be set..
409 * @param enableMode32k true is 32k mode, false is normal mode.
410 * @param srcClock_Hz USART clock source frequency in HZ.
411 * @retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source.
412 * @retval kStatus_Success Set baudrate succeed.
413 * @retval kStatus_InvalidArgument One or more arguments are invalid.
414 */
415 status_t USART_Enable32kMode(USART_Type *base, uint32_t baudRate_Bps, bool enableMode32k, uint32_t srcClock_Hz);
416
417 /*!
418 * @brief Enable 9-bit data mode for USART.
419 *
420 * This function set the 9-bit mode for USART module. The 9th bit is not used for parity thus can be modified by user.
421 *
422 * @param base USART peripheral base address.
423 * @param enable true to enable, false to disable.
424 */
425 void USART_Enable9bitMode(USART_Type *base, bool enable);
426
427 /*!
428 * @brief Set the USART slave address.
429 *
430 * This function configures the address for USART module that works as slave in 9-bit data mode. When the address
431 * detection is enabled, the frame it receices with MSB being 1 is considered as an address frame, otherwise it is
432 * considered as data frame. Once the address frame matches slave's own addresses, this slave is addressed. This
433 * address frame and its following data frames are stored in the receive buffer, otherwise the frames will be discarded.
434 * To un-address a slave, just send an address frame with unmatched address.
435 *
436 * @note Any USART instance joined in the multi-slave system can work as slave. The position of the address mark is the
437 * same as the parity bit when parity is enabled for 8 bit and 9 bit data formats.
438 *
439 * @param base USART peripheral base address.
440 * @param address USART slave address.
441 */
USART_SetMatchAddress(USART_Type * base,uint8_t address)442 static inline void USART_SetMatchAddress(USART_Type *base, uint8_t address)
443 {
444 /* Configure match address. */
445 base->ADDR = (uint32_t)address;
446 }
447
448 /*!
449 * @brief Enable the USART match address feature.
450 *
451 * @param base USART peripheral base address.
452 * @param match true to enable match address, false to disable.
453 */
USART_EnableMatchAddress(USART_Type * base,bool match)454 static inline void USART_EnableMatchAddress(USART_Type *base, bool match)
455 {
456 /* Configure match address enable bit. */
457 if (match)
458 {
459 base->CFG |= (uint32_t)USART_CFG_AUTOADDR_MASK;
460 base->CTL |= (uint32_t)USART_CTL_ADDRDET_MASK;
461 }
462 else
463 {
464 base->CFG &= ~(uint32_t)USART_CFG_AUTOADDR_MASK;
465 base->CTL &= ~(uint32_t)USART_CTL_ADDRDET_MASK;
466 }
467 }
468
469 /*! @} */
470
471 /*!
472 * @name Status
473 * @{
474 */
475
476 /*!
477 * @brief Get USART status flags.
478 *
479 * This function get all USART status flags, the flags are returned as the logical
480 * OR value of the enumerators @ref _usart_flags. To check a specific status,
481 * compare the return value with enumerators in @ref _usart_flags.
482 * For example, to check whether the TX is empty:
483 * @code
484 * if (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(USART1))
485 * {
486 * ...
487 * }
488 * @endcode
489 *
490 * @param base USART peripheral base address.
491 * @return USART status flags which are ORed by the enumerators in the _usart_flags.
492 */
USART_GetStatusFlags(USART_Type * base)493 static inline uint32_t USART_GetStatusFlags(USART_Type *base)
494 {
495 return (base->FIFOSTAT & 0xFF0000FFUL) | (base->STAT & 0xFFUL) << 16U | (base->STAT & 0xFFFF00UL);
496 }
497
498 /*!
499 * @brief Clear USART status flags.
500 *
501 * This function clear supported USART status flags
502 * Flags that can be cleared or set are:
503 * kUSART_TxError
504 * kUSART_RxError
505 * For example:
506 * @code
507 * USART_ClearStatusFlags(USART1, kUSART_TxError | kUSART_RxError)
508 * @endcode
509 *
510 * @param base USART peripheral base address.
511 * @param mask status flags to be cleared.
512 */
USART_ClearStatusFlags(USART_Type * base,uint32_t mask)513 static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask)
514 {
515 mask &= (uint32_t)kUSART_AllClearFlags;
516 /* Clear the clearable status in STAT register. */
517 base->STAT = (mask & 0xFFFF00UL) | ((mask & 0xFF0000UL) >> 16U);
518 /* Only TXERR, RXERR fields support write. Remaining fields should be set to zero */
519 base->FIFOSTAT = mask & (USART_FIFOSTAT_TXERR_MASK | USART_FIFOSTAT_RXERR_MASK);
520 }
521
522 /*! @} */
523
524 /*!
525 * @name Interrupts
526 * @{
527 */
528 /*!
529 * @brief Enables USART interrupts according to the provided mask.
530 *
531 * This function enables the USART interrupts according to the provided mask. The mask
532 * is a logical OR of enumeration members. See @ref _usart_interrupt_enable.
533 * For example, to enable TX empty interrupt and RX full interrupt:
534 * @code
535 * USART_EnableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);
536 * @endcode
537 *
538 * @param base USART peripheral base address.
539 * @param mask The interrupts to enable. Logical OR of @ref _usart_interrupt_enable.
540 */
USART_EnableInterrupts(USART_Type * base,uint32_t mask)541 static inline void USART_EnableInterrupts(USART_Type *base, uint32_t mask)
542 {
543 mask &= (uint32_t)kUSART_AllInterruptEnables;
544 base->INTENSET = (mask & 0x1FF00UL) | ((mask & 0xFF0000UL) >> 16U);
545 base->FIFOINTENSET = mask & 0xF00000FUL;
546 }
547
548 /*!
549 * @brief Disables USART interrupts according to a provided mask.
550 *
551 * This function disables the USART interrupts according to a provided mask. The mask
552 * is a logical OR of enumeration members. See @ref _usart_interrupt_enable.
553 * This example shows how to disable the TX empty interrupt and RX full interrupt:
554 * @code
555 * USART_DisableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);
556 * @endcode
557 *
558 * @param base USART peripheral base address.
559 * @param mask The interrupts to disable. Logical OR of @ref _usart_interrupt_enable.
560 */
USART_DisableInterrupts(USART_Type * base,uint32_t mask)561 static inline void USART_DisableInterrupts(USART_Type *base, uint32_t mask)
562 {
563 mask &= (uint32_t)kUSART_AllInterruptEnables;
564 base->INTENCLR = (mask & 0x1FF00UL) | ((mask & 0xFF0000UL) >> 16U);
565 base->FIFOINTENCLR = mask & 0xFUL;
566 }
567
568 /*!
569 * @brief Returns enabled USART interrupts.
570 *
571 * This function returns the enabled USART interrupts.
572 *
573 * @param base USART peripheral base address.
574 */
USART_GetEnabledInterrupts(USART_Type * base)575 static inline uint32_t USART_GetEnabledInterrupts(USART_Type *base)
576 {
577 return (base->INTENSET & 0x1FF00UL) | ((base->INTENSET & 0xFFUL) << 16UL) | (base->FIFOINTENSET & 0xFUL);
578 }
579
580 /*!
581 * @brief Enable DMA for Tx
582 */
USART_EnableTxDMA(USART_Type * base,bool enable)583 static inline void USART_EnableTxDMA(USART_Type *base, bool enable)
584 {
585 if (enable)
586 {
587 base->FIFOCFG |= USART_FIFOCFG_DMATX_MASK;
588 }
589 else
590 {
591 base->FIFOCFG &= ~(USART_FIFOCFG_DMATX_MASK);
592 }
593 }
594
595 /*!
596 * @brief Enable DMA for Rx
597 */
USART_EnableRxDMA(USART_Type * base,bool enable)598 static inline void USART_EnableRxDMA(USART_Type *base, bool enable)
599 {
600 if (enable)
601 {
602 base->FIFOCFG |= USART_FIFOCFG_DMARX_MASK;
603 }
604 else
605 {
606 base->FIFOCFG &= ~(USART_FIFOCFG_DMARX_MASK);
607 }
608 }
609
610 /*!
611 * @brief Enable CTS.
612 * This function will determine whether CTS is used for flow control.
613 *
614 * @param base USART peripheral base address.
615 * @param enable Enable CTS or not, true for enable and false for disable.
616 */
USART_EnableCTS(USART_Type * base,bool enable)617 static inline void USART_EnableCTS(USART_Type *base, bool enable)
618 {
619 if (enable)
620 {
621 base->CFG |= USART_CFG_CTSEN_MASK;
622 }
623 else
624 {
625 base->CFG &= ~USART_CFG_CTSEN_MASK;
626 }
627 }
628
629 /*!
630 * @brief Continuous Clock generation.
631 * By default, SCLK is only output while data is being transmitted in synchronous mode.
632 * Enable this funciton, SCLK will run continuously in synchronous mode, allowing
633 * characters to be received on Un_RxD independently from transmission on Un_TXD).
634 *
635 * @param base USART peripheral base address.
636 * @param enable Enable Continuous Clock generation mode or not, true for enable and false for disable.
637 */
USART_EnableContinuousSCLK(USART_Type * base,bool enable)638 static inline void USART_EnableContinuousSCLK(USART_Type *base, bool enable)
639 {
640 if (enable)
641 {
642 base->CTL |= USART_CTL_CC_MASK;
643 }
644 else
645 {
646 base->CTL &= ~USART_CTL_CC_MASK;
647 }
648 }
649
650 /*!
651 * @brief Enable Continuous Clock generation bit auto clear.
652 * While enable this cuntion, the Continuous Clock bit is automatically cleared when a complete
653 * character has been received. This bit is cleared at the same time.
654 *
655 * @param base USART peripheral base address.
656 * @param enable Enable auto clear or not, true for enable and false for disable.
657 */
USART_EnableAutoClearSCLK(USART_Type * base,bool enable)658 static inline void USART_EnableAutoClearSCLK(USART_Type *base, bool enable)
659 {
660 if (enable)
661 {
662 base->CTL |= USART_CTL_CLRCCONRX_MASK;
663 }
664 else
665 {
666 base->CTL &= ~USART_CTL_CLRCCONRX_MASK;
667 }
668 }
669
670 /*!
671 * @brief Sets the rx FIFO watermark.
672 *
673 * @param base USART peripheral base address.
674 * @param water Rx FIFO watermark.
675 */
USART_SetRxFifoWatermark(USART_Type * base,uint8_t water)676 static inline void USART_SetRxFifoWatermark(USART_Type *base, uint8_t water)
677 {
678 assert(water <= (USART_FIFOTRIG_RXLVL_MASK >> USART_FIFOTRIG_RXLVL_SHIFT));
679 base->FIFOTRIG = (base->FIFOTRIG & ~USART_FIFOTRIG_RXLVL_MASK) | USART_FIFOTRIG_RXLVL(water);
680 }
681
682 /*!
683 * @brief Sets the tx FIFO watermark.
684 *
685 * @param base USART peripheral base address.
686 * @param water Tx FIFO watermark.
687 */
USART_SetTxFifoWatermark(USART_Type * base,uint8_t water)688 static inline void USART_SetTxFifoWatermark(USART_Type *base, uint8_t water)
689 {
690 assert(water <= (USART_FIFOTRIG_TXLVL_MASK >> USART_FIFOTRIG_TXLVL_SHIFT));
691 base->FIFOTRIG = (base->FIFOTRIG & ~USART_FIFOTRIG_TXLVL_MASK) | USART_FIFOTRIG_TXLVL(water);
692 }
693 /*! @} */
694
695 /*!
696 * @name Bus Operations
697 * @{
698 */
699
700 /*!
701 * @brief Writes to the FIFOWR register.
702 *
703 * This function writes data to the txFIFO directly. The upper layer must ensure
704 * that txFIFO has space for data to write before calling this function.
705 *
706 * @param base USART peripheral base address.
707 * @param data The byte to write.
708 */
USART_WriteByte(USART_Type * base,uint8_t data)709 static inline void USART_WriteByte(USART_Type *base, uint8_t data)
710 {
711 base->FIFOWR = data;
712 }
713
714 /*!
715 * @brief Reads the FIFORD register directly.
716 *
717 * This function reads data from the rxFIFO directly. The upper layer must
718 * ensure that the rxFIFO is not empty before calling this function.
719 *
720 * @param base USART peripheral base address.
721 * @return The byte read from USART data register.
722 */
USART_ReadByte(USART_Type * base)723 static inline uint8_t USART_ReadByte(USART_Type *base)
724 {
725 return (uint8_t)base->FIFORD;
726 }
727
728 /*!
729 * @brief Gets the rx FIFO data count.
730 *
731 * @param base USART peripheral base address.
732 * @return rx FIFO data count.
733 */
USART_GetRxFifoCount(USART_Type * base)734 static inline uint8_t USART_GetRxFifoCount(USART_Type *base)
735 {
736 return (uint8_t)((base->FIFOSTAT & USART_FIFOSTAT_RXLVL_MASK) >> USART_FIFOSTAT_RXLVL_SHIFT);
737 }
738
739 /*!
740 * @brief Gets the tx FIFO data count.
741 *
742 * @param base USART peripheral base address.
743 * @return tx FIFO data count.
744 */
USART_GetTxFifoCount(USART_Type * base)745 static inline uint8_t USART_GetTxFifoCount(USART_Type *base)
746 {
747 return (uint8_t)((base->FIFOSTAT & USART_FIFOSTAT_TXLVL_MASK) >> USART_FIFOSTAT_TXLVL_SHIFT);
748 }
749
750 /*!
751 * @brief Transmit an address frame in 9-bit data mode.
752 *
753 * @param base USART peripheral base address.
754 * @param address USART slave address.
755 */
756 void USART_SendAddress(USART_Type *base, uint8_t address);
757
758 /*!
759 * @brief Writes to the TX register using a blocking method.
760 *
761 * This function polls the TX register, waits for the TX register to be empty or for the TX FIFO
762 * to have room and writes data to the TX buffer.
763 *
764 * @param base USART peripheral base address.
765 * @param data Start address of the data to write.
766 * @param length Size of the data to write.
767 * @retval kStatus_USART_Timeout Transmission timed out and was aborted.
768 * @retval kStatus_InvalidArgument Invalid argument.
769 * @retval kStatus_Success Successfully wrote all data.
770 */
771 status_t USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length);
772
773 /*!
774 * @brief Read RX data register using a blocking method.
775 *
776 * This function polls the RX register, waits for the RX register to be full or for RX FIFO to
777 * have data and read data from the TX register.
778 *
779 * @param base USART peripheral base address.
780 * @param data Start address of the buffer to store the received data.
781 * @param length Size of the buffer.
782 * @retval kStatus_USART_FramingError Receiver overrun happened while receiving data.
783 * @retval kStatus_USART_ParityError Noise error happened while receiving data.
784 * @retval kStatus_USART_NoiseError Framing error happened while receiving data.
785 * @retval kStatus_USART_RxError Overflow or underflow rxFIFO happened.
786 * @retval kStatus_USART_Timeout Transmission timed out and was aborted.
787 * @retval kStatus_Success Successfully received all data.
788 */
789 status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length);
790
791 /*! @} */
792
793 /*!
794 * @name Transactional
795 * @{
796 */
797
798 /*!
799 * @brief Initializes the USART handle.
800 *
801 * This function initializes the USART handle which can be used for other USART
802 * transactional APIs. Usually, for a specified USART instance,
803 * call this API once to get the initialized handle.
804 *
805 * @param base USART peripheral base address.
806 * @param handle USART handle pointer.
807 * @param callback The callback function.
808 * @param userData The parameter of the callback function.
809 */
810 status_t USART_TransferCreateHandle(USART_Type *base,
811 usart_handle_t *handle,
812 usart_transfer_callback_t callback,
813 void *userData);
814
815 /*!
816 * @brief Transmits a buffer of data using the interrupt method.
817 *
818 * This function sends data using an interrupt method. This is a non-blocking function, which
819 * returns directly without waiting for all data to be written to the TX register. When
820 * all data is written to the TX register in the IRQ handler, the USART driver calls the callback
821 * function and passes the @ref kStatus_USART_TxIdle as status parameter.
822 *
823 * @param base USART peripheral base address.
824 * @param handle USART handle pointer.
825 * @param xfer USART transfer structure. See #usart_transfer_t.
826 * @retval kStatus_Success Successfully start the data transmission.
827 * @retval kStatus_USART_TxBusy Previous transmission still not finished, data not all written to TX register yet.
828 * @retval kStatus_InvalidArgument Invalid argument.
829 */
830 status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer);
831
832 /*!
833 * @brief Sets up the RX ring buffer.
834 *
835 * This function sets up the RX ring buffer to a specific USART handle.
836 *
837 * When the RX ring buffer is used, data received are stored into the ring buffer even when the
838 * user doesn't call the USART_TransferReceiveNonBlocking() API. If there is already data received
839 * in the ring buffer, the user can get the received data from the ring buffer directly.
840 *
841 * @note When using the RX ring buffer, one byte is reserved for internal use. In other
842 * words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data.
843 *
844 * @param base USART peripheral base address.
845 * @param handle USART handle pointer.
846 * @param ringBuffer Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer.
847 * @param ringBufferSize size of the ring buffer.
848 */
849 void USART_TransferStartRingBuffer(USART_Type *base,
850 usart_handle_t *handle,
851 uint8_t *ringBuffer,
852 size_t ringBufferSize);
853
854 /*!
855 * @brief Aborts the background transfer and uninstalls the ring buffer.
856 *
857 * This function aborts the background transfer and uninstalls the ring buffer.
858 *
859 * @param base USART peripheral base address.
860 * @param handle USART handle pointer.
861 */
862 void USART_TransferStopRingBuffer(USART_Type *base, usart_handle_t *handle);
863
864 /*!
865 * @brief Get the length of received data in RX ring buffer.
866 *
867 * @param handle USART handle pointer.
868 * @return Length of received data in RX ring buffer.
869 */
870 size_t USART_TransferGetRxRingBufferLength(usart_handle_t *handle);
871
872 /*!
873 * @brief Aborts the interrupt-driven data transmit.
874 *
875 * This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out
876 * how many bytes are still not sent out.
877 *
878 * @param base USART peripheral base address.
879 * @param handle USART handle pointer.
880 */
881 void USART_TransferAbortSend(USART_Type *base, usart_handle_t *handle);
882
883 /*!
884 * @brief Get the number of bytes that have been sent out to bus.
885 *
886 * This function gets the number of bytes that have been sent out to bus by interrupt method.
887 *
888 * @param base USART peripheral base address.
889 * @param handle USART handle pointer.
890 * @param count Send bytes count.
891 * @retval kStatus_NoTransferInProgress No send in progress.
892 * @retval kStatus_InvalidArgument Parameter is invalid.
893 * @retval kStatus_Success Get successfully through the parameter \p count;
894 */
895 status_t USART_TransferGetSendCount(USART_Type *base, usart_handle_t *handle, uint32_t *count);
896
897 /*!
898 * @brief Receives a buffer of data using an interrupt method.
899 *
900 * This function receives data using an interrupt method. This is a non-blocking function, which
901 * returns without waiting for all data to be received.
902 * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and
903 * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer.
904 * After copying, if the data in the ring buffer is not enough to read, the receive
905 * request is saved by the USART driver. When the new data arrives, the receive request
906 * is serviced first. When all data is received, the USART driver notifies the upper layer
907 * through a callback function and passes the status parameter @ref kStatus_USART_RxIdle.
908 * For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer.
909 * The 5 bytes are copied to the xfer->data and this function returns with the
910 * parameter @p receivedBytes set to 5. For the left 5 bytes, newly arrived data is
911 * saved from the xfer->data[5]. When 5 bytes are received, the USART driver notifies the upper layer.
912 * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt
913 * to receive data to the xfer->data. When all data is received, the upper layer is notified.
914 *
915 * @param base USART peripheral base address.
916 * @param handle USART handle pointer.
917 * @param xfer USART transfer structure, see #usart_transfer_t.
918 * @param receivedBytes Bytes received from the ring buffer directly.
919 * @retval kStatus_Success Successfully queue the transfer into transmit queue.
920 * @retval kStatus_USART_RxBusy Previous receive request is not finished.
921 * @retval kStatus_InvalidArgument Invalid argument.
922 */
923 status_t USART_TransferReceiveNonBlocking(USART_Type *base,
924 usart_handle_t *handle,
925 usart_transfer_t *xfer,
926 size_t *receivedBytes);
927
928 /*!
929 * @brief Aborts the interrupt-driven data receiving.
930 *
931 * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out
932 * how many bytes not received yet.
933 *
934 * @param base USART peripheral base address.
935 * @param handle USART handle pointer.
936 */
937 void USART_TransferAbortReceive(USART_Type *base, usart_handle_t *handle);
938
939 /*!
940 * @brief Get the number of bytes that have been received.
941 *
942 * This function gets the number of bytes that have been received.
943 *
944 * @param base USART peripheral base address.
945 * @param handle USART handle pointer.
946 * @param count Receive bytes count.
947 * @retval kStatus_NoTransferInProgress No receive in progress.
948 * @retval kStatus_InvalidArgument Parameter is invalid.
949 * @retval kStatus_Success Get successfully through the parameter \p count;
950 */
951 status_t USART_TransferGetReceiveCount(USART_Type *base, usart_handle_t *handle, uint32_t *count);
952
953 /*!
954 * @brief USART IRQ handle function.
955 *
956 * This function handles the USART transmit and receive IRQ request.
957 *
958 * @param base USART peripheral base address.
959 * @param handle USART handle pointer.
960 */
961 void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle);
962
963 /*! @} */
964
965 #if defined(__cplusplus)
966 }
967 #endif
968
969 /*! @}*/
970
971 #endif /* FSL_USART_H_ */
972