1 /*
2 * Copyright 2019-2020 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include "fsl_dpr.h"
9
10 /* Component ID definition, used by tools. */
11 #ifndef FSL_COMPONENT_ID
12 #define FSL_COMPONENT_ID "platform.drivers.dpr"
13 #endif
14
15 /*******************************************************************************
16 * Definitions
17 ******************************************************************************/
18 #define DPR_ALIGN_UP(x, align) ((((uint32_t)(x)-1U) | ((align)-1U)) + 1U)
19
20 /*******************************************************************************
21 * Prototypes
22 ******************************************************************************/
23
24 /*******************************************************************************
25 * Variables
26 ******************************************************************************/
27
28 /*******************************************************************************
29 * Code
30 ******************************************************************************/
31 /*!
32 * brief Initialize DPR peripheral module.
33 *
34 * param base DPR peripheral address.
35 */
DPR_Init(DPR_Type * base)36 void DPR_Init(DPR_Type *base)
37 {
38 }
39
40 /*!
41 * brief Deinitialize the DPR peripheral module.
42 *
43 * param base DPR peripheral address.
44 */
DPR_Deinit(DPR_Type * base)45 void DPR_Deinit(DPR_Type *base)
46 {
47 }
48
49 /*!
50 * brief Set the frame buffer configuration.
51 *
52 * param base DPR peripheral address.
53 * param addr Frame buffer address.
54 */
DPR_SetBufferConfig(DPR_Type * base,const dpr_buffer_config_t * config)55 void DPR_SetBufferConfig(DPR_Type *base, const dpr_buffer_config_t *config)
56 {
57 assert(config != NULL);
58
59 /*
60 * Current implementation only supports liner type frame buffer, so the
61 * configuration could be simplized, including stride, dimension.
62 */
63
64 uint32_t modeCtrl = 0U;
65 uint8_t numPixelIn64Byte = 0U; /* How many pixels per 64-byte. */
66
67 /* Pixel format. */
68 modeCtrl |= DPR_MODE_CTRL0_PIX_SIZE(config->dataType);
69
70 if (kDPR_DataType32Bpp == config->dataType)
71 {
72 /* Display controller handles the pixel component order, DPR will not handle it. */
73 modeCtrl |= (DPR_MODE_CTRL0_A_COMP_SEL(3U) | DPR_MODE_CTRL0_R_COMP_SEL(2U) | DPR_MODE_CTRL0_G_COMP_SEL(1U) |
74 DPR_MODE_CTRL0_B_COMP_SEL(0U));
75
76 numPixelIn64Byte = 16U;
77 }
78 else
79 {
80 numPixelIn64Byte = 32U;
81 }
82
83 base->MODE_CTRL0.RW = modeCtrl | DPR_MODE_CTRL0_RTR_4LINE_BUF_EN_MASK;
84
85 /* Stride */
86 base->FRAME_CTRL0.RW =
87 (base->FRAME_CTRL0.RW & ~DPR_FRAME_CTRL0_PITCH_MASK) | DPR_FRAME_CTRL0_PITCH(config->strideBytes);
88
89 /* Dimension. */
90 base->FRAME_1P_PIX_X_CTRL.RW = DPR_ALIGN_UP(config->width, numPixelIn64Byte);
91
92 /* When DPR_MODE_CTRL0_RTR_4LINE_BUF_EN_MASK is set, up aligned to 4,
93 * When DPR_MODE_CTRL0_RTR_4LINE_BUF_EN_MASK is clear, up aligned to 8.
94 */
95 base->FRAME_1P_PIX_Y_CTRL.RW = DPR_ALIGN_UP(config->height, 4U);
96
97 base->RTRAM_CTRL0.RW = DPR_RTRAM_CTRL0_THRES_LOW(3) | DPR_RTRAM_CTRL0_THRES_HIGH(7);
98 }
99
100 /*!
101 * brief Get the input frame buffer default configuration.
102 *
103 * param config Pointer to the configuration.
104 */
DPR_BufferGetDefaultConfig(dpr_buffer_config_t * config)105 void DPR_BufferGetDefaultConfig(dpr_buffer_config_t *config)
106 {
107 assert(config != NULL);
108
109 config->width = 1080U;
110 config->height = 1920U;
111 config->strideBytes = 4U * 1080U;
112 config->dataType = kDPR_DataType32Bpp;
113 }
114
