1/* ------------------------------------------------------------------------- */
2/*  @file:    startup_MKV10Z7.s                                              */
3/*  @purpose: CMSIS Cortex-M0P Core Device Startup File                      */
4/*            MKV10Z7                                                        */
5/*  @version: 1.2                                                            */
6/*  @date:    2014-8-28                                                      */
7/*  @build:   b190918                                                        */
8/* ------------------------------------------------------------------------- */
9/*                                                                           */
10/* Copyright 1997-2016 Freescale Semiconductor, Inc.                         */
11/* Copyright 2016-2019 NXP                                                   */
12/* All rights reserved.                                                      */
13/*                                                                           */
14/* SPDX-License-Identifier: BSD-3-Clause                                     */
15/*****************************************************************************/
16/* Version: GCC for ARM Embedded Processors                                  */
17/*****************************************************************************/
18    .syntax unified
19    .arch armv6-m
20
21    .section .isr_vector, "a"
22    .align 2
23    .globl __isr_vector
24__isr_vector:
25    .long   __StackTop                                      /* Top of Stack */
26    .long   Reset_Handler                                   /* Reset Handler */
27    .long   NMI_Handler                                     /* NMI Handler*/
28    .long   HardFault_Handler                               /* Hard Fault Handler*/
29    .long   0                                               /* Reserved*/
30    .long   0                                               /* Reserved*/
31    .long   0                                               /* Reserved*/
32    .long   0                                               /* Reserved*/
33    .long   0                                               /* Reserved*/
34    .long   0                                               /* Reserved*/
35    .long   0                                               /* Reserved*/
36    .long   SVC_Handler                                     /* SVCall Handler*/
37    .long   0                                               /* Reserved*/
38    .long   0                                               /* Reserved*/
39    .long   PendSV_Handler                                  /* PendSV Handler*/
40    .long   SysTick_Handler                                 /* SysTick Handler*/
41
42                                                            /* External Interrupts*/
43    .long   DMA0_IRQHandler                                 /* DMA channel 0 transfer complete*/
44    .long   DMA1_IRQHandler                                 /* DMA channel 1 transfer complete*/
45    .long   DMA2_IRQHandler                                 /* DMA channel 2 transfer complete*/
46    .long   DMA3_IRQHandler                                 /* DMA channel 3 transfer complete*/
47    .long   DMA_Error_IRQHandler                            /* DMA channel 0 1 2 3 error*/
48    .long   FTFA_IRQHandler                                 /* Command complete and read collision*/
49    .long   PMC_IRQHandler                                  /* Low-voltage detect, low-voltage warning*/
50    .long   LLWU_IRQHandler                                 /* Low Leakage Wakeup*/
51    .long   I2C0_IRQHandler                                 /* I2C0 interrupt*/
52    .long   Reserved25_IRQHandler                           /* Reserved interrupt*/
53    .long   SPI0_IRQHandler                                 /* SPI0 single interrupt vector for all sources*/
54    .long   Reserved27_IRQHandler                           /* Reserved interrupt*/
55    .long   UART0_IRQHandler                                /* UART0 status and error*/
56    .long   UART1_IRQHandler                                /* UART1 status and error*/
57    .long   Reserved30_IRQHandler                           /* Reserved interrupt*/
58    .long   ADC0_IRQHandler                                 /* ADC0 interrupt*/
59    .long   ADC1_IRQHandler                                 /* ADC1 interrupt*/
60    .long   FTM0_IRQHandler                                 /* FTM0 single interrupt vector for all sources*/
61    .long   FTM1_IRQHandler                                 /* FTM1 single interrupt vector for all sources*/
62    .long   FTM2_IRQHandler                                 /* FTM2 single interrupt vector for all sources*/
63    .long   CMP0_IRQHandler                                 /* CMP0 interrupt*/
64    .long   CMP1_IRQHandler                                 /* CMP1 interrupt*/
65    .long   Reserved38_IRQHandler                           /* Reserved interrupt*/
66    .long   WDOG_EWM_IRQHandler                             /* Single interrupt vector for  WDOG and EWM*/
67    .long   Reserved40_IRQHandler                           /* Reserved interrupt*/
68    .long   DAC0_IRQHandler                                 /* DAC0 interrupt*/
69    .long   Reserved42_IRQHandler                           /* Reserved interrupt*/
70    .long   MCG_IRQHandler                                  /* MCG interrupt*/
71    .long   LPTMR0_IRQHandler                               /* LPTMR0 interrupt*/
72    .long   PDB0_IRQHandler                                 /* PDB0 interrupt*/
73    .long   PORTA_IRQHandler                                /* GPIOA Pin detect*/
74    .long   PORTB_PORTC_PORTD_PORTE_IRQHandler              /* Single interrupt vector for GPIOB; GPIOC; GPIOD; GPIOE Pin detect*/
75
76    .size    __isr_vector, . - __isr_vector
77
78/* Flash Configuration */
79    .section .FlashConfig, "a"
80    .long 0xFFFFFFFF
81    .long 0xFFFFFFFF
82    .long 0xFFFFFFFF
83    .long 0xFFFFFFFE
84
85    .text
86    .thumb
87
88/* Reset Handler */
89
90    .thumb_func
91    .align 2
92    .globl   Reset_Handler
93    .weak    Reset_Handler
94    .type    Reset_Handler, %function
95Reset_Handler:
96    cpsid   i               /* Mask interrupts */
97    .equ    VTOR, 0xE000ED08
98    ldr     r0, =VTOR
99    ldr     r1, =__isr_vector
100    str     r1, [r0]
101    ldr     r2, [r1]
102    msr     msp, r2
103#ifndef __NO_SYSTEM_INIT
104    ldr   r0,=SystemInit
105    blx   r0
106#endif
107/*     Loop to copy data from read only memory to RAM. The ranges
108 *      of copy from/to are specified by following symbols evaluated in
109 *      linker script.
110 *      __etext: End of code section, i.e., begin of data sections to copy from.
111 *      __data_start__/__data_end__: RAM address range that data should be
112 *      copied to. Both must be aligned to 4 bytes boundary.  */
113
114    ldr    r1, =__etext
115    ldr    r2, =__data_start__
116    ldr    r3, =__data_end__
117
118    subs    r3, r2
119    ble     .LC0
120
121.LC1:
122    subs    r3, 4
123    ldr    r0, [r1,r3]
124    str    r0, [r2,r3]
125    bgt    .LC1
126.LC0:
127
128#ifdef __STARTUP_CLEAR_BSS
129/*     This part of work usually is done in C library startup code. Otherwise,
130 *     define this macro to enable it in this startup.
131 *
132 *     Loop to zero out BSS section, which uses following symbols
133 *     in linker script:
134 *      __bss_start__: start of BSS section. Must align to 4
135 *      __bss_end__: end of BSS section. Must align to 4
136 */
137    ldr r1, =__bss_start__
138    ldr r2, =__bss_end__
139
140    subs    r2, r1
141    ble .LC3
142
143    movs    r0, 0
144.LC2:
145    subs    r2, 4
146    str r0, [r1, r2]
147    bge .LC2
148.LC3:
149#endif
150    cpsie   i               /* Unmask interrupts */
151#ifndef __START
152#define __START _start
153#endif
154#ifndef __ATOLLIC__
155    ldr   r0,=__START
156    blx   r0
157#else
158    ldr   r0,=__libc_init_array
159    blx   r0
160    ldr   r0,=main
161    bx    r0
162#endif
163    .pool
164    .size Reset_Handler, . - Reset_Handler
165
166    .align  1
167    .thumb_func
168    .weak DefaultISR
169    .type DefaultISR, %function
170DefaultISR:
171    ldr r0, =DefaultISR
172    bx r0
173    .size DefaultISR, . - DefaultISR
174
175    .align 1
176    .thumb_func
177    .weak NMI_Handler
178    .type NMI_Handler, %function
179NMI_Handler:
180    ldr   r0,=NMI_Handler
181    bx    r0
182    .size NMI_Handler, . - NMI_Handler
183
184    .align 1
185    .thumb_func
186    .weak HardFault_Handler
187    .type HardFault_Handler, %function
188HardFault_Handler:
189    ldr   r0,=HardFault_Handler
190    bx    r0
191    .size HardFault_Handler, . - HardFault_Handler
192
193    .align 1
194    .thumb_func
195    .weak SVC_Handler
196    .type SVC_Handler, %function
197SVC_Handler:
198    ldr   r0,=SVC_Handler
199    bx    r0
200    .size SVC_Handler, . - SVC_Handler
201
202    .align 1
203    .thumb_func
204    .weak PendSV_Handler
205    .type PendSV_Handler, %function
206PendSV_Handler:
207    ldr   r0,=PendSV_Handler
208    bx    r0
209    .size PendSV_Handler, . - PendSV_Handler
210
211    .align 1
212    .thumb_func
213    .weak SysTick_Handler
214    .type SysTick_Handler, %function
215SysTick_Handler:
216    ldr   r0,=SysTick_Handler
217    bx    r0
218    .size SysTick_Handler, . - SysTick_Handler
219
220    .align 1
221    .thumb_func
222    .weak DMA0_IRQHandler
223    .type DMA0_IRQHandler, %function
224DMA0_IRQHandler:
225    ldr   r0,=DMA0_DriverIRQHandler
226    bx    r0
227    .size DMA0_IRQHandler, . - DMA0_IRQHandler
228
229    .align 1
230    .thumb_func
231    .weak DMA1_IRQHandler
232    .type DMA1_IRQHandler, %function
233DMA1_IRQHandler:
234    ldr   r0,=DMA1_DriverIRQHandler
235    bx    r0
236    .size DMA1_IRQHandler, . - DMA1_IRQHandler
237
238    .align 1
239    .thumb_func
240    .weak DMA2_IRQHandler
241    .type DMA2_IRQHandler, %function
242DMA2_IRQHandler:
243    ldr   r0,=DMA2_DriverIRQHandler
244    bx    r0
245    .size DMA2_IRQHandler, . - DMA2_IRQHandler
246
247    .align 1
248    .thumb_func
249    .weak DMA3_IRQHandler
250    .type DMA3_IRQHandler, %function
251DMA3_IRQHandler:
252    ldr   r0,=DMA3_DriverIRQHandler
253    bx    r0
254    .size DMA3_IRQHandler, . - DMA3_IRQHandler
255
256    .align 1
257    .thumb_func
258    .weak DMA_Error_IRQHandler
259    .type DMA_Error_IRQHandler, %function
260DMA_Error_IRQHandler:
261    ldr   r0,=DMA_Error_DriverIRQHandler
262    bx    r0
263    .size DMA_Error_IRQHandler, . - DMA_Error_IRQHandler
264
265    .align 1
266    .thumb_func
267    .weak I2C0_IRQHandler
268    .type I2C0_IRQHandler, %function
269I2C0_IRQHandler:
270    ldr   r0,=I2C0_DriverIRQHandler
271    bx    r0
272    .size I2C0_IRQHandler, . - I2C0_IRQHandler
273
274    .align 1
275    .thumb_func
276    .weak SPI0_IRQHandler
277    .type SPI0_IRQHandler, %function
278SPI0_IRQHandler:
279    ldr   r0,=SPI0_DriverIRQHandler
280    bx    r0
281    .size SPI0_IRQHandler, . - SPI0_IRQHandler
282
283    .align 1
284    .thumb_func
285    .weak UART0_IRQHandler
286    .type UART0_IRQHandler, %function
287UART0_IRQHandler:
288    ldr   r0,=UART0_DriverIRQHandler
289    bx    r0
290    .size UART0_IRQHandler, . - UART0_IRQHandler
291
292    .align 1
293    .thumb_func
294    .weak UART1_IRQHandler
295    .type UART1_IRQHandler, %function
296UART1_IRQHandler:
297    ldr   r0,=UART1_DriverIRQHandler
298    bx    r0
299    .size UART1_IRQHandler, . - UART1_IRQHandler
300
301
302/*    Macro to define default handlers. Default handler
303 *    will be weak symbol and just dead loops. They can be
304 *    overwritten by other handlers */
305    .macro def_irq_handler  handler_name
306    .weak \handler_name
307    .set  \handler_name, DefaultISR
308    .endm
309
310/* Exception Handlers */
311    def_irq_handler    DMA0_DriverIRQHandler
312    def_irq_handler    DMA1_DriverIRQHandler
313    def_irq_handler    DMA2_DriverIRQHandler
314    def_irq_handler    DMA3_DriverIRQHandler
315    def_irq_handler    DMA_Error_DriverIRQHandler
316    def_irq_handler    FTFA_IRQHandler
317    def_irq_handler    PMC_IRQHandler
318    def_irq_handler    LLWU_IRQHandler
319    def_irq_handler    I2C0_DriverIRQHandler
320    def_irq_handler    Reserved25_IRQHandler
321    def_irq_handler    SPI0_DriverIRQHandler
322    def_irq_handler    Reserved27_IRQHandler
323    def_irq_handler    UART0_DriverIRQHandler
324    def_irq_handler    UART1_DriverIRQHandler
325    def_irq_handler    Reserved30_IRQHandler
326    def_irq_handler    ADC0_IRQHandler
327    def_irq_handler    ADC1_IRQHandler
328    def_irq_handler    FTM0_IRQHandler
329    def_irq_handler    FTM1_IRQHandler
330    def_irq_handler    FTM2_IRQHandler
331    def_irq_handler    CMP0_IRQHandler
332    def_irq_handler    CMP1_IRQHandler
333    def_irq_handler    Reserved38_IRQHandler
334    def_irq_handler    WDOG_EWM_IRQHandler
335    def_irq_handler    Reserved40_IRQHandler
336    def_irq_handler    DAC0_IRQHandler
337    def_irq_handler    Reserved42_IRQHandler
338    def_irq_handler    MCG_IRQHandler
339    def_irq_handler    LPTMR0_IRQHandler
340    def_irq_handler    PDB0_IRQHandler
341    def_irq_handler    PORTA_IRQHandler
342    def_irq_handler    PORTB_PORTC_PORTD_PORTE_IRQHandler
343
344    .end
345