1/*
2** ###################################################################
3**     Processors:          MIMXRT1064CVJ5A
4**                          MIMXRT1064CVJ5B
5**                          MIMXRT1064CVL5A
6**                          MIMXRT1064CVL5B
7**                          MIMXRT1064DVJ6A
8**                          MIMXRT1064DVJ6B
9**                          MIMXRT1064DVL6A
10**                          MIMXRT1064DVL6B
11**
12**     Compiler:            GNU C Compiler
13**     Reference manual:    IMXRT1064RM Rev.2, 7/2021 | IMXRT106XSRM Rev.0
14**     Version:             rev. 0.1, 2018-06-22
15**     Build:               b230821
16**
17**     Abstract:
18**         Linker file for the GNU C Compiler
19**
20**     Copyright 2016 Freescale Semiconductor, Inc.
21**     Copyright 2016-2023 NXP
22**     SPDX-License-Identifier: BSD-3-Clause
23**
24**     http:                 www.nxp.com
25**     mail:                 support@nxp.com
26**
27** ###################################################################
28*/
29
30/* Entry Point */
31ENTRY(Reset_Handler)
32
33HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
34STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
35VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x00000400 : 0;
36NCACHE_HEAP_START = DEFINED(__heap_noncacheable__) ? 0x82000000 - HEAP_SIZE : 0x81E00000 - HEAP_SIZE;
37NCACHE_HEAP_SIZE  = DEFINED(__heap_noncacheable__) ? HEAP_SIZE : 0x0000;
38
39/* Specify the memory areas */
40MEMORY
41{
42  m_flash_config        (RX)  : ORIGIN = 0x70000000, LENGTH = 0x00001000
43  m_ivt                 (RX)  : ORIGIN = 0x70001000, LENGTH = 0x00001000
44  m_interrupts          (RX)  : ORIGIN = 0x70002000, LENGTH = 0x00000400
45  m_text                (RX)  : ORIGIN = 0x70002400, LENGTH = 0x003FDC00
46  m_qacode              (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
47  m_data                (RW)  : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E00000 : 0x01E00000 - HEAP_SIZE
48  m_ncache              (RW)  : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x00200000 - HEAP_SIZE : 0x00200000
49  m_data2               (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00020000
50  m_data3               (RW)  : ORIGIN = 0x20200000, LENGTH = 0x000C0000
51  m_heap                (RW)  : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE
52}
53
54/* Define output sections */
55SECTIONS
56{
57  __NCACHE_REGION_START = ORIGIN(m_ncache);
58  __NCACHE_REGION_SIZE  = LENGTH(m_ncache) + NCACHE_HEAP_SIZE;
59
60  .flash_config :
61  {
62    . = ALIGN(4);
63    __FLASH_BASE = .;
64    KEEP(* (.boot_hdr.conf))     /* flash config section */
65    . = ALIGN(4);
66  } > m_flash_config
67
68  ivt_begin = ORIGIN(m_flash_config) + LENGTH(m_flash_config);
69
70  .ivt : AT(ivt_begin)
71  {
72    . = ALIGN(4);
73    KEEP(* (.boot_hdr.ivt))           /* ivt section */
74    KEEP(* (.boot_hdr.boot_data))     /* boot section */
75    KEEP(* (.boot_hdr.dcd_data))      /* dcd section */
76    . = ALIGN(4);
77  } > m_ivt
78
79  /* The startup code goes first into internal RAM */
80  .interrupts :
81  {
82    __VECTOR_TABLE = .;
83    __Vectors = .;
84    . = ALIGN(4);
85    KEEP(*(.isr_vector))     /* Startup code */
86    . = ALIGN(4);
87  } > m_interrupts
88
89  /* The program code and other data goes into internal RAM */
90  .text :
91  {
92    . = ALIGN(4);
93    *(.text)                 /* .text sections (code) */
94    *(.text*)                /* .text* sections (code) */
95    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
96    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
97    *(.glue_7)               /* glue arm to thumb code */
98    *(.glue_7t)              /* glue thumb to arm code */
99    *(.eh_frame)
100    KEEP (*(.init))
101    KEEP (*(.fini))
102    . = ALIGN(4);
103  } > m_text
104
105  .ARM.extab :
106  {
107    *(.ARM.extab* .gnu.linkonce.armextab.*)
108  } > m_text
109
110  .ARM :
111  {
112    __exidx_start = .;
113    *(.ARM.exidx*)
114    __exidx_end = .;
115  } > m_text
116
117 .ctors :
118  {
119    __CTOR_LIST__ = .;
120    /* gcc uses crtbegin.o to find the start of
121       the constructors, so we make sure it is
122       first.  Because this is a wildcard, it
123       doesn't matter if the user does not
124       actually link against crtbegin.o; the
125       linker won't look for a file to match a
126       wildcard.  The wildcard also means that it
127       doesn't matter which directory crtbegin.o
128       is in.  */
129    KEEP (*crtbegin.o(.ctors))
130    KEEP (*crtbegin?.o(.ctors))
131    /* We don't want to include the .ctor section from
132       from the crtend.o file until after the sorted ctors.
133       The .ctor section from the crtend file contains the
134       end of ctors marker and it must be last */
135    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
136    KEEP (*(SORT(.ctors.*)))
137    KEEP (*(.ctors))
138    __CTOR_END__ = .;
139  } > m_text
140
141  .dtors :
142  {
143    __DTOR_LIST__ = .;
144    KEEP (*crtbegin.o(.dtors))
145    KEEP (*crtbegin?.o(.dtors))
146    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
147    KEEP (*(SORT(.dtors.*)))
148    KEEP (*(.dtors))
149    __DTOR_END__ = .;
150  } > m_text
151
152  .preinit_array :
153  {
154    PROVIDE_HIDDEN (__preinit_array_start = .);
155    KEEP (*(.preinit_array*))
156    PROVIDE_HIDDEN (__preinit_array_end = .);
157  } > m_text
158
159  .init_array :
160  {
161    PROVIDE_HIDDEN (__init_array_start = .);
162    KEEP (*(SORT(.init_array.*)))
163    KEEP (*(.init_array*))
164    PROVIDE_HIDDEN (__init_array_end = .);
165  } > m_text
166
167  .fini_array :
168  {
169    PROVIDE_HIDDEN (__fini_array_start = .);
170    KEEP (*(SORT(.fini_array.*)))
171    KEEP (*(.fini_array*))
172    PROVIDE_HIDDEN (__fini_array_end = .);
173  } > m_text
174
175  __etext = .;    /* define a global symbol at end of code */
176  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
177
178  .interrupts_ram :
179  {
180    . = ALIGN(4);
181    __VECTOR_RAM__ = .;
182    __interrupts_ram_start__ = .; /* Create a global symbol at data start */
183    *(.m_interrupts_ram)     /* This is a user defined section */
184    . += VECTOR_RAM_SIZE;
185    . = ALIGN(4);
186    __interrupts_ram_end__ = .; /* Define a global symbol at data end */
187  } > m_data
188
189  __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
190  __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
191
192  .data : AT(__DATA_ROM)
193  {
194    . = ALIGN(4);
195    __DATA_RAM = .;
196    __data_start__ = .;      /* create a global symbol at data start */
197    *(m_usb_dma_init_data)
198    *(.data)                 /* .data sections */
199    *(.data*)                /* .data* sections */
200    KEEP(*(.jcr*))
201    . = ALIGN(4);
202    __data_end__ = .;        /* define a global symbol at data end */
203  } > m_data
204
205  __ram_function_flash_start = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for TCM data initialization */
206
207  .ram_function : AT(__ram_function_flash_start)
208  {
209    . = ALIGN(32);
210    __ram_function_start__ = .;
211    *(CodeQuickAccess)
212    . = ALIGN(128);
213    __ram_function_end__ = .;
214  } > m_qacode
215
216  __NDATA_ROM = __ram_function_flash_start + (__ram_function_end__ - __ram_function_start__);
217  .ncache.init : AT(__NDATA_ROM)
218  {
219    __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
220    *(NonCacheable.init)
221    . = ALIGN(4);
222    __noncachedata_init_end__ = .;   /* create a global symbol at initialized ncache data end */
223  } > m_ncache
224  . = __noncachedata_init_end__;
225  .ncache :
226  {
227    *(NonCacheable)
228    . = ALIGN(4);
229    __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
230  } > m_ncache
231
232  __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
233  text_end = ORIGIN(m_text) + LENGTH(m_text);
234  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
235
236  .qadata :
237  {
238    . = ALIGN(4);
239    *(DataQuickAccess)       /* quick access data section */
240    . = ALIGN(4);
241  } > m_data2
242
243  /* Uninitialized data section */
244  .bss :
245  {
246    /* This is used by the startup in order to initialize the .bss section */
247    . = ALIGN(4);
248    __START_BSS = .;
249    __bss_start__ = .;
250    *(m_usb_dma_noninit_data)
251    *(.bss)
252    *(.bss*)
253    *(COMMON)
254    . = ALIGN(4);
255    __bss_end__ = .;
256    __END_BSS = .;
257  } > m_data
258
259  .heap :
260  {
261    . = ALIGN(8);
262    __end__ = .;
263    PROVIDE(end = .);
264    __HeapBase = .;
265    . += HEAP_SIZE;
266    __HeapLimit = .;
267    __heap_limit = .; /* Add for _sbrk */
268  } > m_heap
269
270  .stack :
271  {
272    . = ALIGN(8);
273    . += STACK_SIZE;
274  } > m_data
275
276  /* Initializes stack on the end of block */
277  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
278  __StackLimit = __StackTop - STACK_SIZE;
279  PROVIDE(__stack = __StackTop);
280
281  .ARM.attributes 0 : { *(.ARM.attributes) }
282}
283