1 /*
2  * Copyright 2017-2020 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef _FSL_ROMAPI_H_
9 #define _FSL_ROMAPI_H_
10 
11 #include "fsl_common.h"
12 
13 /*!
14  * @addtogroup romapi
15  * @{
16  */
17 
18 /*! @brief ROM API version 1.0.2. */
19 #define FSL_ROM_ROMAPI_VERSION (MAKE_VERSION(1U, 0U, 2U))
20 /*! @brief ROM FLEXSPI NOR driver version 1.5.0. */
21 #define FSL_ROM_FLEXSPINOR_DRIVER_VERSION (MAKE_VERSION(1U, 5U, 0U))
22 
23 /*!
24  * @name Common ROMAPI fearures info defines
25  * @{
26  */
27 /* @brief ROM has FLEXSPI NOR API. */
28 #define FSL_ROM_HAS_FLEXSPINOR_API (1)
29 /* @brief ROM has run bootloader API. */
30 #define FSL_ROM_HAS_RUNBOOTLOADER_API (1)
31 /* @brief ROM has FLEXSPI NOR get config API. */
32 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG (1)
33 /* @brief ROM has flash init API. */
34 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_FLASH_INIT (1)
35 /* @brief ROM has erase API. */
36 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE (1)
37 /* @brief ROM has erase sector API. */
38 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR (0)
39 /* @brief ROM has erase block API. */
40 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK (0)
41 /* @brief ROM has erase all API. */
42 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL (1)
43 /* @brief ROM has read API. */
44 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ (1)
45 /* @brief ROM has update lut API. */
46 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT (1)
47 /* @brief ROM has FLEXSPI command API. */
48 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER (1)
49 
50 /*@}*/
51 
52 #define kROM_StatusGroup_FLEXSPI    60U  /*!< ROM FLEXSPI status group number.*/
53 #define kROM_StatusGroup_FLEXSPINOR 200U /*!< ROM FLEXSPI NOR status group number.*/
54 
55 #define FSL_ROM_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)                                                      \
56     (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
57      FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
58 
59 /*! @brief Generate bit mask */
60 #define FSL_ROM_FLEXSPI_BITMASK(bit_offset) (1U << (bit_offset))
61 
62 /*! @brief FLEXSPI memory config block related defintions */
63 #define FLEXSPI_CFG_BLK_TAG     (0x42464346UL) /*!< ascii "FCFB" Big Endian */
64 #define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) /*!< V1.4.0 */
65 
66 #define CMD_SDR        0x01U
67 #define CMD_DDR        0x21U
68 #define RADDR_SDR      0x02U
69 #define RADDR_DDR      0x22U
70 #define CADDR_SDR      0x03U
71 #define CADDR_DDR      0x23U
72 #define MODE1_SDR      0x04U
73 #define MODE1_DDR      0x24U
74 #define MODE2_SDR      0x05U
75 #define MODE2_DDR      0x25U
76 #define MODE4_SDR      0x06U
77 #define MODE4_DDR      0x26U
78 #define MODE8_SDR      0x07U
79 #define MODE8_DDR      0x27U
80 #define WRITE_SDR      0x08U
81 #define WRITE_DDR      0x28U
82 #define READ_SDR       0x09U
83 #define READ_DDR       0x29U
84 #define LEARN_SDR      0x0AU
85 #define LEARN_DDR      0x2AU
86 #define DATSZ_SDR      0x0BU
87 #define DATSZ_DDR      0x2BU
88 #define DUMMY_SDR      0x0CU
89 #define DUMMY_DDR      0x2CU
90 #define DUMMY_RWDS_SDR 0x0DU
91 #define DUMMY_RWDS_DDR 0x2DU
92 #define JMP_ON_CS      0x1FU
93 #define STOP           0U
94 
95 #define FLEXSPI_1PAD 0U
96 #define FLEXSPI_2PAD 1U
97 #define FLEXSPI_4PAD 2U
98 #define FLEXSPI_8PAD 3U
99 
100 /*!
101  * NOR LUT sequence index used for default LUT assignment
102  * NOTE:
103  *      The will take effect if the lut sequences are not customized.
104  */
105 #define NOR_CMD_LUT_SEQ_IDX_READ       0U /*!< READ LUT sequence id in lookupTable stored in config block */
106 #define NOR_CMD_LUT_SEQ_IDX_READSTATUS 1U /*!< Read Status LUT sequence id in lookupTable stored in config block */
107 #define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
108     2U /*!< Read status DPI/QPI/OPI sequence id in lookupTable stored in config block */
109 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 3U /*!< Write Enable sequence id in lookupTable stored in config block */
110 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
111     4U /*!< Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block */
112 #define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5U /*!< Erase Sector sequence id in lookupTable stored in config block */
113 #define NOR_CMD_LUT_SEQ_IDX_READID      7U
114 #define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK  8U  /*!< Erase Block sequence id in lookupTable stored in config block */
115 #define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM 9U  /*!< Program sequence id in lookupTable stored in config block */
116 #define NOR_CMD_LUT_SEQ_IDX_CHIPERASE   11U /*!< Chip Erase sequence in lookupTable id stored in config block */
117 #define NOR_CMD_LUT_SEQ_IDX_READ_SFDP   13U /*!< Read SFDP sequence in lookupTable id stored in config block */
118 #define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
119     14U /*!< Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */
120 #define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
121     15U /*!< Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk */
122 
123 /*!
124  * @name Configuration Option
125  * @{
126  */
127 /*! @brief Serial NOR Configuration Option. */
128 typedef struct _serial_nor_config_option
129 {
130     union
131     {
132         struct
133         {
134             uint32_t max_freq : 4;          /*!< Maximum supported Frequency */
135             uint32_t misc_mode : 4;         /*!< miscellaneous mode */
136             uint32_t quad_mode_setting : 4; /*!< Quad mode setting */
137             uint32_t cmd_pads : 4;          /*!< Command pads */
138             uint32_t query_pads : 4;        /*!< SFDP read pads */
139             uint32_t device_type : 4;       /*!< Device type */
140             uint32_t option_size : 4;       /*!< Option size, in terms of uint32_t, size = (option_size + 1) * 4 */
141             uint32_t tag : 4;               /*!< Tag, must be 0x0C */
142         } B;
143         uint32_t U;
144     } option0;
145 
146     union
147     {
148         struct
149         {
150             uint32_t dummy_cycles : 8;     /*!< Dummy cycles before read */
151             uint32_t status_override : 8;  /*!< Override status register value during device mode configuration */
152             uint32_t pinmux_group : 4;     /*!< The pinmux group selection */
153             uint32_t dqs_pinmux_group : 4; /*!< The DQS Pinmux Group Selection */
154             uint32_t drive_strength : 4;   /*!< The Drive Strength of FlexSPI Pads */
155             uint32_t flash_connection : 4; /*!< Flash connection option: 0 - Single Flash connected to port A, 1 -
156                                                 Parallel mode, 2 - Single Flash connected to Port B */
157         } B;
158         uint32_t U;
159     } option1;
160 
161 } serial_nor_config_option_t;
162 
163 /*@}*/
164 
165 /*!
166  * @name Support for init FLEXSPI NOR configuration
167  * @{
168  */
169 /*! @brief Flash Pad Definitions */
170 enum
171 {
172     kSerialFlash_1Pad  = 1U,
173     kSerialFlash_2Pads = 2U,
174     kSerialFlash_4Pads = 4U,
175     kSerialFlash_8Pads = 8U,
176 };
177 
178 /*! @brief FLEXSPI clock configuration type */
179 enum
180 {
181     kFLEXSPIClk_SDR, /*!< Clock configure for SDR mode */
182     kFLEXSPIClk_DDR, /*!< Clock configurat for DDR mode */
183 };
184 
185 /*! @brief FLEXSPI Read Sample Clock Source definition */
186 enum _flexspi_read_sample_clk
187 {
188     kFLEXSPIReadSampleClk_LoopbackInternally      = 0U,
189     kFLEXSPIReadSampleClk_LoopbackFromDqsPad      = 1U,
190     kFLEXSPIReadSampleClk_LoopbackFromSckPad      = 2U,
191     kFLEXSPIReadSampleClk_ExternalInputFromDqsPad = 3U,
192 };
193 
194 /*! @brief Flash Type Definition */
195 enum
196 {
197     kFLEXSPIDeviceType_SerialNOR = 1U, /*!< Flash device is Serial NOR */
198 };
199 
200 /*! @brief Flash Configuration Command Type */
201 enum
202 {
203     kDeviceConfigCmdType_Generic,    /*!< Generic command, for example: configure dummy cycles, drive strength, etc */
204     kDeviceConfigCmdType_QuadEnable, /*!< Quad Enable command */
205     kDeviceConfigCmdType_Spi2Xpi,    /*!< Switch from SPI to DPI/QPI/OPI mode */
206     kDeviceConfigCmdType_Xpi2Spi,    /*!< Switch from DPI/QPI/OPI to SPI mode */
207     kDeviceConfigCmdType_Spi2NoCmd,  /*!< Switch to 0-4-4/0-8-8 mode */
208     kDeviceConfigCmdType_Reset,      /*!< Reset device command */
209 };
210 
211 /*! @brief Defintions for FLEXSPI Serial Clock Frequency */
212 enum _flexspi_serial_clk_freq
213 {
214     kFLEXSPISerialClk_NoChange = 0U,
215     kFLEXSPISerialClk_30MHz    = 1U,
216     kFLEXSPISerialClk_50MHz    = 2U,
217     kFLEXSPISerialClk_60MHz    = 3U,
218     kFLEXSPISerialClk_75MHz    = 4U,
219     kFLEXSPISerialClk_80MHz    = 5U,
220     kFLEXSPISerialClk_100MHz   = 6U,
221     kFLEXSPISerialClk_133MHz   = 7U,
222     kFLEXSPISerialClk_166MHz   = 8U,
223     kFLEXSPISerialClk_200MHz   = 9U,
224 };
225 
226 /*! @brief Misc feature bit definitions */
227 enum
228 {
229     kFLEXSPIMiscOffset_DiffClkEnable            = 0U, /*!< Bit for Differential clock enable */
230     kFLEXSPIMiscOffset_Ck2Enable                = 1U, /*!< Bit for CK2 enable */
231     kFLEXSPIMiscOffset_ParallelEnable           = 2U, /*!< Bit for Parallel mode enable */
232     kFLEXSPIMiscOffset_WordAddressableEnable    = 3U, /*!< Bit for Word Addressable enable */
233     kFLEXSPIMiscOffset_SafeConfigFreqEnable     = 4U, /*!< Bit for Safe Configuration Frequency enable */
234     kFLEXSPIMiscOffset_PadSettingOverrideEnable = 5U, /*!< Bit for Pad setting override enable */
235     kFLEXSPIMiscOffset_DdrModeEnable            = 6U, /*!< Bit for DDR clock confiuration indication. */
236     kFLEXSPIMiscOffset_UseValidTimeForAllFreq   = 7U, /*!< Bit for DLLCR settings under all modes */
237 };
238 
239 /*! @brief Manufacturer ID */
240 enum
241 {
242     kSerialFlash_ISSI_ManufacturerID    = 0x9DU, /*!< Manufacturer ID of the ISSI serial flash */
243     kSerialFlash_Adesto_ManufacturerID  = 0x1F,  /*!< Manufacturer ID of the Adesto Technologies serial flash*/
244     kSerialFlash_Winbond_ManufacturerID = 0xEFU, /*!< Manufacturer ID of the Winbond serial flash */
245     kSerialFlash_Cypress_ManufacturerID = 0x01U, /*!< Manufacturer ID for Cypress */
246 };
247 
248 /*@}*/
249 
250 /*! @brief ROM FLEXSPI NOR flash status */
251 enum _flexspi_nor_status
252 {
253     kStatus_ROM_FLEXSPI_SequenceExecutionTimeout =
254         MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 0), /*!< Status for Sequence Execution timeout */
255     kStatus_ROM_FLEXSPI_InvalidSequence = MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 1), /*!< Status for Invalid Sequence */
256     kStatus_ROM_FLEXSPI_DeviceTimeout   = MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 2), /*!< Status for Device timeout */
257     kStatus_FLEXSPINOR_DTRRead_DummyProbeFailed =
258         MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 10), /*!< Status for DDR Read dummy probe failure */
259     kStatus_ROM_FLEXSPINOR_SFDP_NotFound =
260         MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 7), /*!< Status for SFDP read failure */
261     kStatus_ROM_FLEXSPINOR_Flash_NotFound =
262         MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 9), /*!< Status for Flash detection failure */
263 };
264 
265 /*!
266  * @name FLEXSPI NOR Configuration
267  * @{
268  */
269 
270 /*! @brief FLEXSPI LUT Sequence structure */
271 typedef struct _flexspi_lut_seq
272 {
273     uint8_t seqNum; /*!< Sequence Number, valid number: 1-16 */
274     uint8_t seqId;  /*!< Sequence Index, valid number: 0-15 */
275     uint16_t reserved;
276 } flexspi_lut_seq_t;
277 
278 typedef struct
279 {
280     uint8_t time_100ps;  /*!< Data valid time, in terms of 100ps */
281     uint8_t delay_cells; /*!< Data valid time, in terms of delay cells */
282 } flexspi_dll_time_t;
283 
284 /*! @brief FLEXSPI Memory Configuration Block */
285 typedef struct _flexspi_mem_config
286 {
287     uint32_t tag;       /*!< [0x000-0x003] Tag, fixed value 0x42464346UL */
288     uint32_t version;   /*!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix */
289     uint32_t reserved0; /*!< [0x008-0x00b] Reserved for future use */
290     uint8_t readSampleClkSrc;    /*!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 */
291     uint8_t csHoldTime;          /*!< [0x00d-0x00d] Data hold time, default value: 3 */
292     uint8_t csSetupTime;         /*!< [0x00e-0x00e] Date setup time, default value: 3 */
293     uint8_t columnAddressWidth;  /*!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For
294                                                     Serial NAND, need to refer to datasheet */
295     uint8_t deviceModeCfgEnable; /*!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable */
296     uint8_t deviceModeType; /*!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch,
297                                                Generic configuration, etc. */
298     uint16_t waitTimeCfgCommands;    /*!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for
299                                                         DPI/QPI/OPI switch or reset command */
300     flexspi_lut_seq_t deviceModeSeq; /*!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt
301                                                         sequence number, [31:16] Reserved */
302     uint32_t deviceModeArg;          /*!< [0x018-0x01b] Argument/Parameter for device configuration */
303     uint8_t configCmdEnable;         /*!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable */
304     uint8_t configModeType[3];       /*!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe */
305     flexspi_lut_seq_t
306         configCmdSeqs[3]; /*!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq */
307     uint32_t reserved1;   /*!< [0x02c-0x02f] Reserved for future use */
308     uint32_t configCmdArgs[3];     /*!< [0x030-0x03b] Arguments/Parameters for device Configuration commands */
309     uint32_t reserved2;            /*!< [0x03c-0x03f] Reserved for future use */
310     uint32_t controllerMiscOption; /*!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more
311                                       details */
312     uint8_t deviceType;            /*!< [0x044-0x044] Device Type:  See Flash Type Definition for more details */
313     uint8_t sflashPadType; /*!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal */
314     uint8_t serialClkFreq; /*!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot
315                                               Chapter for more details */
316     uint8_t
317         lutCustomSeqEnable; /*!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot
318                                               be done using 1 LUT sequence, currently, only applicable to HyperFLASH */
319     uint32_t reserved3[2];  /*!< [0x048-0x04f] Reserved for future use */
320     uint32_t sflashA1Size;  /*!< [0x050-0x053] Size of Flash connected to A1 */
321     uint32_t sflashA2Size;  /*!< [0x054-0x057] Size of Flash connected to A2 */
322     uint32_t sflashB1Size;  /*!< [0x058-0x05b] Size of Flash connected to B1 */
323     uint32_t sflashB2Size;  /*!< [0x05c-0x05f] Size of Flash connected to B2 */
324     uint32_t csPadSettingOverride;       /*!< [0x060-0x063] CS pad setting override value */
325     uint32_t sclkPadSettingOverride;     /*!< [0x064-0x067] SCK pad setting override value */
326     uint32_t dataPadSettingOverride;     /*!< [0x068-0x06b] data pad setting override value */
327     uint32_t dqsPadSettingOverride;      /*!< [0x06c-0x06f] DQS pad setting override value */
328     uint32_t timeoutInMs;                /*!< [0x070-0x073] Timeout threshold for read status command */
329     uint32_t commandInterval;            /*!< [0x074-0x077] CS deselect interval between two commands */
330     flexspi_dll_time_t dataValidTime[2]; /*!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B */
331     uint16_t busyOffset;                 /*!< [0x07c-0x07d] Busy offset, valid value: 0-31 */
332     uint16_t busyBitPolarity; /*!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -
333                                                  busy flag is 0 when flash device is busy */
334     uint32_t lookupTable[64]; /*!< [0x080-0x17f] Lookup table holds Flash command sequences */
335     flexspi_lut_seq_t lutCustomSeq[12]; /*!< [0x180-0x1af] Customizable LUT Sequences */
336     uint32_t reserved4[4];              /*!< [0x1b0-0x1bf] Reserved for future use */
337 } flexspi_mem_config_t;
338 
339 /*! @brief  Serial NOR configuration block */
340 typedef struct _flexspi_nor_config
341 {
342     flexspi_mem_config_t memConfig; /*!< Common memory configuration info via FLEXSPI */
343     uint32_t pageSize;              /*!< Page size of Serial NOR */
344     uint32_t sectorSize;            /*!< Sector size of Serial NOR */
345     uint8_t ipcmdSerialClkFreq;     /*!< Clock frequency for IP command */
346     uint8_t isUniformBlockSize;     /*!< Sector/Block size is the same */
347     uint8_t isDataOrderSwapped;     /*!< Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2) */
348     uint8_t reserved0[1];           /*!< Reserved for future use */
349     uint8_t serialNorType;          /*!< Serial NOR Flash type: 0/1/2/3 */
350     uint8_t needExitNoCmdMode;      /*!< Need to exit NoCmd mode before other IP command */
351     uint8_t halfClkForNonReadCmd;   /*!< Half the Serial Clock for non-read command: true/false */
352     uint8_t needRestoreNoCmdMode;   /*!< Need to Restore NoCmd mode after IP commmand execution */
353     uint32_t blockSize;             /*!< Block size */
354     uint32_t reserve2[11];          /*!< Reserved for future use */
355 } flexspi_nor_config_t;
356 
357 /*@}*/
358 
359 /*! @brief FLEXSPI Operation Context */
360 typedef enum _flexspi_operation
361 {
362     kFLEXSPIOperation_Command, /*!< FLEXSPI operation: Only command, both TX and RX buffer are ignored. */
363     kFLEXSPIOperation_Config,  /*!< FLEXSPI operation: Configure device mode, the TX FIFO size is fixed in LUT. */
364     kFLEXSPIOperation_Write,   /*!< FLEXSPI operation: Write, only TX buffer is effective */
365     kFLEXSPIOperation_Read,    /*!< FLEXSPI operation: Read, only Rx Buffer is effective. */
366 } flexspi_operation_t;
367 
368 /*! @brief FLEXSPI Transfer Context */
369 typedef struct _flexspi_xfer
370 {
371     flexspi_operation_t operation; /*!< FLEXSPI operation */
372     uint32_t baseAddress;          /*!< FLEXSPI operation base address */
373     uint32_t seqId;                /*!< Sequence Id */
374     uint32_t seqNum;               /*!< Sequence Number */
375     bool isParallelModeEnable;     /*!< Is a parallel transfer */
376     uint32_t *txBuffer;            /*!< Tx buffer */
377     uint32_t txSize;               /*!< Tx size in bytes */
378     uint32_t *rxBuffer;            /*!< Rx buffer */
379     uint32_t rxSize;               /*!< Rx size in bytes */
380 } flexspi_xfer_t;
381 
382 #ifdef __cplusplus
383 extern "C" {
384 #endif
385 
386 #if defined(FSL_FEATURE_BOOT_ROM_HAS_ROMAPI) && FSL_FEATURE_BOOT_ROM_HAS_ROMAPI
387 
388 /*!
389  * @name Enter Bootloader
390  * @{
391  */
392 
393 #if defined(FSL_ROM_HAS_RUNBOOTLOADER_API) && FSL_ROM_HAS_RUNBOOTLOADER_API
394 /*!
395  * @brief Enter Bootloader.
396  *
397  * @param arg A pointer to the storage for the bootloader param.
398  *        refer to System Boot Chapter in device reference manual for details.
399  */
400 void ROM_RunBootloader(void *arg);
401 #endif /* FSL_ROM_HAS_RUNBOOTLOADER_API */
402 
403 /*@}*/
404 
405 /*!
406  * @name Initialization
407  * @{
408  */
409 
410 /*!
411  * @brief Initialize Serial NOR devices via FLEXSPI
412  *
413  * This function checks and initializes the FLEXSPI module for the other FLEXSPI APIs.
414  *
415  * @param instance storage the instance of FLEXSPI.
416  * @param config A pointer to the storage for the driver runtime state.
417  *
418  * @retval kStatus_Success Api was executed succesfuly.
419  * @retval kStatus_InvalidArgument A invalid argument is provided.
420  * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
421  * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
422  * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
423  */
424 status_t ROM_FLEXSPI_NorFlash_Init(uint32_t instance, flexspi_nor_config_t *config);
425 
426 /*@}*/
427 
428 /*!
429  * @name Programming
430  * @{
431  */
432 
433 /*!
434  * @brief Program data to Serial NOR via FLEXSPI.
435  *
436  * This function programs the NOR flash memory with the dest address for a given
437  * flash area as determined by the dst address and the length.
438  *
439  * @param instance storage the instance of FLEXSPI.
440  * @param config  A pointer to the storage for the driver runtime state.
441  * @param dstAddr A pointer to the desired flash memory to be programmed.
442  *                NOTE:
443  *                It is recommended that use page aligned access;
444  *                If the dstAddr is not aligned to page,the driver automatically
445  *                aligns address down with the page address.
446  * @param src A pointer to the source buffer of data that is to be programmed
447  *            into the NOR flash.
448  *
449  * @retval kStatus_Success Api was executed succesfuly.
450  * @retval kStatus_InvalidArgument A invalid argument is provided.
451  * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
452  * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
453  * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
454  */
455 status_t ROM_FLEXSPI_NorFlash_ProgramPage(uint32_t instance,
456                                           flexspi_nor_config_t *config,
457                                           uint32_t dstAddr,
458                                           const uint32_t *src);
459 
460 /*@}*/
461 
462 /*!
463  * @name Reading
464  * @{
465  */
466 
467 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ
468 /*!
469  * @brief Read data from Serial NOR via FLEXSPI.
470  *
471  * This function read the NOR flash memory with the start address for a given
472  * flash area as determined by the dst address and the length.
473  *
474  * @param instance storage the instance of FLEXSPI.
475  * @param config  A pointer to the storage for the driver runtime state.
476  * @param dst     A pointer to the dest buffer of data that is to be read from the NOR flash.
477  *                NOTE:
478  *                It is recommended that use page aligned access;
479  *                If the dstAddr is not aligned to page,the driver automatically
480  *                aligns address down with the page address.
481  * @param start   The start address of the desired NOR flash memory to be read.
482  * @param lengthInBytes The length, given in bytes to be read.
483  *
484  * @retval kStatus_Success Api was executed succesfuly.
485  * @retval kStatus_InvalidArgument A invalid argument is provided.
486  * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
487  * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
488  * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
489  */
490 status_t ROM_FLEXSPI_NorFlash_Read(
491     uint32_t instance, flexspi_nor_config_t *config, uint32_t *dst, uint32_t start, uint32_t lengthInBytes);
492 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ */
493 
494 /*@}*/
495 
496 /*!
497  * @name Erasing
498  * @{
499  */
500 
501 /*!
502  * @brief Erase Flash Region specified by address and length
503  *
504  * This function erases the appropriate number of flash sectors based on the
505  * desired start address and length.
506  *
507  * @param instance storage the index of FLEXSPI.
508  * @param config A pointer to the storage for the driver runtime state.
509  * @param start The start address of the desired NOR flash memory to be erased.
510  *              NOTE:
511  *              It is recommended that use sector-aligned access nor device;
512  *              If dstAddr is not aligned with the sector,the driver automatically
513  *              aligns address down with the sector address.
514  * @param length The length, given in bytes to be erased.
515  *              NOTE:
516  *              It is recommended that use sector-aligned access nor device;
517  *              If length is not aligned with the sector,the driver automatically
518  *              aligns up with the sector.
519  * @retval kStatus_Success Api was executed succesfuly.
520  * @retval kStatus_InvalidArgument A invalid argument is provided.
521  * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
522  * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
523  * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
524  */
525 status_t ROM_FLEXSPI_NorFlash_Erase(uint32_t instance, flexspi_nor_config_t *config, uint32_t start, uint32_t length);
526 
527 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL
528 /*!
529  * @brief Erase all the Serial NOR devices connected on FLEXSPI.
530  *
531  * @param instance storage the instance of FLEXSPI.
532  * @param config A pointer to the storage for the driver runtime state.
533  *
534  * @retval kStatus_Success Api was executed succesfuly.
535  * @retval kStatus_InvalidArgument A invalid argument is provided.
536  * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
537  * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
538  * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
539  */
540 status_t ROM_FLEXSPI_NorFlash_EraseAll(uint32_t instance, flexspi_nor_config_t *config);
541 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL */
542 
543 /*@}*/
544 
545 /*!
546  * @name Command
547  * @{
548  */
549 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER
550 /*!
551  * @brief FLEXSPI command
552  *
553  * This function is used to perform the command write sequence to the NOR device.
554  *
555  * @param instance storage the index of FLEXSPI.
556  * @param xfer A pointer to the storage FLEXSPI Transfer Context.
557  *
558  * @retval kStatus_Success Api was executed succesfuly.
559  * @retval kStatus_InvalidArgument A invalid argument is provided.
560  * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
561  * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
562  */
563 status_t ROM_FLEXSPI_NorFlash_CommandXfer(uint32_t instance, flexspi_xfer_t *xfer);
564 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER */
565 /*@}*/
566 
567 /*!
568  * @name UpdateLut
569  * @{
570  */
571 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT
572 /*!
573  * @brief Configure FLEXSPI Lookup table
574  *
575  * @param instance storage the index of FLEXSPI.
576  * @param seqIndex storage the sequence Id.
577  * @param lutBase A pointer to the look-up-table for command sequences.
578  * @param seqNumber storage sequence number.
579  *
580  * @retval kStatus_Success Api was executed succesfuly.
581  * @retval kStatus_InvalidArgument A invalid argument is provided.
582  * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
583  * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
584  */
585 status_t ROM_FLEXSPI_NorFlash_UpdateLut(uint32_t instance,
586                                         uint32_t seqIndex,
587                                         const uint32_t *lutBase,
588                                         uint32_t seqNumber);
589 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT */
590 
591 /*@}*/
592 
593 /*!
594  * @name ClearCache
595  * @{
596  */
597 
598 /*!
599  * @brief Software reset for the FLEXSPI logic.
600  *
601  * This function sets the software reset flags for both AHB and buffer domain and
602  * resets both AHB buffer and also IP FIFOs.
603  *
604  * @param instance storage the index of FLEXSPI.
605  */
606 void ROM_FLEXSPI_NorFlash_ClearCache(uint32_t instance);
607 
608 /*@}*/
609 
610 /*!
611  * @name GetConfig
612  * @{
613  */
614 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG
615 /*!
616  * @brief Get FLEXSPI NOR Configuration Block based on specified option.
617  *
618  * @param instance storage the instance of FLEXSPI.
619  * @param config A pointer to the storage for the driver runtime state.
620  * @param option A pointer to the storage Serial NOR Configuration Option Context.
621  *
622  * @retval kStatus_Success Api was executed succesfuly.
623  * @retval kStatus_InvalidArgument A invalid argument is provided.
624  */
625 status_t ROM_FLEXSPI_NorFlash_GetConfig(uint32_t instance,
626                                         flexspi_nor_config_t *config,
627                                         serial_nor_config_option_t *option);
628 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG */
629 
630 /*@}*/
631 
632 #endif /* FSL_FEATURE_BOOT_ROM_HAS_ROMAPI */
633 
634 #ifdef __cplusplus
635 }
636 #endif
637 
638 /*! @}*/
639 
640 #endif /* _FSL_ROMAPI_H_ */
641