1// Customer ID=13270; Build=0x815fe; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
2//
3// Permission is hereby granted, free of charge, to any person obtaining
4// a copy of this software and associated documentation files (the
5// "Software"), to deal in the Software without restriction, including
6// without limitation the rights to use, copy, modify, merge, publish,
7// distribute, sublicense, and/or sell copies of the Software, and to
8// permit persons to whom the Software is furnished to do so, subject to
9// the following conditions:
10//
11// The above copyright notice and this permission notice shall be included
12// in all copies or substantial portions of the Software.
13//
14// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
17// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
18// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
19// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
20// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21
22
23// A memory map is a sequence of memory descriptions and
24// optional parameter assignments.
25//
26// Each memory description has the following format:
27//   BEGIN <name>
28//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
29//                       : [writable] [,executable] [,device] ;
30//     <segment>*
31//   END <name>
32//
33// where each <segment> description has the following format:
34//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
35//                : <section-name>* ;
36//
37// Each parameter assignment is a keyword/value pair in the following format:
38//   <keyword> = <value>                (no spaces in <value>)
39// or
40//   <keyword> = "<value>"              (spaces allowed in <value>)
41//
42// The following primitives are also defined:
43//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
44//                                       | IN_SEGMENT(<seg-name>) }
45//
46//   NOLOAD <section-name1> [ <section-name2> ... ]
47//
48// Please refer to the Xtensa LSP Reference Manual for more details.
49//
50
51// Additions for -mvecbase option:
52VECBASE = 0x008400
53
54// Additions for -mvecreset option:
55VECRESET = 0x000000
56
57// Additions for -mvecselect option:
58VECSELECT = 0
59
60BEGIN iram0
610x00000000: instRam : iram0 : 0x400 : executable, writable ;
62 iram0_0 : F : 0x000000 - 0x0003ff : .ResetVector.text .ResetHandler.literal .ResetHandler.text;
63END iram0
64
65BEGIN iram1
660x008400: instRam : iram1 : 0x17C00 : executable, writable ;
67 iram1_0 : F : 0x008400 - 0x00857b : .WindowVectors.text .Level2InterruptVector.literal;
68 iram1_1 : F : 0x00857c - 0x00859b : .Level2InterruptVector.text .Level3InterruptVector.literal;
69 iram1_2 : F : 0x00859c - 0x0085bb : .Level3InterruptVector.text .DebugExceptionVector.literal;
70 iram1_3 : F : 0x0085bc - 0x0085db : .DebugExceptionVector.text .NMIExceptionVector.literal;
71 iram1_4 : F : 0x0085dc - 0x0085fb : .NMIExceptionVector.text .KernelExceptionVector.literal;
72 iram1_5 : F : 0x0085fc - 0x00861b : .KernelExceptionVector.text .UserExceptionVector.literal;
73 iram1_6 : F : 0x00861c - 0x00863b : .UserExceptionVector.text .DoubleExceptionVector.literal;
74 iram1_7 : F : 0x00863c - 0x008a3b : .DoubleExceptionVector.text;
75 iram1_8 : F : 0x008a3c - 0x01ffff : __llvm_prf_names .text .literal;
76END iram1
77
78BEGIN dram0
790x880000: dataRam : dram0 : 0x10000 : writable ;
80 dram0_0 : C : 0x880000 - 0x88ffff : .shmem;
81END dram0
82
83BEGIN dram1
840x820000: dataRam : dram1 : 0x10000 : writable ;
85 dram1_0 : C : 0x820000 - 0x82ffff : STACK : HEAP : .rodata .data .bss;
86END dram1
87
88
89