1 /* 2 * Copyright 2021 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 * 7 */ 8 9 #ifndef _FSL_FLASH_FFR_H_ 10 #define _FSL_FLASH_FFR_H_ 11 12 #include "fsl_flash.h" 13 14 /*! 15 * @addtogroup flash_ffr_driver 16 * @{ 17 */ 18 19 /*! @file */ 20 21 /******************************************************************************* 22 * Definitions 23 ******************************************************************************/ 24 25 /*! @brief Alignment(down) utility. */ 26 #if !defined(ALIGN_DOWN) 27 #define ALIGN_DOWN(x, a) ((x) & (uint32_t)(-((int32_t)(a)))) 28 #endif 29 30 /*! @brief Alignment(up) utility. */ 31 #if !defined(ALIGN_UP) 32 #define ALIGN_UP(x, a) (-((int32_t)((uint32_t)(-((int32_t)(x))) & (uint32_t)(-((int32_t)(a)))))) 33 #endif 34 35 #define FLASH_FFR_MAX_PAGE_SIZE (512U) 36 #define FLASH_FFR_HASH_DIGEST_SIZE (32U) 37 #define FLASH_FFR_IV_CODE_SIZE (52U) 38 39 /*! 40 * @brief flash FFR page offset. 41 */ 42 enum flash_ffr_page_offset 43 { 44 kFfrPageOffset_CFPA = 0U, /*!< Customer In-Field programmed area*/ 45 kFfrPageOffset_CFPA_Scratch = 0U, /*!< CFPA Scratch page */ 46 kFfrPageOffset_CFPA_CfgPing = 1U, /*!< CFPA Configuration area (Ping page)*/ 47 kFfrPageOffset_CFPA_CfgPong = 2U, /*!< Same as CFPA page (Pong page)*/ 48 49 #if defined(LPC55S36_SERIES) 50 kFfrPageOffset_CMPA = 3U, /*!< Customer Manufacturing programmed area*/ 51 kFfrPageOffset_CMPA_Cfg = 3U, /*!< CMPA Configuration area (Part of CMPA)*/ 52 kFfrPageOffset_CMPA_Csr_Key = 4U, /*!< Customer Key Store Area (Part of CMPA)*/ 53 54 kFfrPageOffset_NMPA_Key = 5U, /*!< Key Store area (Part of NMPA)*/ 55 kFfrPageOffset_NMPA = 5U, /*!< NXP Manufacturing programmed area*/ 56 kFfrPageOffset_NMPA_Romcp = 8U, /*!< ROM patch area (Part of NMPA)*/ 57 kFfrPageOffset_NMPA_Repair = 10U, /*!< Repair area (Part of NMPA)*/ 58 kFfrPageOffset_NMPA_Cfg = 16U, /*!< NMPA configuration area (Part of NMPA)*/ 59 kFfrPageOffset_NMPA_End = 17U, /*!< Reserved (Part of NMPA)*/ 60 #else 61 kFfrPageOffset_CMPA = 3U, /*!< Customer Manufacturing programmed area*/ 62 kFfrPageOffset_CMPA_Cfg = 3U, /*!< CMPA Configuration area (Part of CMPA)*/ 63 kFfrPageOffset_CMPA_Key = 4U, /*!< Key Store area (Part of CMPA)*/ 64 65 kFfrPageOffset_NMPA = 7U, /*!< NXP Manufacturing programmed area*/ 66 kFfrPageOffset_NMPA_Romcp = 7U, /*!< ROM patch area (Part of NMPA)*/ 67 kFfrPageOffset_NMPA_Repair = 9U, /*!< Repair area (Part of NMPA)*/ 68 kFfrPageOffset_NMPA_Cfg = 15U, /*!< NMPA configuration area (Part of NMPA)*/ 69 kFfrPageOffset_NMPA_End = 16U, /*!< Reserved (Part of NMPA)*/ 70 #endif 71 72 }; 73 74 /*! 75 * @brief flash FFR page number. 76 */ 77 enum flash_ffr_page_num 78 { 79 kFfrPageNum_CFPA = 3U, /*!< Customer In-Field programmed area*/ 80 #if defined(LPC55S36_SERIES) 81 kFfrPageNum_CMPA = 2U, /*!< Customer Manufacturing programmed area*/ 82 #else 83 kFfrPageNum_CMPA = 4U, /*!< Customer Manufacturing programmed area*/ 84 #endif 85 kFfrPageNum_NMPA = 13U, /*!< NXP Manufacturing programmed area*/ 86 87 kFfrPageNum_CMPA_Cfg = 1U, 88 kFfrPageNum_NMPA_Romcp = 2U, 89 90 kFfrPageNum_SpecArea = kFfrPageNum_CFPA + kFfrPageNum_CMPA, 91 kFfrPageNum_Total = (kFfrPageNum_CFPA + kFfrPageNum_CMPA + kFfrPageNum_NMPA), 92 }; 93 94 /*! 95 * @brief flash FFR block size. 96 */ 97 enum flash_ffr_block_size 98 { 99 kFfrBlockSize_Key = 52U, 100 #if defined(LPC55S36_SERIES) 101 kFfrBlockSize_ActivationCode = 996U, 102 #else 103 kFfrBlockSize_ActivationCode = 1192U, 104 #endif 105 }; 106 107 /*! 108 * @brief flash cmpa status. 109 */ 110 enum cfpa_cfg_cmpa_prog_status 111 { 112 kFfrCmpaProgStatus_Idle = 0x0U, 113 kFfrCmpaProgStatus_InProgress = 0x5CC55AA5U, 114 }; 115 116 /*! 117 * @brief flash cmpa program status. 118 */ 119 typedef enum 120 { 121 kFfrCmpaProgProcess_Pre = 0x0U, 122 kFfrCmpaProgProcess_Post = 0xFFFFFFFFU, 123 } cmpa_prog_process_t; 124 125 /*! 126 * @brief flash cfpa configure struct. 127 */ 128 typedef struct 129 { 130 uint32_t header; /*!< [0x000-0x003] */ 131 uint32_t version; /*!< [0x004-0x007] */ 132 uint32_t secureFwVersion; /*!< [0x008-0x00b] */ 133 uint32_t nsFwVersion; /*!< [0x00c-0x00f] */ 134 uint32_t imageKeyRevoke; /*!< [0x010-0x013] */ 135 uint32_t ivPrince[3]; /*!< [0x014-0x01f] */ 136 uint32_t ivIped[4]; /*!< [0x020-0x02f] */ 137 uint32_t custCtr[8]; /*!< [0x030-0x03f] */ 138 uint32_t rotkhRevoke; /*!< [0x018-0x01b] */ 139 uint32_t vendorUsage; /*!< [0x050-0x053] */ 140 uint32_t dcfgNsPin; /*!< [0x058-0x05b] */ 141 uint32_t dcfgNsDflt; /*!< [0x05c-0x05f] */ 142 uint32_t enableFaMode; /*!< [0x060-0x063] */ 143 uint32_t cmpaProgInProgress; /*!< [0x064-0x067] */ 144 uint32_t imageCmacUpdateEn; /*!< [0x068-0x06b] */ 145 uint32_t cfpaVersion; /*!< [0x06c-0x06f] */ 146 uint32_t img0Cmac[4]; /*!< [0x070-0x07f] */ 147 uint32_t img1Cmac[4]; /*!< [0x080-0x08f] */ 148 uint8_t reserved2[348]; /*!< [0x090-0x1eb] */ 149 uint32_t cfpaCrc; /*!< [0x1eb-0x1ef] */ 150 uint32_t cfpaCmac[4]; /*!< [0x1f0-0x1ff] */ 151 } cfpa_cfg_info_t; 152 153 #define FFR_BOOTCFG_USBSPEED_SHIFT (9U) 154 #define FFR_BOOTCFG_USBSPEED_MASK (0x3u << FFR_BOOTCFG_USBSPEED_SHIFT) 155 #define FFR_BOOTCFG_USBSPEED_NMPASEL0 (0x0U) 156 #define FFR_BOOTCFG_USBSPEED_FS (0x1U) 157 #define FFR_BOOTCFG_USBSPEED_HS (0x2U) 158 #define FFR_BOOTCFG_USBSPEED_NMPASEL3 (0x3U) 159 160 #define FFR_BOOTCFG_BOOTSPEED_MASK (0x18U) 161 #define FFR_BOOTCFG_BOOTSPEED_SHIFT (7U) 162 #define FFR_BOOTCFG_BOOTSPEED_NMPASEL (0x0U) 163 #define FFR_BOOTCFG_BOOTSPEED_48MHZ (0x1U) 164 #define FFR_BOOTCFG_BOOTSPEED_96MHZ (0x2U) 165 166 #define FFR_USBID_VENDORID_MASK (0xFFFFU) 167 #define FFR_USBID_VENDORID_SHIFT (0U) 168 #define FFR_USBID_PRODUCTID_MASK (0xFFFF0000U) 169 #define FFR_USBID_PRODUCTID_SHIFT (16U) 170 171 #define FFR_IMAGE0_CMAC_UPDATE_MASK (0x1U) 172 #define FFR_IMAGE1_CMAC_UPDATE_MASK (0x2U) 173 174 typedef struct 175 { 176 uint32_t bootCfg; /*!< [0x000-0x003] */ 177 uint32_t spiFlashCanCfg; /*!< [0x004-0x007] */ 178 struct 179 { 180 uint16_t vid; 181 uint16_t pid; 182 } usbId; /*!< [0x008-0x00b] */ 183 uint32_t sdioCfg; /*!< [0x00c-0x00f] */ 184 uint32_t dcfgPin; /*!< [0x010-0x013] */ 185 uint32_t dcfgDflt; /*!< [0x014-0x017] */ 186 uint32_t dapVendorUsage; /*!< [0x018-0x01b] */ 187 uint32_t secureBootCfg; /*!< [0x01c-0x01f] */ 188 uint32_t princeBaseAddr; /*!< [0x020-0x023] */ 189 uint32_t princeSr[3]; /*!< [0x024-0x02f] */ 190 uint32_t xtal32kCapBankTrim; /*!< [0x030-0x033] */ 191 uint32_t xtal16mCapBankTrim; /*!< [0x034-0x037] */ 192 uint32_t flashRemapSize; /*!< [0x038-0x03b] */ 193 uint32_t flashRemapOffset; /*!< [0x03c-0x03f] */ 194 uint32_t princeXom[3]; /*!< [0x040-0x04b] */ 195 uint32_t rokthUsage; /*!< [0x04c-0x04f] */ 196 uint32_t rotkh[12]; /*!< [0x050-0x07f] */ 197 uint32_t flexspiCfg0; /*!< [0x080-0x083] */ 198 uint32_t flexspiCfg1; /*!< [0x084-0x087] */ 199 uint8_t reserved1[8]; /*!< [0x088-0x08f] */ 200 struct 201 { 202 uint32_t ipedStartAddr; /*!< [0x090-0x093] */ 203 uint32_t ipedEndAddr; /*!< [0x094-0x097] */ 204 } ipedRegions[4]; 205 206 uint8_t reserved2[320]; /*!< [0x0b0-0x1ef] */ 207 uint32_t cmpaCmac[4]; /*!< [0x1f0-0x1ff] */ 208 } cmpa_cfg_info_t; 209 210 typedef struct 211 { 212 uint32_t header; 213 uint8_t reserved[4]; 214 } cmpa_key_store_header_t; 215 216 #define FFR_SYSTEM_SPEED_CODE_MASK (0x3U) 217 #define FFR_SYSTEM_SPEED_CODE_SHIFT (0U) 218 #define FFR_SYSTEM_SPEED_CODE_FRO12MHZ_12MHZ (0x0U) 219 #define FFR_SYSTEM_SPEED_CODE_FROHF96MHZ_24MHZ (0x1U) 220 #define FFR_SYSTEM_SPEED_CODE_FROHF96MHZ_48MHZ (0x2U) 221 #define FFR_SYSTEM_SPEED_CODE_FROHF96MHZ_96MHZ (0x3U) 222 223 #define FFR_USBCFG_USBSPEED_HS (0x0U) 224 #define FFR_USBCFG_USBSPEED_FS (0x1U) 225 #define FFR_USBCFG_USBSPEED_NO (0x2U) 226 227 #define FFR_MCAN_BAUDRATE_MASK (0xF0000U) 228 #define FFR_MCAN_BAUDRATE_SHIFT (16U) 229 230 #define FFR_PERIPHERALCFG_PERI_MASK (0x7FFFFFFFU) 231 #define FFR_PERIPHERALCFG_PERI_SHIFT (0U) 232 #define FFR_PERIPHERALCFG_COREEN_MASK (0x10000000U) 233 #define FFR_PERIPHERALCFG_COREEN_SHIFT (31U) 234 235 #define FFR_PUF_SRAM_CONFIG_MASK (0x3FFFF07) 236 #define FFR_PUF_SRAM_CONFIG_MASK_SHIFT (0U) 237 #define FFR_PUF_SRAM_VALID_MASK (0x1U) 238 #define FFR_PUF_SRAM_VALID_SHIFT (0U) 239 #define FFR_PUF_SRAM_MODE_MASK (0x2U) 240 #define FFR_PUF_SRAM_MODE_SHIFT (1U) 241 #define FFR_PUF_SRAM_CKGATING_MASK (0x4U) 242 #define FFR_PUF_SRAM_CKGATING_SHIFT (2U) 243 #define FFR_PUF_SRAM_SMB_MASK (0x300U) 244 #define FFR_PUF_SRAM_SMB_SHIFT (8U) 245 #define FFR_PUF_SRAM_RM_MASK (0x1C00U) 246 #define FFR_PUF_SRAM_RM_SHIFT (10U) 247 #define FFR_PUF_SRAM_WM_MASK (0xE000U) 248 #define FFR_PUF_SRAM_WM_SHIFT (13U) 249 #define FFR_PUF_SRAM_WRME_MASK (0x10000U) 250 #define FFR_PUF_SRAM_WRME_SHIFT (16U) 251 #define FFR_PUF_SRAM_RAEN_MASK (0x20000U) 252 #define FFR_PUF_SRAM_RAEN_SHIFT (17U) 253 #define FFR_PUF_SRAM_RAM_MASK (0x3C0000U) 254 #define FFR_PUF_SRAM_RAM_SHIFT (18U) 255 #define FFR_PUF_SRAM_WAEN_MASK (0x400000U) 256 #define FFR_PUF_SRAM_WAEN_SHIFT (22U) 257 #define FFR_PUF_SRAM_WAM_MASK (0x1800000U) 258 #define FFR_PUF_SRAM_WAM_SHIFT (23U) 259 #define FFR_PUF_SRAM_STBP_MASK (0x2000000U) 260 #define FFR_PUF_SRAM_STBP_SHIFT (25U) 261 262 typedef struct 263 { 264 uint32_t fro32kCfg; /*!< [0x000-0x003] */ 265 uint32_t puf_cfg; /*!< [0x004-0x007] */ 266 uint32_t bod; /*!< [0x008-0x00b] */ 267 uint32_t trim; /*!< [0x00c-0x00f] */ 268 uint32_t deviceID; /*!< [0x010-0x03f] */ 269 uint32_t peripheralCfg; /*!< [0x014-0x017] */ 270 uint32_t dcdPowerProFileLOW[2]; /*!< [0x018-0x01f] */ 271 uint32_t deviceType; /*!< [0x020-0x023] */ 272 uint32_t ldo_ao; /*!< [0x024-0x027] */ 273 uint32_t gdetDelayCfg; /*!< [0x028-0x02b] */ 274 uint32_t gdetMargin; /*!< [0x02c-0x02f] */ 275 uint32_t gdetTrim1; /*!< [0x030-0x033] */ 276 uint32_t gdetEanble1; /*!< [0x034-0x037] */ 277 uint32_t gdetCtrl1; /*!< [0x038-0x03b] */ 278 uint32_t gdetUpdateTimer; /*!< [0x03c-0x03f] */ 279 uint32_t GpoDataChecksum[4]; /*!< [0x040-0x04f] */ 280 uint32_t finalTestBatchId[4]; /*!< [0x050-0x05f] */ 281 uint32_t ecidBackup[4]; /*!< [0x060-0x06f] */ 282 uint32_t uuid[4]; /*!< [0x070-0x07f] */ 283 uint32_t reserved1[7]; /*!< [0x080-0x09b] */ 284 struct 285 { 286 uint8_t xo32mReadyTimeoutInMs; 287 uint8_t usbSpeed; 288 uint8_t reserved[2]; 289 } usbCfg; /*!< [0x09c-0x09f] */ 290 uint32_t reserved2[80]; /*!< [0x0a0-0x1df] */ 291 uint8_t cmac[16]; /*!< [0x1e0-0x1ef] */ 292 uint32_t pageChecksum[4]; /*!< [0x1f0-0x1ff] */ 293 } nmpa_cfg_info_t; 294 295 typedef struct 296 { 297 uint8_t reserved[1][FLASH_FFR_MAX_PAGE_SIZE]; 298 } ffr_key_store_t; 299 300 typedef enum 301 { 302 kFFR_KeyTypeSbkek = 0x00U, 303 kFFR_KeyTypeUser = 0x01U, 304 kFFR_KeyTypeUds = 0x02U, 305 kFFR_KeyTypePrinceRegion0 = 0x03U, 306 kFFR_KeyTypePrinceRegion1 = 0x04U, 307 kFFR_KeyTypePrinceRegion2 = 0x05U, 308 } ffr_key_type_t; 309 310 typedef enum 311 { 312 kFFR_BankTypeBank0_NMPA = 0x00U, 313 kFFR_BankTypeBank1_CMPA = 0x01U, 314 kFFR_BankTypeBank2_CFPA = 0x02U 315 } ffr_bank_type_t; 316 317 /******************************************************************************* 318 * API 319 ******************************************************************************/ 320 321 #if defined(__cplusplus) 322 extern "C" { 323 #endif 324 325 /*! 326 * @name FFR APIs 327 * @{ 328 */ 329 330 /*! 331 * @brief Initializes the global FFR properties structure members. 332 * 333 * @param config A pointer to the storage for the driver runtime state. 334 * 335 * @retval #kStatus_FLASH_Success API was executed successfully. 336 */ 337 status_t FFR_Init(flash_config_t *config); 338 339 /*! 340 * @brief Enable firewall for all flash banks. 341 * 342 * CFPA, CMPA, and NMPA flash areas region will be locked, After this function executed; 343 * Unless the board is reset again. 344 * 345 * @param config A pointer to the storage for the driver runtime state. 346 * 347 * @retval #kStatus_FLASH_Success An invalid argument is provided. 348 */ 349 status_t FFR_Lock(flash_config_t *config); 350 351 /*! 352 * @brief Initialize the Security Library for FFR driver. 353 * 354 * @param config A pointer to the storage for the driver runtime state. 355 * @param context A pointer to the storage for the nboot data. 356 * 357 * @retval #kStatus_FLASH_Success An invalid argument is provided. 358 * @retval #kStatus_FLASH_InvalidArgument An invalid argument is provided. 359 */ 360 status_t FFR_SecLibInit(flash_config_t *config, uint32_t *context); 361 362 /*! 363 * @brief APIs to access CFPA pages 364 * 365 * This routine will erase CFPA and program the CFPA page with passed data. 366 * 367 * @param config A pointer to the storage for the driver runtime state. 368 * @param page_data A pointer to the source buffer of data that is to be programmed 369 * into the CFPA. 370 * @param valid_len The length, given in bytes, to be programmed. 371 * 372 * @retval #kStatus_FLASH_Success The desire page-data were programed successfully into CFPA. 373 * @retval #kStatus_FLASH_SizeError Error size 374 * @retval #kStatus_FLASH_ReadHidingAreaDisallowed Flash hiding read is not allowed 375 * @retval #kStatus_FLASH_AlignmentError Parameter is not aligned with the specified baseline 376 * @retval #kStatus_FLASH_ModifyProtectedAreaDisallowed Flash firewall page locked erase and program are not allowed 377 * @retval #kStatus_FLASH_InvalidArgument An invalid argument is provided. 378 * @retval #kStatus_FLASH_AddressError Address is out of range. 379 * @retval #kStatus_FLASH_FfrBankIsLocked The CFPA was locked. 380 * @retval #kStatus_FLASH_OutOfDateCfpaPage It is not newest CFPA page. 381 * @retval #kStatus_FLASH_CommandFailure access error. 382 * @retval #kStatus_FLASH_CommandNotSupported Flash API is not supported 383 * @retval #kStatus_FLASH_EccError A correctable or uncorrectable error during command execution. 384 * @retval #kStatus_FLASH_RegulationLoss A loss of regulation during read. 385 */ 386 status_t FFR_InfieldPageWrite(flash_config_t *config, uint8_t *page_data, uint32_t valid_len); 387 388 /*! 389 * @brief APIs to access CFPA pages 390 * 391 * Generic read function, used by customer to read data stored in 'Customer In-field Page'. 392 * 393 * @param config A pointer to the storage for the driver runtime state. 394 * @param pData A pointer to the dest buffer of data that is to be read from 'Customer In-field Page'. 395 * @param offset An offset from the 'Customer In-field Page' start address. 396 * @param len The length, given in bytes, to be read. 397 * 398 * @retval #kStatus_FLASH_Success Get data from 'Customer In-field Page'. 399 * @retval #kStatus_FLASH_InvalidArgument An invalid argument is provided. 400 * @retval #kStatus_FLASH_AddressError Address is out of range. 401 * @retval #kStatus_FLASH_AlignmentError Parameter is not aligned with the specified baseline. 402 * @retval #kStatus_FLASH_ReadHidingAreaDisallowed Flash hiding read is not allowed 403 * @retval #kStatus_FLASH_CommandFailure access error. 404 * @retval #kStatus_FLASH_CommandNotSupported Flash API is not supported 405 * @retval #kStatus_FLASH_EccError A correctable or uncorrectable error during command execution. 406 * @retval #kStatus_FLASH_RegulationLoss A loss of regulation during read. 407 */ 408 status_t FFR_GetCustomerInfieldData(flash_config_t *config, uint8_t *pData, uint32_t offset, uint32_t len); 409 410 /*! 411 * @brief APIs to access CMPA pages 412 * 413 * This routine will erase "customer factory page" and program the page with passed data. 414 * If 'seal_part' parameter is TRUE then the routine will compute SHA256 hash of 415 * the page contents and then programs the pages. 416 * 1.During development customer code uses this API with 'seal_part' set to FALSE. 417 * 2.During manufacturing this parameter should be set to TRUE to seal the part 418 * from further modifications 419 * 3.This routine checks if the page is sealed or not. A page is said to be sealed if 420 * the SHA256 value in the page has non-zero value. On boot ROM locks the firewall for 421 * the region if hash is programmed anyways. So, write/erase commands will fail eventually. 422 * 423 * @param config A pointer to the storage for the driver runtime state. 424 * @param page_data A pointer to the source buffer of data that is to be programmed 425 * into the "customer factory page". 426 * @param seal_part Set fasle for During development customer code. 427 * 428 * @retval #kStatus_FLASH_Success The desire page-data were programed successfully into CMPA. 429 * @retval #kStatus_FLASH_InvalidArgument Parameter is not aligned with the specified baseline. 430 * @retval #kStatus_FLASH_AddressError Address is out of range. 431 * @retval #kStatus_FLASH_AlignmentError Parameter is not aligned with the specified baseline. 432 * @retval #kStatus_FLASH_EraseKeyError API erase key is invalid. 433 * @retval #kStatus_FLASH_ModifyProtectedAreaDisallowed Flash firewall page locked erase and program are not allowed 434 * @retval #kStatus_Fail Generic status for Fail. 435 * @retval #kStatus_FLASH_CommandFailure access error. 436 * @retval #kStatus_FLASH_CommandNotSupported Flash API is not supported 437 * @retval #kStatus_FLASH_EccError A correctable or uncorrectable error during command execution. 438 * @retval #kStatus_FLASH_RegulationLoss A loss of regulation during read. 439 */ 440 status_t FFR_CustFactoryPageWrite(flash_config_t *config, uint8_t *page_data, bool seal_part); 441 442 /*! 443 * @brief APIs to access CMPA page 444 * 445 * Read data stored in 'Customer Factory CFG Page'. 446 * 447 * @param config A pointer to the storage for the driver runtime state. 448 * @param pData A pointer to the dest buffer of data that is to be read 449 * from the Customer Factory CFG Page. 450 * @param offset Address offset relative to the CMPA area. 451 * @param len The length, given in bytes to be read. 452 * 453 * @retval #kStatus_FLASH_Success Get data from 'Customer Factory CFG Page'. 454 * @retval #kStatus_FLASH_InvalidArgument Parameter is not aligned with the specified baseline. 455 * @retval #kStatus_FLASH_AlignmentError Parameter is not aligned with the specified baseline. 456 * @retval #kStatus_FLASH_AddressError Address is out of range. 457 * @retval #kStatus_FLASH_CommandFailure access error. 458 * @retval #kStatus_FLASH_CommandNotSupported Flash API is not supported 459 * @retval #kStatus_FLASH_EccError A correctable or uncorrectable error during command execution. 460 * @retval #kStatus_FLASH_RegulationLoss A loss of regulation during read. 461 * @retval #kStatus_FLASH_ReadHidingAreaDisallowed Flash hiding read is not allowed 462 */ 463 status_t FFR_GetCustomerData(flash_config_t *config, uint8_t *pData, uint32_t offset, uint32_t len); 464 465 /*! 466 * @brief The API is used for getting the customer key store data from the customer key store region(0x3e400 - 0x3e600), 467 * and the API should be called after the FLASH_Init and FFR_Init. 468 * 469 * @param config A pointer to the storage for the driver runtime state. 470 * @param pData A pointer to the dest buffer of data that is to be read 471 * from the Customer Factory CFG Page. 472 * @param offset Address offset relative to the CMPA area. 473 * @param len The length, given in bytes to be read. 474 * 475 * @retval #kStatus_FLASH_Success Get data from 'Customer Factory CFG Page'. 476 * @retval #kStatus_FLASH_InvalidArgument Parameter is not aligned with the specified baseline. 477 * @retval #kStatus_FLASH_AddressError Address is out of range. 478 * @retval #kStatus_FLASH_AlignmentError Parameter is not aligned with the specified baseline. 479 * @retval #kStatus_FLASH_ReadHidingAreaDisallowed Flash hiding read is not allowed 480 * @retval #kStatus_FLASH_CommandFailure access error. 481 * @retval #kStatus_FLASH_CommandNotSupported Flash API is not supported 482 * @retval #kStatus_FLASH_EccError A correctable or uncorrectable error during command execution. 483 * @retval #kStatus_FLASH_RegulationLoss A loss of regulation during read. 484 */ 485 status_t FFR_GetCustKeystoreData(flash_config_t *config, uint8_t *pData, uint32_t offset, uint32_t len); 486 487 /*! 488 * @brief This routine writes the 3 pages allocated for Key store data. 489 * 490 * @param config A pointer to the storage for the driver runtime state. 491 * @param pKeyStore A pointer to the source buffer of data that is to be programmed 492 * into the "Key store". 493 * 494 * @retval #kStatus_FLASH_Success Get data from 'Customer Factory CFG Page'. 495 * @retval #kStatus_FLASH_InvalidArgument Parameter is not aligned with the specified baseline. 496 * @retval #kStatus_FLASH_CommandFailure access error. 497 * @retval #kStatus_FLASH_CommandNotSupported Flash API is not supported 498 * @retval #kStatus_FLASH_EccError A correctable or uncorrectable error during command execution. 499 * @retval #kStatus_FLASH_RegulationLoss A loss of regulation during read. 500 * @retval #kStatus_FLASH_SealedFfrRegion The FFR region is sealed. 501 * @retval #kStatus_FLASH_FfrBankIsLocked The FFR bank region is locked. 502 * @retval #kStatus_FLASH_AddressError Address is out of range 503 * @retval #kStatus_FLASH_AlignmentError Parameter is not aligned with the specified baseline. 504 * @retval #kStatus_FLASH_ModifyProtectedAreaDisallowed Flash firewall page locked erase and program are not allowed 505 */ 506 status_t FFR_CustKeystoreWrite(flash_config_t *config, ffr_key_store_t *pKeyStore); 507 508 /*! 509 * @brief APIs to access CMPA page 510 * 511 * 1.SW should use this API routine to get the UUID of the chip. 512 * 2.Calling routine should pass a pointer to buffer which can hold 128-bit value. 513 * 514 * @retval #kStatus_FLASH_Success Get data from 'Customer Factory CFG Page'. 515 * @retval #kStatus_FLASH_InvalidArgument Parameter is not aligned with the specified baseline. 516 * @retval #kStatus_FLASH_ReadHidingAreaDisallowed Flash hiding read is not allowed 517 * @retval #kStatus_FLASH_CommandFailure Run-time error during command execution. 518 * @retval #kStatus_FLASH_CommandNotSupported Flash API is not supported 519 * @retval #kStatus_FLASH_RegulationLoss A loss of regulation during read. 520 */ 521 status_t FFR_GetUUID(flash_config_t *config, uint8_t *uuid); 522 523 /*@}*/ 524 525 #ifdef __cplusplus 526 } 527 #endif 528 529 /*@}*/ 530 531 #endif /*! _FSL_FLASH_FFR_H_ */ 532
