1 /* 2 ** ################################################################### 3 ** Version: rev. 1.0, 2017-12-15 4 ** Build: b220714 5 ** 6 ** Abstract: 7 ** Chip specific module features. 8 ** 9 ** Copyright 2016 Freescale Semiconductor, Inc. 10 ** Copyright 2016-2022 NXP 11 ** All rights reserved. 12 ** 13 ** SPDX-License-Identifier: BSD-3-Clause 14 ** 15 ** http: www.nxp.com 16 ** mail: support@nxp.com 17 ** 18 ** Revisions: 19 ** - rev. 1.0 (2017-12-15) 20 ** Initial version. 21 ** 22 ** ################################################################### 23 */ 24 25 #ifndef _LPC51U68_FEATURES_H_ 26 #define _LPC51U68_FEATURES_H_ 27 28 /* SOC module features */ 29 30 /* @brief ADC availability on the SoC. */ 31 #define FSL_FEATURE_SOC_ADC_COUNT (1) 32 /* @brief ASYNC_SYSCON availability on the SoC. */ 33 #define FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT (1) 34 /* @brief CRC availability on the SoC. */ 35 #define FSL_FEATURE_SOC_CRC_COUNT (1) 36 /* @brief CTIMER availability on the SoC. */ 37 #define FSL_FEATURE_SOC_CTIMER_COUNT (3) 38 /* @brief DMA availability on the SoC. */ 39 #define FSL_FEATURE_SOC_DMA_COUNT (1) 40 /* @brief FLEXCOMM availability on the SoC. */ 41 #define FSL_FEATURE_SOC_FLEXCOMM_COUNT (8) 42 /* @brief FMC availability on the SoC. */ 43 #define FSL_FEATURE_SOC_FMC_COUNT (1) 44 /* @brief GINT availability on the SoC. */ 45 #define FSL_FEATURE_SOC_GINT_COUNT (2) 46 /* @brief GPIO availability on the SoC. */ 47 #define FSL_FEATURE_SOC_GPIO_COUNT (1) 48 /* @brief I2C availability on the SoC. */ 49 #define FSL_FEATURE_SOC_I2C_COUNT (8) 50 /* @brief I2S availability on the SoC. */ 51 #define FSL_FEATURE_SOC_I2S_COUNT (2) 52 /* @brief INPUTMUX availability on the SoC. */ 53 #define FSL_FEATURE_SOC_INPUTMUX_COUNT (1) 54 /* @brief IOCON availability on the SoC. */ 55 #define FSL_FEATURE_SOC_IOCON_COUNT (1) 56 /* @brief MRT availability on the SoC. */ 57 #define FSL_FEATURE_SOC_MRT_COUNT (1) 58 /* @brief PINT availability on the SoC. */ 59 #define FSL_FEATURE_SOC_PINT_COUNT (1) 60 /* @brief RTC availability on the SoC. */ 61 #define FSL_FEATURE_SOC_RTC_COUNT (1) 62 /* @brief SCT availability on the SoC. */ 63 #define FSL_FEATURE_SOC_SCT_COUNT (1) 64 /* @brief SPI availability on the SoC. */ 65 #define FSL_FEATURE_SOC_SPI_COUNT (8) 66 /* @brief SYSCON availability on the SoC. */ 67 #define FSL_FEATURE_SOC_SYSCON_COUNT (1) 68 /* @brief USART availability on the SoC. */ 69 #define FSL_FEATURE_SOC_USART_COUNT (8) 70 /* @brief USB availability on the SoC. */ 71 #define FSL_FEATURE_SOC_USB_COUNT (1) 72 /* @brief UTICK availability on the SoC. */ 73 #define FSL_FEATURE_SOC_UTICK_COUNT (1) 74 /* @brief WWDT availability on the SoC. */ 75 #define FSL_FEATURE_SOC_WWDT_COUNT (1) 76 77 /* ADC module features */ 78 79 /* @brief Do not has input select (register INSEL). */ 80 #define FSL_FEATURE_ADC_HAS_NO_INSEL (0) 81 /* @brief Has ASYNMODE bitfile in CTRL reigster. */ 82 #define FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE (1) 83 /* @brief Has ASYNMODE bitfile in CTRL reigster. */ 84 #define FSL_FEATURE_ADC_HAS_CTRL_RESOL (1) 85 /* @brief Has ASYNMODE bitfile in CTRL reigster. */ 86 #define FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL (1) 87 /* @brief Has ASYNMODE bitfile in CTRL reigster. */ 88 #define FSL_FEATURE_ADC_HAS_CTRL_TSAMP (1) 89 /* @brief Has ASYNMODE bitfile in CTRL reigster. */ 90 #define FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE (0) 91 /* @brief Has ASYNMODE bitfile in CTRL reigster. */ 92 #define FSL_FEATURE_ADC_HAS_CTRL_CALMODE (0) 93 /* @brief Has startup register. */ 94 #define FSL_FEATURE_ADC_HAS_STARTUP_REG (1) 95 /* @brief Has ADC Trim register */ 96 #define FSL_FEATURE_ADC_HAS_TRIM_REG (0) 97 /* @brief Has Calibration register. */ 98 #define FSL_FEATURE_ADC_HAS_CALIB_REG (1) 99 100 /* CTIMER module features */ 101 102 /* @brief CTIMER has no capture channel. */ 103 #define FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE (0) 104 /* @brief CTIMER has no capture 2 interrupt. */ 105 #define FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT (0) 106 /* @brief CTIMER capture 3 interrupt. */ 107 #define FSL_FEATURE_CTIMER_HAS_IR_CR3INT (1) 108 /* @brief Has CTIMER CCR_CAP2 (register bits CCR[CAP2RE][CAP2FE][CAP2I]. */ 109 #define FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 (0) 110 /* @brief Has CTIMER CCR_CAP3 (register bits CCR[CAP3RE][CAP3FE][CAP3I]). */ 111 #define FSL_FEATURE_CTIMER_HAS_CCR_CAP3 (1) 112 /* @brief CTIMER Has register MSR */ 113 #define FSL_FEATURE_CTIMER_HAS_MSR (0) 114 115 /* DMA module features */ 116 117 /* @brief Number of channels */ 118 #define FSL_FEATURE_DMA_NUMBER_OF_CHANNELS (18) 119 /* @brief Align size of DMA descriptor */ 120 #define FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZE (512) 121 /* @brief DMA head link descriptor table align size */ 122 #define FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE (16U) 123 124 /* FLEXCOMM module features */ 125 126 /* @brief FLEXCOMM0 USART INDEX 0 */ 127 #define FSL_FEATURE_FLEXCOMM0_USART_INDEX (0) 128 /* @brief FLEXCOMM0 SPI INDEX 0 */ 129 #define FSL_FEATURE_FLEXCOMM0_SPI_INDEX (0) 130 /* @brief FLEXCOMM0 I2C INDEX 0 */ 131 #define FSL_FEATURE_FLEXCOMM0_I2C_INDEX (0) 132 /* @brief FLEXCOMM1 USART INDEX 1 */ 133 #define FSL_FEATURE_FLEXCOMM1_USART_INDEX (1) 134 /* @brief FLEXCOMM1 SPI INDEX 1 */ 135 #define FSL_FEATURE_FLEXCOMM1_SPI_INDEX (1) 136 /* @brief FLEXCOMM1 I2C INDEX 1 */ 137 #define FSL_FEATURE_FLEXCOMM1_I2C_INDEX (1) 138 /* @brief FLEXCOMM2 USART INDEX 2 */ 139 #define FSL_FEATURE_FLEXCOMM2_USART_INDEX (2) 140 /* @brief FLEXCOMM2 SPI INDEX 2 */ 141 #define FSL_FEATURE_FLEXCOMM2_SPI_INDEX (2) 142 /* @brief FLEXCOMM2 I2C INDEX 2 */ 143 #define FSL_FEATURE_FLEXCOMM2_I2C_INDEX (2) 144 /* @brief FLEXCOMM3 USART INDEX 3 */ 145 #define FSL_FEATURE_FLEXCOMM3_USART_INDEX (3) 146 /* @brief FLEXCOMM3 SPI INDEX 3 */ 147 #define FSL_FEATURE_FLEXCOMM3_SPI_INDEX (3) 148 /* @brief FLEXCOMM3 I2C INDEX 3 */ 149 #define FSL_FEATURE_FLEXCOMM3_I2C_INDEX (3) 150 /* @brief FLEXCOMM4 USART INDEX 4 */ 151 #define FSL_FEATURE_FLEXCOMM4_USART_INDEX (4) 152 /* @brief FLEXCOMM4 SPI INDEX 4 */ 153 #define FSL_FEATURE_FLEXCOMM4_SPI_INDEX (4) 154 /* @brief FLEXCOMM4 I2C INDEX 4 */ 155 #define FSL_FEATURE_FLEXCOMM4_I2C_INDEX (4) 156 /* @brief FLEXCOMM5 USART INDEX 5 */ 157 #define FSL_FEATURE_FLEXCOMM5_USART_INDEX (5) 158 /* @brief FLEXCOMM5 SPI INDEX 5 */ 159 #define FSL_FEATURE_FLEXCOMM5_SPI_INDEX (5) 160 /* @brief FLEXCOMM5 I2C INDEX 5 */ 161 #define FSL_FEATURE_FLEXCOMM5_I2C_INDEX (5) 162 /* @brief FLEXCOMM6 USART INDEX 6 */ 163 #define FSL_FEATURE_FLEXCOMM6_USART_INDEX (6) 164 /* @brief FLEXCOMM6 SPI INDEX 6 */ 165 #define FSL_FEATURE_FLEXCOMM6_SPI_INDEX (6) 166 /* @brief FLEXCOMM6 I2C INDEX 6 */ 167 #define FSL_FEATURE_FLEXCOMM6_I2C_INDEX (6) 168 /* @brief FLEXCOMM7 I2S INDEX 0 */ 169 #define FSL_FEATURE_FLEXCOMM6_I2S_INDEX (0) 170 /* @brief FLEXCOMM7 USART INDEX 7 */ 171 #define FSL_FEATURE_FLEXCOMM7_USART_INDEX (7) 172 /* @brief FLEXCOMM7 SPI INDEX 7 */ 173 #define FSL_FEATURE_FLEXCOMM7_SPI_INDEX (7) 174 /* @brief FLEXCOMM7 I2C INDEX 7 */ 175 #define FSL_FEATURE_FLEXCOMM7_I2C_INDEX (7) 176 /* @brief FLEXCOMM7 I2S INDEX 1 */ 177 #define FSL_FEATURE_FLEXCOMM7_I2S_INDEX (1) 178 /* @brief I2S has DMIC interconnection */ 179 #define FSL_FEATURE_FLEXCOMM_INSTANCE_I2S_HAS_DMIC_INTERCONNECTIONn(x) (0) 180 181 /* I2S module features */ 182 183 /* @brief I2S support dual channel transfer. */ 184 #define FSL_FEATURE_I2S_SUPPORT_SECONDARY_CHANNEL (0) 185 /* @brief I2S has DMIC interconnection */ 186 #define FSL_FEATURE_FLEXCOMM_I2S_HAS_DMIC_INTERCONNECTION (0) 187 188 /* IOCON module features */ 189 190 /* @brief Func bit field width */ 191 #define FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH (3) 192 193 /* MRT module features */ 194 195 /* @brief number of channels. */ 196 #define FSL_FEATURE_MRT_NUMBER_OF_CHANNELS (4) 197 198 /* interrupt module features */ 199 200 /* @brief Lowest interrupt request number. */ 201 #define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14) 202 /* @brief Highest interrupt request number. */ 203 #define FSL_FEATURE_INTERRUPT_IRQ_MAX (105) 204 205 /* PINT module features */ 206 207 /* @brief Number of connected outputs */ 208 #define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS (4) 209 210 /* RTC module features */ 211 212 /* @brief RTC has no reset control */ 213 #define FSL_FEATURE_RTC_HAS_NO_RESET (1) 214 215 /* SCT module features */ 216 217 /* @brief Number of events */ 218 #define FSL_FEATURE_SCT_NUMBER_OF_EVENTS (10) 219 /* @brief Number of states */ 220 #define FSL_FEATURE_SCT_NUMBER_OF_STATES (10) 221 /* @brief Number of match capture */ 222 #define FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE (10) 223 /* @brief Number of outputs */ 224 #define FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS (8) 225 226 /* SPI module features */ 227 228 /* @brief SSEL pin count. */ 229 #define FSL_FEATURE_SPI_SSEL_COUNT (4) 230 231 /* SYSCON module features */ 232 233 /* @brief Pointer to ROM IAP entry functions */ 234 #define FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION (0x03000205) 235 /* @brief IAP Reinvoke ISP command parameter is pointer */ 236 #define FSL_FEATURE_SYSCON_IAP_REINVOKE_ISP_PARAM_POINTER (0) 237 /* @brief Flash page size in bytes */ 238 #define FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES (256) 239 /* @brief Flash sector size in bytes */ 240 #define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (32768) 241 /* @brief Flash size in bytes */ 242 #define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (262144) 243 /* @brief IAP has Flash read & write function */ 244 #define FSL_FEATURE_IAP_HAS_FLASH_FUNCTION (1) 245 /* @brief IAP has read Flash signature function */ 246 #define FSL_FEATURE_IAP_HAS_FLASH_SIGNATURE_READ (1) 247 /* @brief IAP has read extended Flash signature function */ 248 #define FSL_FEATURE_IAP_HAS_FLASH_EXTENDED_SIGNATURE_READ (0) 249 250 /* SysTick module features */ 251 252 /* @brief Systick has external reference clock. */ 253 #define FSL_FEATURE_SYSTICK_HAS_EXT_REF (0) 254 /* @brief Systick external reference clock is core clock divided by this value. */ 255 #define FSL_FEATURE_SYSTICK_EXT_REF_CORE_DIV (0) 256 257 /* USB module features */ 258 259 /* @brief Number of the endpoint in USB FS */ 260 #define FSL_FEATURE_USB_EP_NUM (5) 261 262 /* WWDT module features */ 263 264 /* @brief Has no RESET register. */ 265 #define FSL_FEATURE_WWDT_HAS_NO_RESET (1) 266 267 #endif /* _LPC51U68_FEATURES_H_ */ 268 269
