1 /*
2  * Copyright 2020-2023 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 /**
7 *   @file       Clock_Ip_Monitor.c
8 *   @version    3.0.0
9 *
10 *   @brief   CLOCK driver implementations.
11 *   @details CLOCK driver implementations.
12 *
13 *   @addtogroup CLOCK_DRIVER Clock Ip Driver
14 *   @{
15 */
16 
17 
18 #ifdef __cplusplus
19 extern "C"{
20 #endif
21 
22 
23 /*==================================================================================================
24 *                                          INCLUDE FILES
25 * 1) system and project includes
26 * 2) needed interfaces from external units
27 * 3) internal and external interfaces from this unit
28 ==================================================================================================*/
29 
30 #include "Clock_Ip_Private.h"
31 #include "SchM_Mcu.h"
32 
33 /*==================================================================================================
34                                SOURCE FILE VERSION INFORMATION
35 ==================================================================================================*/
36 #define CLOCK_IP_MONITOR_VENDOR_ID_C                      43
37 #define CLOCK_IP_MONITOR_AR_RELEASE_MAJOR_VERSION_C       4
38 #define CLOCK_IP_MONITOR_AR_RELEASE_MINOR_VERSION_C       7
39 #define CLOCK_IP_MONITOR_AR_RELEASE_REVISION_VERSION_C    0
40 #define CLOCK_IP_MONITOR_SW_MAJOR_VERSION_C               3
41 #define CLOCK_IP_MONITOR_SW_MINOR_VERSION_C               0
42 #define CLOCK_IP_MONITOR_SW_PATCH_VERSION_C               0
43 
44 /*==================================================================================================
45 *                                     FILE VERSION CHECKS
46 ==================================================================================================*/
47 /* Check if Clock_Ip_Monitor.c file and Clock_Ip_Private.h file are of the same vendor */
48 #if (CLOCK_IP_MONITOR_VENDOR_ID_C != CLOCK_IP_PRIVATE_VENDOR_ID)
49     #error "Clock_Ip_Monitor.c and Clock_Ip_Private.h have different vendor ids"
50 #endif
51 
52 /* Check if Clock_Ip_Monitor.c file and Clock_Ip_Private.h file are of the same Autosar version */
53 #if ((CLOCK_IP_MONITOR_AR_RELEASE_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MAJOR_VERSION) || \
54      (CLOCK_IP_MONITOR_AR_RELEASE_MINOR_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_MINOR_VERSION) || \
55      (CLOCK_IP_MONITOR_AR_RELEASE_REVISION_VERSION_C != CLOCK_IP_PRIVATE_AR_RELEASE_REVISION_VERSION) \
56     )
57     #error "AutoSar Version Numbers of Clock_Ip_Monitor.c and Clock_Ip_Private.h are different"
58 #endif
59 
60 /* Check if Clock_Ip_Monitor.c file and Clock_Ip_Private.h file are of the same Software version */
61 #if ((CLOCK_IP_MONITOR_SW_MAJOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MAJOR_VERSION) || \
62      (CLOCK_IP_MONITOR_SW_MINOR_VERSION_C != CLOCK_IP_PRIVATE_SW_MINOR_VERSION) || \
63      (CLOCK_IP_MONITOR_SW_PATCH_VERSION_C != CLOCK_IP_PRIVATE_SW_PATCH_VERSION) \
64     )
65     #error "Software Version Numbers of Clock_Ip_Monitor.c and Clock_Ip_Private.h are different"
66 #endif
67 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
68 /* Check if Clock_Ip_Monitor.c file and SchM_Mcu.h file are of the same Autosar version */
69 #if ((CLOCK_IP_MONITOR_AR_RELEASE_MAJOR_VERSION_C != SCHM_MCU_AR_RELEASE_MAJOR_VERSION) || \
70      (CLOCK_IP_MONITOR_AR_RELEASE_MINOR_VERSION_C != SCHM_MCU_AR_RELEASE_MINOR_VERSION))
71     #error "AutoSar Version Numbers of Clock_Ip_Monitor.c and SchM_Mcu.h are different"
72 #endif
73 #endif
74 
75 /*==================================================================================================
76 *                           LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
77 ==================================================================================================*/
78 
79 /*==================================================================================================
80 *                                          LOCAL MACROS
81 ==================================================================================================*/
82 #ifdef CLOCK_IP_CMU_FC_FCE_REF_CNT_LFREF_HFREF
83 #define CLOCK_IP_CMU_REFERENCE_COUNTER_MINIMUM_VALUE_MULTIPLIER 10U
84 #define CLOCK_IP_CMU_FC_VAR                                     3U
85 #define CLOCK_IP_CMU_REFERENCE_CLOCK_VARIATION                  33U
86 #define CLOCK_IP_CMU_MONITORED_CLOCK_VARIATION                  11U
87 #define CLOCK_IP_DIVIDE_BY_1000                                 1000U
88 
89 #if defined(CLOCK_IP_FEATURE_OFFSET_REFERENCE_COUNT_FORMULA1)
90     #define CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA1 CLOCK_IP_FEATURE_OFFSET_REFERENCE_COUNT_FORMULA1
91 #else
92     #define CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA1 1U
93 #endif
94 
95 #if defined(CLOCK_IP_FEATURE_MULTIPLIER_REFERENCE_COUNT_FORMULA1)
96     #define CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA1 CLOCK_IP_FEATURE_MULTIPLIER_REFERENCE_COUNT_FORMULA1
97 #else
98     #define CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA1 3U
99 #endif
100 
101 #if defined(CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA2)
102     #define CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA2 CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA2
103 #else
104     #define CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA2 9U
105 #endif
106 
107 #if defined(CLOCK_IP_FEATURE_MULTIPLIER_REFERENCE_COUNT_FORMULA2)
108     #define CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA2 CLOCK_IP_FEATURE_MULTIPLIER_REFERENCE_COUNT_FORMULA2
109 #else
110     #define CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA2 5U
111 #endif
112 
113 #endif
114 
115 /*==================================================================================================
116 *                                         LOCAL CONSTANTS
117 ==================================================================================================*/
118 
119 /*==================================================================================================
120 *                                         LOCAL VARIABLES
121 ==================================================================================================*/
122 
123 /* Clock start initialized section data */
124 #define MCU_START_SEC_VAR_CLEARED_32
125 #include "Mcu_MemMap.h"
126 
127 #ifdef CLOCK_IP_CMU_FC_FCE_REF_CNT_LFREF_HFREF
128 #if !(defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
129 static uint32 HashCmu[CLOCK_IP_CMUS_COUNT];
130 #endif
131 #endif
132 
133 /* Clock stop initialized section data */
134 #define MCU_STOP_SEC_VAR_CLEARED_32
135 #include "Mcu_MemMap.h"
136 
137 /*==================================================================================================
138 *                                        GLOBAL VARIABLES
139 ==================================================================================================*/
140 
141 /*==================================================================================================
142 *                                    LOCAL FUNCTION PROTOTYPES
143 ==================================================================================================*/
144 /* Clock start section code */
145 #define MCU_START_SEC_CODE
146 
147 #include "Mcu_MemMap.h"
148 
149 /*  TODO ARTD-738  Implement CMU in Clock_Ip driver    */
150 
151 static void Clock_Ip_ClockMonitorEmpty(Clock_Ip_CmuConfigType const* Config);
152 static void Clock_Ip_ClockMonitorEmpty_Set( Clock_Ip_CmuConfigType const* Config,
153                                             uint32 Index
154                                            );
155 static void Clock_Ip_ClockMonitorEmpty_Disable(Clock_Ip_NameType Name);
156 
157 #ifdef CLOCK_IP_CMU_FC_FCE_REF_CNT_LFREF_HFREF
158 static void Clock_Ip_ResetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config);
159 #if !(defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
160 static void Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config, uint32 Index);
161 #endif
162 static void Clock_Ip_DisableCmuFcFceRefCntLfrefHfref(Clock_Ip_NameType Name);
163 static void Clock_Ip_EnableCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config);
164 #endif
165 
166 #if (defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
167 /* Set clock monitor via register value configuration */
168 static void Clock_Ip_SetClockMonitorRegisterValues(Clock_Ip_CmuConfigType const* Config, uint32 Index);
169 #endif
170 
171 
172 
173 
174 /* Clock stop section code */
175 #define MCU_STOP_SEC_CODE
176 
177 #include "Mcu_MemMap.h"
178 
179 /*==================================================================================================
180 *                                         LOCAL FUNCTIONS
181 ==================================================================================================*/
182 
183 /* Clock start section code */
184 #define MCU_START_SEC_CODE
185 
186 #include "Mcu_MemMap.h"
187 
Clock_Ip_ClockMonitorEmpty(Clock_Ip_CmuConfigType const * Config)188 static void Clock_Ip_ClockMonitorEmpty(Clock_Ip_CmuConfigType const* Config)
189 {
190     (void)Config;
191     /* No implementation */
192 }
193 
Clock_Ip_ClockMonitorEmpty_Set(Clock_Ip_CmuConfigType const * Config,uint32 Index)194 static void Clock_Ip_ClockMonitorEmpty_Set( Clock_Ip_CmuConfigType const* Config,
195                                             uint32 Index
196                                            )
197 {
198     (void)Config;
199     (void)Index;
200     /* No implementation */
201 }
202 
Clock_Ip_ClockMonitorEmpty_Disable(Clock_Ip_NameType Name)203 static void Clock_Ip_ClockMonitorEmpty_Disable(Clock_Ip_NameType Name)
204 {
205     (void)Name;
206     /* No implementation */
207 }
208 
209 #if (defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
210 /* Set clock monitor via register value configuration */
Clock_Ip_SetClockMonitorRegisterValues(Clock_Ip_CmuConfigType const * Config,uint32 Index)211 static void Clock_Ip_SetClockMonitorRegisterValues( Clock_Ip_CmuConfigType const* Config,
212                                                     uint32 Index
213                                                    )
214 {
215     (void)Index;
216 
217     if (NULL_PTR != Config)
218     {
219         Clock_Ip_WriteRegisterValues(&Config->Indexes);
220     }
221 }
222 
223 #endif
224 
225 #ifdef CLOCK_IP_CMU_FC_FCE_REF_CNT_LFREF_HFREF
Clock_Ip_DisableCmuFcFceRefCntLfrefHfref(Clock_Ip_NameType Name)226 static void Clock_Ip_DisableCmuFcFceRefCntLfrefHfref(Clock_Ip_NameType Name)
227 {
228     const Clock_Ip_CmuInfoType * CmuInformation = &Clock_Ip_axCmuInfo[Clock_Ip_au8ClockFeatures[Name][CLOCK_IP_CMU_INDEX]];
229     Clock_Ip_ClockMonitorType* const CmuFc    = CmuInformation->CmuInstance;
230 
231     boolean TimeoutOccurred = FALSE;
232     uint32 StartTime;
233     uint32 ElapsedTime;
234     uint32 TimeoutTicks;
235     uint32 FrequencyCheckStatus;
236 
237 #if (defined (CLOCK_IP_S32K118) || defined(CLOCK_IP_S32K116))
238     if (0U == ((IP_PCC->PCCn[62] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT))
239     {
240         #if defined(CLOCK_IP_HAS_FIRC_MON1_CLK)
241             #ifdef CLOCK_IP_ENABLE_USER_MODE_SUPPORT
242                 #if (STD_ON == CLOCK_IP_ENABLE_USER_MODE_SUPPORT)
243                     OsIf_Trusted_Call(Clock_Ip_EnableCmu0Gate_TrustedCall);
244                 #else
245                     Clock_Ip_EnableCmu0Gate_TrustedCall();
246                 #endif
247             #endif /* CLOCK_IP_ENABLE_USER_MODE_SUPPORT */
248         #endif
249         /* Enable clock gate for CMU0 device */
250         IP_PCC->PCCn[62] |= PCC_PCCn_CGC_MASK;
251     }
252 
253     if (0U == ((IP_PCC->PCCn[63] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT))
254     {
255         #if defined(CLOCK_IP_HAS_FIRC_MON2_CLK)
256             #ifdef CLOCK_IP_ENABLE_USER_MODE_SUPPORT
257                 #if (STD_ON == CLOCK_IP_ENABLE_USER_MODE_SUPPORT)
258                     OsIf_Trusted_Call(Clock_Ip_EnableCmu1Gate_TrustedCall);
259                 #else
260                     Clock_Ip_EnableCmu1Gate_TrustedCall();
261                 #endif
262             #endif /* CLOCK_IP_ENABLE_USER_MODE_SUPPORT */
263         #endif
264         /* Enable clock gate for CMU1 device */
265         IP_PCC->PCCn[63] |= PCC_PCCn_CGC_MASK;
266     }
267 #endif
268 
269     /* Enter critical region*/
270     SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01();
271     /* Only disable frequency check if it is enabled */
272     if (CLOCK_IP_CMU_FREQUENCY_CHECK_ENABLED == (CmuFc->GCR & CMU_FC_GCR_FCE_MASK))
273     {
274         Clock_Ip_StartTimeout(&StartTime, &ElapsedTime, &TimeoutTicks, CLOCK_IP_TIMEOUT_VALUE_US);
275         /* Wait for frequency check to be running. */
276         do
277         {
278             FrequencyCheckStatus = (CmuFc->SR & CMU_FC_SR_RS_MASK);
279             TimeoutOccurred = Clock_Ip_TimeoutExpired(&StartTime, &ElapsedTime, TimeoutTicks);
280         }
281         while ((CLOCK_IP_CMU_FREQUENCY_CHECK_STOPPED == FrequencyCheckStatus) && (!TimeoutOccurred));
282 
283         /* timeout notification */
284         if (TimeoutOccurred)
285         {
286             /* Report timeout error */
287             Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Name);
288         }
289 
290         /* Disable frequency check */
291         CmuFc->GCR &= ~CMU_FC_GCR_FCE_MASK;
292 
293     }
294 
295     /* Disable interupts */
296     CmuFc->IER &= ~(CMU_FC_IER_FLLIE_MASK | CMU_FC_IER_FHHIE_MASK | CMU_FC_IER_FLLAIE_MASK | CMU_FC_IER_FHHAIE_MASK);
297 
298     /* Clear flags */
299     CmuFc->SR |= (CMU_FC_SR_FLL_MASK | CMU_FC_SR_FHH_MASK);
300 
301     /* Exit critical region. */
302     SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01();
303 }
304 
305 /* Reset CMU register */
Clock_Ip_ResetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const * Config)306 static void Clock_Ip_ResetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config)
307 {
308     if (NULL_PTR != Config)
309     {
310         Clock_Ip_DisableCmuFcFceRefCntLfrefHfref(Config->Name);
311     }
312 }
313 
314 #if !(defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const * Config,uint32 Index)315 static void Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config, uint32 Index)
316 {
317     const Clock_Ip_CmuInfoType * CmuInformation;
318     Clock_Ip_ClockMonitorType* CmuFc;
319 
320     uint32 ReferenceClk = 0U;
321     uint32 MonitoredClk = 0U;
322     uint32 BusClk = 0U;
323     uint32 RefCount = 0U;
324     uint32 HfRef = 0U;
325     uint32 LfRef = 0U;
326     uint32 Cmp1;
327     uint32 Cmp2;
328     uint32 DivideBy;
329     uint32 DividerResult;
330     uint32 ModuloValue;
331 
332     if (NULL_PTR != Config)
333     {
334         CmuInformation = &Clock_Ip_axCmuInfo[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_CMU_INDEX]];
335         CmuFc    = CmuInformation->CmuInstance;
336 
337         /* Do not calculate cmu values if these values are already calculated and written in hw registers */
338         if (HashCmu[Index] != ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->MonitoredClockFrequency)  ^ ((uint32)Config->Name))))
339         {
340             HashCmu[Index] = ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->MonitoredClockFrequency)  ^ ((uint32)Config->Name)));
341 
342             ReferenceClk = (*Clock_Ip_pxConfig->ConfiguredFrequencies)[Clock_Ip_FreqIds[CmuInformation->Reference]].ConfiguredFrequencyValue / CLOCK_IP_DIVIDE_BY_1000;
343             BusClk       = (*Clock_Ip_pxConfig->ConfiguredFrequencies)[Clock_Ip_FreqIds[CmuInformation->Bus]].ConfiguredFrequencyValue / CLOCK_IP_DIVIDE_BY_1000;
344             MonitoredClk = Config->MonitoredClockFrequency / CLOCK_IP_DIVIDE_BY_1000;
345 
346         #if (defined(CLOCK_IP_DEV_ERROR_DETECT) && (CLOCK_IP_DEV_ERROR_DETECT == STD_ON))
347             CLOCK_IP_DEV_ASSERT(ReferenceClk != 0U);
348             CLOCK_IP_DEV_ASSERT(BusClk != 0U);
349             CLOCK_IP_DEV_ASSERT(MonitoredClk != 0U);
350         #endif
351             /* Avoid divide by zero */
352             if ((ReferenceClk != 0U) && (BusClk != 0U) && (MonitoredClk != 0U))
353             {
354                 /* Cmp1 = ceiling of (3 * fRef/ fBus) */
355                 Cmp1 = CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA1 + (uint32)((CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA1 * ReferenceClk) / BusClk);
356                 /* Cmp2 = ceiling of (8 + (5 * fRef / fMonitor)) */
357                 Cmp2 = CLOCK_IP_OFFSET_REFERENCE_COUNT_FORMULA2 + (uint32)((CLOCK_IP_MULTIPLIER_REFERENCE_COUNT_FORMULA2 * ReferenceClk) / MonitoredClk);
358 
359                 /* REF count = Max(cmp1,cmp2) */
360                 RefCount = (Cmp1 > Cmp2) ? Cmp1 : Cmp2;
361 
362 
363                 /* (fMonitoredClk mul_by (1000U plus CLOCK_IP_CMU_MONITORED_CLOCK_VARIATION)) divide_by (fReferenceClk mul_by (1000U minus CLOCK_IP_CMU_REFERENCE_CLOCK_VARIATION)) plus CLOCK_IP_CMU_FC_VAR plus 1U */
364                 HfRef = MonitoredClk * (1000U + CLOCK_IP_CMU_MONITORED_CLOCK_VARIATION) * RefCount;
365                 DivideBy = ReferenceClk * (1000U - CLOCK_IP_CMU_REFERENCE_CLOCK_VARIATION);
366                 DividerResult = (uint32) HfRef / DivideBy;
367                 ModuloValue = HfRef - (DivideBy * DividerResult);
368                 HfRef = (DividerResult * CLOCK_IP_CMU_REFERENCE_COUNTER_MINIMUM_VALUE_MULTIPLIER) + ((uint32)((ModuloValue * CLOCK_IP_CMU_REFERENCE_COUNTER_MINIMUM_VALUE_MULTIPLIER) / DivideBy)) + (CLOCK_IP_CMU_FC_VAR + 1U);
369 
370                 /* (fMonitoredClk mul_by (1000U minus CLOCK_IP_CMU_MONITORED_CLOCK_VARIATION)) divide_by (fReferenceClk mul_by (1000U plus CLOCK_IP_CMU_REFERENCE_CLOCK_VARIATION)) minus CLOCK_IP_CMU_FC_VAR */
371                 LfRef = MonitoredClk * (1000U - CLOCK_IP_CMU_MONITORED_CLOCK_VARIATION) * RefCount;
372                 DivideBy = ReferenceClk * (1000U + CLOCK_IP_CMU_REFERENCE_CLOCK_VARIATION);
373                 DividerResult = (uint32) LfRef / DivideBy;
374                 ModuloValue = LfRef - (DivideBy * DividerResult);
375                 LfRef = (DividerResult * CLOCK_IP_CMU_REFERENCE_COUNTER_MINIMUM_VALUE_MULTIPLIER) + ((uint32)((ModuloValue * CLOCK_IP_CMU_REFERENCE_COUNTER_MINIMUM_VALUE_MULTIPLIER) / DivideBy)) - CLOCK_IP_CMU_FC_VAR;
376 
377 
378                 /* Set reference counter */
379                 CmuFc->RCCR = RefCount * CLOCK_IP_CMU_REFERENCE_COUNTER_MINIMUM_VALUE_MULTIPLIER;
380 
381                 /* Set high limit */
382                 CmuFc->HTCR = HfRef;
383 
384                 /* Set low limit */
385                 CmuFc->LTCR = LfRef;
386             }
387         }
388 
389         /* Enable/disable interrupts */
390         CmuFc->IER = Config->Interrupt;
391     }
392     else
393     {
394         (void)Index;
395         (void)CmuInformation;
396         (void)CmuFc;
397         (void)ReferenceClk;
398         (void)MonitoredClk;
399         (void)BusClk;
400         (void)RefCount;
401         (void)HfRef;
402         (void)LfRef;
403         (void)Cmp1;
404         (void)Cmp2;
405         (void)DivideBy;
406         (void)DividerResult;
407         (void)ModuloValue;
408     }
409 }
410 #endif
411 
Clock_Ip_EnableCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const * Config)412 static void Clock_Ip_EnableCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config)
413 {
414     const Clock_Ip_CmuInfoType *CmuInformation;
415     Clock_Ip_ClockMonitorType* CmuFc;
416 
417     if (NULL_PTR != Config)
418     {
419         CmuInformation  = &Clock_Ip_axCmuInfo[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_CMU_INDEX]];
420         CmuFc           = CmuInformation->CmuInstance;
421 
422         /* Enable cmu */
423         if (Config->Enable != 0U)
424         {
425             CmuFc->GCR |= CMU_FC_GCR_FCE_MASK;
426         }
427         else
428         {
429             CmuFc->GCR &= ~CMU_FC_GCR_FCE_MASK;
430         }
431     }
432     else
433     {
434         (void)Config;
435         (void)CmuInformation;
436         (void)CmuFc;
437     }
438 }
439 
440 #endif
441 
442 
443 /*==================================================================================================
444 *                                        GLOBAL FUNCTIONS
445 ==================================================================================================*/
446 
447 #if CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE > 0U
448 
Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu)449 uint32 Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu)
450 {
451     uint32 CmuIsrValue;
452 
453     /* Read flags */
454     CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK;
455 
456     return CmuIsrValue;
457 }
458 
459 /**
460 * @brief        This function clear the CMU interrupt flag from CMU module.
461 * @details      Called by RGM ISR routine when a user notification for CMU FCCU events is configured
462 *
463 * @return       void
464 *
465 * @implements Clock_Ip_CMU_ClockFailInt_Activity
466 *
467 */
Clock_Ip_CMU_ClockFailInt(void)468 void Clock_Ip_CMU_ClockFailInt(void)
469 {
470     uint32 CmuIerValue;
471     uint32 CmuIsrValue = 0U;
472     uint32 IndexCmu;
473 
474     for (IndexCmu = 0U; IndexCmu < CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE; IndexCmu++)
475     {
476         /* Read flags */
477         CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK;
478 
479         /* Check whether driver is initialized */
480         if(NULL_PTR != Clock_Ip_pxConfig)
481         {
482             /* Read interrupt enable */
483             CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK;
484             /* Filter all interrupts that are not enabled from cmuIsrValue */
485             CmuIsrValue = CmuIsrValue & CmuIerValue;
486 
487             /* If at least one interrupt has been triggered */
488             if (CmuIsrValue != 0U)
489             {
490                 /* Clear status flag */
491                 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue;
492 #ifdef CLOCK_IP_CMU_FCCU_NOTIFICATION
493                 CLOCK_IP_CMU_FCCU_NOTIFICATION(Clock_Ip_aeCmuNames[IndexCmu]);
494 #else
495                 Clock_Ip_ReportClockErrors(CLOCK_IP_CMU_ERROR, Clock_Ip_aeCmuNames[IndexCmu]);
496 #endif
497             }
498         }
499         else
500         {
501             /* Clear status flag */
502             Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue;
503         }
504     }
505 }
506 #endif
507 
508 
509 /* Clock stop section code */
510 #define MCU_STOP_SEC_CODE
511 
512 #include "Mcu_MemMap.h"
513 
514 /*==================================================================================================
515 *                                        GLOBAL CONSTANTS
516 ==================================================================================================*/
517 
518 /* Clock start constant section data */
519 #define MCU_START_SEC_CONST_UNSPECIFIED
520 
521 #include "Mcu_MemMap.h"
522 
523 const Clock_Ip_ClockMonitorCallbackType Clock_Ip_axCmuCallbacks[CLOCK_IP_CMU_CALLBACKS_COUNT] =
524 {
525     {
526         Clock_Ip_ClockMonitorEmpty,                /* Reset */
527         Clock_Ip_ClockMonitorEmpty_Set,            /* Set */
528         Clock_Ip_ClockMonitorEmpty_Disable,        /* Disable */
529         Clock_Ip_ClockMonitorEmpty,                /* Enable */
530     },
531 #ifdef CLOCK_IP_CMU_FC_FCE_REF_CNT_LFREF_HFREF
532     {
533         Clock_Ip_ResetCmuFcFceRefCntLfrefHfref,          /* Reset */
534 #if (defined(CLOCK_IP_REGISTER_VALUES_OPTIMIZATION) && (CLOCK_IP_REGISTER_VALUES_OPTIMIZATION == STD_ON))
535         Clock_Ip_SetClockMonitorRegisterValues,          /* Set */
536 #else
537         Clock_Ip_SetCmuFcFceRefCntLfrefHfref,            /* Set */
538 #endif
539         Clock_Ip_DisableCmuFcFceRefCntLfrefHfref,        /* Disable */
540         Clock_Ip_EnableCmuFcFceRefCntLfrefHfref,         /* Enable */
541     },
542 #endif
543 
544 
545 };
546 
547 /* Clock stop constant section data */
548 #define MCU_STOP_SEC_CONST_UNSPECIFIED
549 
550 #include "Mcu_MemMap.h"
551 
552 
553 #ifdef __cplusplus
554 }
555 #endif
556 
557 /** @} */
558 
559