1 /* 2 * Copyright (c) 2016, Freescale Semiconductor, Inc. 3 * Copyright 2016 - 2019 NXP 4 * All rights reserved. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 #ifndef __USB_HOST_IP3516HS_H__ 10 #define __USB_HOST_IP3516HS_H__ 11 12 /******************************************************************************* 13 * Definitions 14 ******************************************************************************/ 15 16 /*! CAPLENGTH/CHIPID register */ 17 #define USB_HOST_IP3516HS_CAPLENGTH_CHIPID_CAPLENGTH_MASK (0xFFU) 18 #define USB_HOST_IP3516HS_HCSPARAMS_CHIPID_MASK (0xFFFF0000U) 19 #define USB_HOST_IP3516HS_HCSPARAMS_CHIPID_SHIFT (16U) 20 21 /*! HCSPARAMS register */ 22 #define USB_HOST_IP3516HS_HCSPARAMS_N_PORTS_MASK (0x0FU) 23 #define USB_HOST_IP3516HS_HCSPARAMS_PPC_MASK (0x10U) 24 #define USB_HOST_IP3516HS_HCSPARAMS_P_INDICATOR_MASK (0x10000U) 25 26 /*! HCCPARAMS register */ 27 #define USB_HOST_IP3516HS_HCCPARAMS_LPMC_MASK (0x20000U) 28 29 /*! FLADJ Register */ 30 #define USB_HOST_IP3516HS_FLADJ_FLADJ_MASK (0x3FU) 31 #define USB_HOST_IP3516HS_FLADJ_FRINDEX_MASK (0x3FFF0000U) 32 #define USB_HOST_IP3516HS_FLADJ_FRINDEX_SHIFT (16U) 33 34 /*! ATL PTD BaseAddress register */ 35 #define USB_HOST_IP3516HS_ATL_PTD_ATL_CUR_MASK (0x1F0U) 36 #define USB_HOST_IP3516HS_ATL_PTD_ATL_CUR_SHIFT (4U) 37 #define USB_HOST_IP3516HS_ATL_PTD_ATL_BASE_MASK (0xFFFFFE00U) 38 #define USB_HOST_IP3516HS_ATL_PTD_ATL_BASE_SHIFT (9U) 39 40 /*! ISO PTD BaseAddress register */ 41 #define USB_HOST_IP3516HS_ISO_PTD_ISO_FIRST_MASK (0x3E0U) 42 #define USB_HOST_IP3516HS_ISO_PTD_ISO_FIRST_SHIFT (5U) 43 #define USB_HOST_IP3516HS_ISO_PTD_ISO_BASE_MASK (0xFFFFFC00U) 44 #define USB_HOST_IP3516HS_ISO_PTD_ISO_BASE_SHIFT (10U) 45 46 /*! INT PTD BaseAddress register */ 47 #define USB_HOST_IP3516HS_INT_PTD_INT_FIRST_MASK (0x3E0U) 48 #define USB_HOST_IP3516HS_INT_PTD_INT_FIRST_SHIFT (5U) 49 #define USB_HOST_IP3516HS_INT_PTD_INT_BASE_MASK (0xFFFFFC00U) 50 #define USB_HOST_IP3516HS_INT_PTD_INT_BASE_SHIFT (10U) 51 52 /*! Data Payload BaseAddress register */ 53 #define USB_HOST_IP3516HS_DAT_BASE_MASK (0xFFFF0000U) 54 #define USB_HOST_IP3516HS_DAT_BASE_SHIFT (16U) 55 56 /*! USBCMD Register */ 57 #define USB_HOST_IP3516HS_USBCMD_RS_MASK (0x01U) 58 #define USB_HOST_IP3516HS_USBCMD_HCRESET_MASK (0x02U) 59 #define USB_HOST_IP3516HS_USBCMD_FLS_MASK (0x0CU) 60 #define USB_HOST_IP3516HS_USBCMD_FLS_SHIFT (2U) 61 #define USB_HOST_IP3516HS_USBCMD_FLS(x) \ 62 (((x) << USB_HOST_IP3516HS_USBCMD_FLS_SHIFT) & USB_HOST_IP3516HS_USBCMD_FLS_MASK) 63 #define USB_HOST_IP3516HS_USBCMD_LHCR_MASK (0x80U) 64 #define USB_HOST_IP3516HS_USBCMD_ATL_EN_MASK (0x100U) 65 #define USB_HOST_IP3516HS_USBCMD_ISO_EN_MASK (0x200U) 66 #define USB_HOST_IP3516HS_USBCMD_INT_EN_MASK (0x400U) 67 #define USB_HOST_IP3516HS_USBCMD_HIRD_MASK (0xF000000U) 68 #define USB_HOST_IP3516HS_USBCMD_HIRD_SHIFT (24U) 69 #define USB_HOST_IP3516HS_USBCMD_LPM_RWU_MASK (0x10000000U) 70 #define USB_HOST_IP3516HS_USBCMD_LPM_RWU_SHIFT (28U) 71 72 /*! USBSTS Register */ 73 #define USB_HOST_IP3516HS_USBSTS_PCD_MASK (0x04U) 74 #define USB_HOST_IP3516HS_USBSTS_FLR_MASK (0x08U) 75 #define USB_HOST_IP3516HS_USBSTS_ATL_IRQ_MASK (0x10000U) 76 #define USB_HOST_IP3516HS_USBSTS_ISO_IRQ_MASK (0x20000U) 77 #define USB_HOST_IP3516HS_USBSTS_INT_IRQ_MASK (0x40000U) 78 #define USB_HOST_IP3516HS_USBSTS_SOF_IRQ_MASK (0x80000U) 79 80 /*! USBINTR Register */ 81 #define USB_HOST_IP3516HS_USBINTR_PCDE_MASK (0x04U) 82 #define USB_HOST_IP3516HS_USBINTR_FLRE_MASK (0x08U) 83 #define USB_HOST_IP3516HS_USBINTR_ATL_IRQ_E_MASK (0x10000U) 84 #define USB_HOST_IP3516HS_USBINTR_ISO_IRQ_E_MASK (0x20000U) 85 #define USB_HOST_IP3516HS_USBINTR_INT_IRQ_E_MASK (0x40000U) 86 #define USB_HOST_IP3516HS_USBINTR_SOF_E_MASK (0x80000U) 87 88 /*! PORTSC1 Register */ 89 #define USB_HOST_IP3516HS_PORTSC1_CCS_MASK (0x01U) 90 #define USB_HOST_IP3516HS_PORTSC1_CSC_MASK (0x02U) 91 #define USB_HOST_IP3516HS_PORTSC1_PED_MASK (0x04U) 92 #define USB_HOST_IP3516HS_PORTSC1_PEDC_MASK (0x08U) 93 #define USB_HOST_IP3516HS_PORTSC1_OCA_MASK (0x10U) 94 #define USB_HOST_IP3516HS_PORTSC1_OCC_MASK (0x20U) 95 #define USB_HOST_IP3516HS_PORTSC1_FPR_MASK (0x40U) 96 #define USB_HOST_IP3516HS_PORTSC1_SUSP_MASK (0x80U) 97 #define USB_HOST_IP3516HS_PORTSC1_PR_MASK (0x100U) 98 #define USB_HOST_IP3516HS_PORTSC1_SUS_L1_MASK (0x200U) 99 #define USB_HOST_IP3516HS_PORTSC1_LS_MASK (0xC00U) 100 #define USB_HOST_IP3516HS_PORTSC1_LS_SHIFT (10U) 101 #define USB_HOST_IP3516HS_PORTSC1_PP_MASK (0x1000U) 102 #define USB_HOST_IP3516HS_PORTSC1_PIC_MASK (0xC000U) 103 #define USB_HOST_IP3516HS_PORTSC1_PIC_SHIFT (14U) 104 #define USB_HOST_IP3516HS_PORTSC1_PTC_MASK (0xF0000U) 105 #define USB_HOST_IP3516HS_PORTSC1_PTC_SHIFT (16U) 106 #define USB_HOST_IP3516HS_PORTSC1_PSPD_MASK (0x300000U) 107 #define USB_HOST_IP3516HS_PORTSC1_PSPD_SHIFT (20U) 108 #define USB_HOST_IP3516HS_PORTSC1_WOO_MASK (0x400000U) 109 #define USB_HOST_IP3516HS_PORTSC1_SUS_STAT_MASK (0x1800000U) 110 #define USB_HOST_IP3516HS_PORTSC1_SUS_STAT_SHIFT (23U) 111 #define USB_HOST_IP3516HS_PORTSC1_DEV_ADD_MASK (0xFE000000U) 112 #define USB_HOST_IP3516HS_PORTSC1_DEV_ADD_SHIFT (25U) 113 #define USB_HOST_IP3516HS_PORTSC1_WIC \ 114 (USB_HOST_IP3516HS_PORTSC1_CSC_MASK | USB_HOST_IP3516HS_PORTSC1_PEDC_MASK | USB_HOST_IP3516HS_PORTSC1_OCC_MASK) 115 116 /*! Last PTD in use Register */ 117 #define USB_HOST_IP3516HS_LAST_PTD_IN_USE_ATL_LAST_MASK (0x1FU) 118 #define USB_HOST_IP3516HS_LAST_PTD_IN_USE_ATL_LAST_SHIFT (0U) 119 #define USB_HOST_IP3516HS_LAST_PTD_IN_USE_ISO_LAST_MASK (0x1F00U) 120 #define USB_HOST_IP3516HS_LAST_PTD_IN_USE_ISO_LAST_SHIFT (8U) 121 #define USB_HOST_IP3516HS_LAST_PTD_IN_USE_INT_LAST_MASK (0x1F0000U) 122 #define USB_HOST_IP3516HS_LAST_PTD_IN_USE_INT_LAST_SHIFT (16U) 123 124 /*! PORT Mode Register */ 125 #define USB_HOST_IP3516HS_PORT_MODE_ID0_MASK (0x01U) 126 #define USB_HOST_IP3516HS_PORT_MODE_ID0_EN_MASK (0x100U) 127 #define USB_HOST_IP3516HS_PORT_MODE_DEV_ENABLE_MASK (0x1000U) 128 #define USB_HOST_IP3516HS_PORT_MODE_SW_CTRL_PDCOM_MASK (0x4000U) 129 #define USB_HOST_IP3516HS_PORT_MODE_SW_PDCOM_MASK (0x8000U) 130 /*! 131 * @addtogroup usb_host_controller_ip3516hs 132 * @{ 133 */ 134 /*! @brief IP3516HS Transaction Descriptor */ 135 typedef struct _usb_host_ip3516hs_atl_struct 136 { 137 union 138 { 139 uint32_t controlState; 140 struct 141 { 142 volatile uint32_t V : 1U; /*!< Valid */ 143 volatile uint32_t NextPTDPointer : 5U; /*!< NextPTDPointer */ 144 uint32_t R1 : 1U; /*!< Reserved */ 145 volatile uint32_t J : 1U; /*!< Jump: 0: increment the PTD pointer. 1: enable the next PTD branching. */ 146 volatile uint32_t 147 uFrame : 8U; /*!< This field is only applicable for interrupt and isochronous endpoints. */ 148 volatile uint32_t MaxPacketLength : 11U; /*!< Maximum Packet Length */ 149 uint32_t R2 : 1U; /*!< Reserved */ 150 volatile uint32_t Mult : 2U; /*!< EndpointNumber */ 151 uint32_t R3 : 2U; /*!< Reserved */ 152 } stateBitField; 153 } control1Union; 154 union 155 { 156 uint32_t controlState; 157 struct 158 { 159 volatile uint32_t EP : 4U; /*!< Endpoint number */ 160 volatile uint32_t DeviceAddress : 7U; /*!< Device address */ 161 volatile uint32_t S : 1U; /*!< This bit indicates whether a split transaction has to be executed. */ 162 volatile uint32_t RL : 4U; /*!< Reload: If RL is set to 0h, hardware ignores the NakCnt value. RL and 163 NakCnt are set to the same value before a transaction. */ 164 volatile uint32_t SE : 2U; /*!< This specifies the speed for a Control or Interrupt transaction to a device 165 that is not high-speed: 00-Full-speed, 10-Low-speed */ 166 volatile uint32_t PortNumber : 7U; /*!< Port number */ 167 volatile uint32_t HubAddress : 7U; /*!< Hub Address */ 168 } stateBitField; 169 } control2Union; 170 union 171 { 172 uint32_t data; 173 struct 174 { 175 volatile uint32_t NrBytesToTransfer : 15U; /*!< Number of Bytes to Transfer. */ 176 volatile uint32_t I : 1U; /*!< Interrupt on Complete */ 177 volatile uint32_t DataStartAddress : 16U; /*!< Data buffer address */ 178 } dataBitField; 179 } dataUnion; 180 union 181 { 182 uint32_t state; 183 struct 184 { 185 volatile uint32_t NrBytesToTransfer : 15U; /*!< Number of Bytes Transferred. */ 186 volatile uint32_t 187 Token : 2U; /*!< Token: Identifies the token Packet Identifier (PID) for this transaction. */ 188 volatile uint32_t EpType : 2U; /*!< Endpoint type */ 189 volatile uint32_t NakCnt : 4U; /*!< Nak count */ 190 volatile uint32_t Cerr : 2U; /*!< Error count */ 191 volatile uint32_t DT : 1U; /*!< Data Toggle */ 192 volatile uint32_t P : 1U; /*!< Ping */ 193 volatile uint32_t SC : 1U; /*!< Start/Complete */ 194 volatile uint32_t X : 1U; /*!< Error */ 195 volatile uint32_t B : 1U; /*!< Babble */ 196 volatile uint32_t H : 1U; /*!< Halt */ 197 volatile uint32_t A : 1U; /*!< Active */ 198 } stateBitField; 199 } stateUnion; 200 } usb_host_ip3516hs_atl_struct_t; 201 202 /*! @brief IP3516HS Transaction Descriptor */ 203 typedef struct _usb_host_ip3516hs_ptl_struct 204 { 205 union 206 { 207 uint32_t controlState; 208 struct 209 { 210 volatile uint32_t V : 1U; /*!< valid */ 211 volatile uint32_t 212 NextPTDPointer : 5U; /*!< Next PTD Counter: Next PTD branching assigned by the PTDpointer. */ 213 uint32_t R1 : 1U; /*!< Reserved */ 214 volatile uint32_t J : 1U; /*!< Jump: 0: increment the PTD pointer. 1: enable the next PTD branching. */ 215 volatile uint32_t 216 uFrame : 8U; /*!< This field is only applicable for interrupt and isochronous endpoints. */ 217 volatile uint32_t MaxPacketLength : 11U; /*!< Maximum Packet Length */ 218 uint32_t R2 : 1U; /*!< Reserved */ 219 volatile uint32_t Mult : 2U; /*!< Multiplier */ 220 uint32_t R3 : 2U; /*!< Reserved */ 221 } stateBitField; 222 } control1Union; 223 union 224 { 225 uint32_t controlState; 226 struct 227 { 228 volatile uint32_t EP : 4U; /*!< Endpoint number */ 229 volatile uint32_t DeviceAddress : 7U; /*!< Device address */ 230 volatile uint32_t S : 1U; /*!< This bit indicates whether a split transaction has to be executed. */ 231 volatile uint32_t RL : 4U; /*!< Reload: If RL is set to 0h, hardware ignores the NakCnt value. RL and 232 NakCnt are set to the same value before a transaction. */ 233 volatile uint32_t SE : 2U; /*!< This specifies the speed for a Control or Interrupt transaction to a device 234 that is not high-speed: 00-Full-speed, 10-Low-speed */ 235 uint32_t R1 : 14U; /*!< Reserved */ 236 } stateBitField; 237 } control2Union; 238 union 239 { 240 uint32_t data; 241 struct 242 { 243 volatile uint32_t NrBytesToTransfer : 15U; /*!< Number of Bytes to Transfer. */ 244 volatile uint32_t I : 1U; /*!< Interrupt on Complete. */ 245 volatile uint32_t DataStartAddress : 16U; /*!< Data buffer address */ 246 } dataBitField; 247 } dataUnion; 248 union 249 { 250 uint32_t state; 251 struct 252 { 253 volatile uint32_t NrBytesToTransfer : 15U; /*!< Number of Bytes Transferred. */ 254 volatile uint32_t 255 Token : 2U; /*!< Token: Identifies the token Packet Identifier (PID) for this transaction. */ 256 volatile uint32_t EpType : 2U; /*!< Endpoint type */ 257 volatile uint32_t NakCnt : 4U; /*!< Nak count */ 258 volatile uint32_t Cerr : 2U; /*!< Error count */ 259 volatile uint32_t DT : 1U; /*!< Data Toggle */ 260 volatile uint32_t P : 1U; /*!< Ping */ 261 volatile uint32_t SC : 1U; /*!< Start/Complete */ 262 volatile uint32_t X : 1U; /*!< Error */ 263 volatile uint32_t B : 1U; /*!< Babble */ 264 volatile uint32_t H : 1U; /*!< Halt */ 265 volatile uint32_t A : 1U; /*!< Active */ 266 } stateBitField; 267 } stateUnion; 268 union 269 { 270 uint32_t status; 271 struct 272 { 273 volatile uint32_t uSA : 8U; /*!< This field is only used for periodic split transactions or if the port is 274 enabled in HS mode. */ 275 volatile uint32_t Status0 : 3U; /*!< Isochronous IN or OUT status at uSOF0 */ 276 volatile uint32_t Status1 : 3U; /*!< Isochronous IN or OUT status at uSOF1 */ 277 volatile uint32_t Status2 : 3U; /*!< Isochronous IN or OUT status at uSOF2 */ 278 volatile uint32_t Status3 : 3U; /*!< Isochronous IN or OUT status at uSOF3 */ 279 volatile uint32_t Status4 : 3U; /*!< Isochronous IN or OUT status at uSOF4 */ 280 volatile uint32_t Status5 : 3U; /*!< Isochronous IN or OUT status at uSOF5 */ 281 volatile uint32_t Status6 : 3U; /*!< Isochronous IN or OUT status at uSOF6 */ 282 volatile uint32_t Status7 : 3U; /*!< Isochronous IN or OUT status at uSOF7 */ 283 } statusBitField; 284 } statusUnion; 285 union 286 { 287 uint32_t isoIn; 288 struct 289 { 290 volatile uint32_t isoIn0 : 12U; /*!< Data length */ 291 volatile uint32_t isoIn1 : 12U; /*!< Data length */ 292 volatile uint32_t isoIn2low : 8U; /*!< Data length */ 293 } bitField; 294 } isoInUnion1; 295 union 296 { 297 uint32_t isoIn; 298 struct 299 { 300 volatile uint32_t isoIn2High : 4U; /*!< Data length */ 301 volatile uint32_t isoIn3 : 12U; /*!< Data length */ 302 volatile uint32_t isoIn4 : 12U; /*!< Data length */ 303 volatile uint32_t isoIn5Low : 4U; /*!< Data length */ 304 } bitField; 305 } isoInUnion2; 306 union 307 { 308 uint32_t isoIn; 309 struct 310 { 311 volatile uint32_t isoIn5High : 8U; /*!< Data length */ 312 volatile uint32_t isoIn6 : 12U; /*!< Data length */ 313 volatile uint32_t isoIn7 : 12U; /*!< Data length */ 314 } bitField; 315 } isoInUnion3; 316 } usb_host_ip3516hs_ptl_struct_t; 317 318 /*! @brief IP3516HS Transaction Descriptor */ 319 typedef struct _usb_host_ip3516hs_sptl_struct 320 { 321 union 322 { 323 uint32_t controlState; 324 struct 325 { 326 volatile uint32_t V : 1U; /*!< Valid */ 327 volatile uint32_t NextPTDPointer : 5U; /*!< NextPTDPointer */ 328 uint32_t R1 : 1U; /*!< Reserved */ 329 volatile uint32_t J : 1U; /*!< Jump */ 330 volatile uint32_t uFrame : 8U; /*!< Frame number at which this PTD will be sent. */ 331 volatile uint32_t MaxPacketLength : 11U; /*!< Maximum Packet Length. */ 332 uint32_t R2 : 1U; /*!< Reserved */ 333 volatile uint32_t Mult : 2U; /*!< Multiplier */ 334 uint32_t R3 : 2U; /*!< Reserved */ 335 } stateBitField; 336 } control1Union; 337 union 338 { 339 uint32_t controlState; 340 struct 341 { 342 volatile uint32_t EP : 4U; /*!< Endpoint number */ 343 volatile uint32_t DeviceAddress : 7U; /*!< Device address */ 344 volatile uint32_t S : 1U; /*!< This bit indicates whether a split transaction has to be executed. */ 345 volatile uint32_t RL : 4U; /*!< Reload: If RL is set to 0h, hardware ignores the NakCnt value. RL and 346 NakCnt are set to the same value before a transaction. */ 347 volatile uint32_t SE : 2U; /*!< This specifies the speed for a Control or Interrupt transaction to a device 348 that is not high-speed: 00-Full-speed, 10-Low-speed */ 349 volatile uint32_t PortNumber : 7U; /*!< Port number */ 350 volatile uint32_t HubAddress : 7U; /*!< Hub Address */ 351 } stateBitField; 352 } control2Union; 353 union 354 { 355 uint32_t data; 356 struct 357 { 358 volatile uint32_t NrBytesToTransfer : 15U; /*!< Number of Bytes to Transfer. */ 359 volatile uint32_t I : 1U; /*!< Interrupt on Complete. */ 360 volatile uint32_t DataStartAddress : 16U; /*!< Data buffer address */ 361 } dataBitField; 362 } dataUnion; 363 union 364 { 365 uint32_t state; 366 struct 367 { 368 volatile uint32_t NrBytesToTransfer : 15U; /*!< Number of Bytes Transferred. */ 369 volatile uint32_t 370 Token : 2U; /*!< Token: Identifies the token Packet Identifier (PID) for this transaction. */ 371 volatile uint32_t EpType : 2U; /*!< Endpoint type */ 372 volatile uint32_t NakCnt : 4U; /*!< Nak count */ 373 volatile uint32_t Cerr : 2U; /*!< Error count */ 374 volatile uint32_t DT : 1U; /*!< Data Toggle */ 375 volatile uint32_t P : 1U; /*!< Ping */ 376 volatile uint32_t SC : 1U; /*!< Start/Complete */ 377 volatile uint32_t X : 1U; /*!< Error */ 378 volatile uint32_t B : 1U; /*!< Babble */ 379 volatile uint32_t H : 1U; /*!< Halt */ 380 volatile uint32_t A : 1U; /*!< Active */ 381 } dataBitField; 382 } stateUnion; 383 union 384 { 385 uint32_t status; 386 struct 387 { 388 volatile uint32_t uSA : 8U; /*!< This field is only used for periodic split transactions or if the port is 389 enabled in HS mode. */ 390 volatile uint32_t Status0 : 3U; /*!< Isochronous IN or OUT status at uSOF0 */ 391 volatile uint32_t Status1 : 3U; /*!< Isochronous IN or OUT status at uSOF1 */ 392 volatile uint32_t Status2 : 3U; /*!< Isochronous IN or OUT status at uSOF2 */ 393 volatile uint32_t Status3 : 3U; /*!< Isochronous IN or OUT status at uSOF3 */ 394 volatile uint32_t Status4 : 3U; /*!< Isochronous IN or OUT status at uSOF4 */ 395 volatile uint32_t Status5 : 3U; /*!< Isochronous IN or OUT status at uSOF5 */ 396 volatile uint32_t Status6 : 3U; /*!< Isochronous IN or OUT status at uSOF6 */ 397 volatile uint32_t Status7 : 3U; /*!< Isochronous IN or OUT status at uSOF7 */ 398 } statusBitField; 399 } statusUnion; 400 union 401 { 402 uint32_t isoIn; 403 struct 404 { 405 volatile uint32_t uSCS : 8U; /*!< All bits can be set to one for every transfer. It specifies which uSOF the 406 complete split needs to be sent. */ 407 volatile uint32_t isoIn0 : 8U; /*!< Data length */ 408 volatile uint32_t isoIn1 : 8U; /*!< Data length */ 409 volatile uint32_t isoIn2 : 8U; /*!< Data length */ 410 } bitField; 411 } isoInUnion1; 412 union 413 { 414 uint32_t isoIn; 415 struct 416 { 417 volatile uint32_t isoIn3 : 8U; /*!< Data length */ 418 volatile uint32_t isoIn4 : 8U; /*!< Data length */ 419 volatile uint32_t isoIn5 : 8U; /*!< Data length */ 420 volatile uint32_t isoIn6 : 8U; /*!< Data length */ 421 } bitField; 422 } isoInUnion2; 423 union 424 { 425 uint32_t isoIn; 426 struct 427 { 428 volatile uint32_t isoIn7 : 8U; /*!< Data length */ 429 volatile uint32_t R : 24U; /*!< Reserved */ 430 } bitField; 431 } isoInUnion3; 432 } usb_host_ip3516hs_sptl_struct_t; 433 434 #define USB_HOST_IP3516HS_PTD_TOKEN_OUT 0x00U 435 #define USB_HOST_IP3516HS_PTD_TOKEN_IN 0x01U 436 #define USB_HOST_IP3516HS_PTD_TOKEN_SETUP 0x02U 437 438 #define USB_HOST_IP3516HS_PTD_EPTYPE_OUT 0x00U 439 #define USB_HOST_IP3516HS_PTD_EPTYPE_IN 0x01U 440 #define USB_HOST_IP3516HS_PTD_EPTYPE_SETUP 0x02U 441 442 #define USB_HOST_IP3516HS_PTD_MAX_TRANSFER_LENGTH 0x7FFFU 443 444 #define USB_HOST_IP3516HS_MAX_UFRAME (1UL << 8) 445 #define USB_HOST_IP3516HS_MAX_FRAME (USB_HOST_IP3516HS_MAX_UFRAME) 446 447 #define USB_HOST_IP3516HS_PERIODIC_TRANSFER_GAP (3U) 448 #define USB_HOST_IP3516HS_ISO_MULTIPLE_TRANSFER (8U) 449 450 /*! @brief Check the port connect state delay if the state is unstable */ 451 #define USB_HOST_IP3516HS_PORT_CONNECT_DEBOUNCE_DELAY (101U) 452 453 #define USB_HOST_IP3516HS_TIME_DELAY (3500U) 454 #define USB_HOST_IP3516HS_HUB_LS_SETUP_TIME_DELAY (333U) 455 456 #if ((defined(USB_HOST_CONFIG_LOW_POWER_MODE)) && (USB_HOST_CONFIG_LOW_POWER_MODE > 0U)) 457 typedef enum _bus_ip3516hs_suspend_request_state 458 { 459 kBus_Ip3516HsIdle = 0, 460 kBus_Ip3516HsStartSuspend, 461 kBus_Ip3516HsSuspended, 462 kBus_Ip3516HsStartResume, 463 kBus_Ip3516HsL1StartSleep, 464 kBus_Ip3516HsL1Sleeped, 465 kBus_Ip3516HsL1StartResume, 466 kBus_Ip3516HsError, 467 } bus_ip3516hs_suspend_request_state_t; 468 #endif 469 470 typedef enum _usb_host_ip3516hs_transfer_status 471 { 472 kStatus_UsbHostIp3516Hs_Idle = 0, 473 kStatus_UsbHostIp3516Hs_Setup, 474 kStatus_UsbHostIp3516Hs_Data, 475 kStatus_UsbHostIp3516Hs_Data2, 476 kStatus_UsbHostIp3516Hs_State, 477 } usb_host_ip3516hs_transfer_status_t; 478 #if ((defined(USB_HOST_CONFIG_IP3516HS_MAX_ISO)) && (USB_HOST_CONFIG_IP3516HS_MAX_ISO > 0U)) 479 typedef union index_length 480 { 481 uint32_t indexLength; 482 struct 483 { 484 uint32_t tdIndex : 8U; 485 uint32_t bufferIndex : 8U; 486 uint32_t bufferLength : 16U; 487 } state; 488 } indexLength_t; 489 #endif 490 typedef struct _usb_host_ip3516hs_td_struct 491 { 492 #if (defined(USB_HOST_CONFIG_IP3516HS_MAX_ISO) && (USB_HOST_CONFIG_IP3516HS_MAX_ISO > 0U)) 493 usb_host_ip3516hs_ptl_struct_t iso[USB_HOST_CONFIG_IP3516HS_MAX_ISO]; 494 #endif 495 #if (defined(USB_HOST_CONFIG_IP3516HS_MAX_INT) && (USB_HOST_CONFIG_IP3516HS_MAX_INT > 0U)) 496 usb_host_ip3516hs_ptl_struct_t interrupt[USB_HOST_CONFIG_IP3516HS_MAX_INT]; 497 #endif 498 usb_host_ip3516hs_atl_struct_t atl[(((USB_HOST_CONFIG_IP3516HS_MAX_ATL - 1U) >> 1U) + 1U) << 1U]; 499 } usb_host_ip3516hs_ptd_struct_t; 500 501 /*! @brief task event */ 502 #define USB_HOST_IP3516HS_EVENT_ATTACH (0x01U) 503 #define USB_HOST_IP3516HS_EVENT_DETACH (0x02U) 504 #define USB_HOST_IP3516HS_EVENT_PORT_CHANGE (0x04U) 505 #define USB_HOST_IP3516HS_EVENT_ISO_TOKEN_DONE (0x08U) 506 #define USB_HOST_IP3516HS_EVENT_INT_TOKEN_DONE (0x10U) 507 #define USB_HOST_IP3516HS_EVENT_ATL_TOKEN_DONE (0x20U) 508 #define USB_HOST_IP3516HS_EVENT_SOF (0x40U) 509 510 #define USB_HOST_IP3516HS_PERIODIC_BANDWIDTH_PERCENT ((float)90U / (float)100U) 511 #define USB_HOST_IP3516HS_PERIODIC_BANDWIDTH ((float)125U * USB_HOST_IP3516HS_PERIODIC_BANDWIDTH_PERCENT) 512 513 /*! @brief Transfer scan interval (ms)*/ 514 #define USB_HOST_IP3516HS_TRANSFER_SCAN_INTERVAL (200U) 515 /*! @brief Time out gap for each transfer (USB_HOST_OHCI_TRANSFER_SCAN_INTERVAL * 1ms) */ 516 #define USB_HOST_IP3516HS_TRANSFER_TIMEOUT_GAP ((5000U * 8U) / USB_HOST_IP3516HS_TRANSFER_SCAN_INTERVAL) 517 518 #define USB_HOST_IP3516HS_CONTROL_PIPE_MAX_TRANSFER_LENGTH 64U 519 520 /*! @brief USB host Ip3516Hs lock */ 521 #define USB_HostIp3516HsLock() (void)OSA_MutexLock(usbHostState->mutex, USB_OSA_WAIT_TIMEOUT) 522 /*! @brief USB host Ip3516Hs unlock */ 523 #define USB_HostIp3516HsUnlock() (void)OSA_MutexUnlock(usbHostState->mutex) 524 525 /*! @brief IP3516HS Host Controller Operational Registers */ 526 typedef struct _usb_host_ip3516hs_hcor_struct 527 { 528 __I uint32_t CAPLENGTH_CHIPID; 529 __I uint32_t HCSPARAMS; 530 __I uint32_t HCCPARAMS; 531 __IO uint32_t FLADJ_FRINDEX; 532 __IO uint32_t ATL_PTD_BASE_ADDRESS; 533 __IO uint32_t ISO_PTD_BASE_ADDRESS; 534 __IO uint32_t INT_PTD_BASE_ADDRESS; 535 __IO uint32_t DATA_PAYLOAD_BASE_ADDRESS; 536 __IO uint32_t USBCMD; 537 __IO uint32_t USBSTS; 538 __IO uint32_t USBINTR; 539 __IO uint32_t PORTSC1; 540 __IO uint32_t ATL_PTD_DONE_MAP; 541 __IO uint32_t ATL_PTD_SKIP_MAP; 542 __IO uint32_t ISO_PTD_DONE_MAP; 543 __IO uint32_t ISO_PTD_SKIP_MAP; 544 __IO uint32_t INT_PTD_DONE_MAP; 545 __IO uint32_t INT_PTD_SKIP_MAP; 546 __IO uint32_t LAST_PTD_IN_USE; 547 __IO uint32_t UTMI_ULPI_DEBUG; 548 __IO uint32_t PORT_MODE; 549 uint8_t RESERVED_0[48]; 550 #if (defined(FSL_FEATURE_USBHSH_HAS_TURNAROUND_TIMEOUT) && (FSL_FEATURE_USBHSH_HAS_TURNAROUND_TIMEOUT > 0U)) 551 __IO uint32_t PACKET_TURNAROUND_TIMEOUT; 552 #endif 553 } usb_host_ip3516hs_register_struct_t; 554 555 /*! @brief Port state for device attachment/detachment. */ 556 typedef enum _usb_host_ip3516hs_port_state 557 { 558 kUSB_DeviceIp3516HsPortDetached = 0U, /*!< Port is detached and de-initialized */ 559 kUSB_DeviceIp3516HsPortPhyDetached, /*!< Port is physically detached */ 560 kUSB_DeviceIp3516HsPortPhyAttached, /*!< Port is physically attached */ 561 kUSB_DeviceIp3516HsPortAttached, /*!< Port is attached and initialized */ 562 } usb_host_ip3516hs_port_state_t; 563 564 typedef struct _usb_host_ip3516hs_port_state_struct 565 { 566 volatile uint8_t portSpeed; /*!< Port speed */ 567 volatile uint8_t portStatus; /*!< Port status */ 568 } usb_host_ip3516hs_port_state_struct_t; 569 570 typedef struct _usb_host_ip3516hs_pipe_struct 571 { 572 usb_host_pipe_t pipeCommon; /*!< Common pipe information */ 573 usb_host_transfer_t *trList; 574 volatile usb_host_transfer_t *currentTr; 575 uint32_t bufferIndex; 576 uint32_t bufferLength; 577 uint16_t cutOffTime; 578 uint16_t busHsTime; 579 uint16_t busNoneHsTime; 580 uint16_t startUFrame; 581 uint16_t lastPrimedIndex; 582 uint8_t ssSlot; 583 uint8_t csSlot; 584 uint8_t tdIndex; 585 volatile uint8_t isBusy; 586 } usb_host_ip3516hs_pipe_struct_t; 587 588 /*! @brief IP3516HS controller driver instance structure */ 589 typedef struct _usb_host_ip3516hs_state_struct 590 { 591 volatile usb_host_ip3516hs_register_struct_t *usbRegBase; /*!< The base address of the register */ 592 void *hostHandle; /*!< Related host handle*/ 593 #if (defined(USB_HOST_CONFIG_BATTERY_CHARGER) && (USB_HOST_CONFIG_BATTERY_CHARGER > 0U)) && \ 594 (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U)) 595 void *dcdHandle; /*!< Dcd handle used to identify the device object belongs to */ 596 #endif 597 usb_host_ip3516hs_port_state_struct_t *portState; 598 usb_host_ip3516hs_pipe_struct_t *pipeList; 599 usb_host_ip3516hs_pipe_struct_t *pipeListInUsing; 600 volatile uint32_t bufferArrayBitMap[4]; /*!< Bit map for USB dedicated RAM (Uint is 64bytes) */ 601 #if ((defined(USB_HOST_CONFIG_LOW_POWER_MODE)) && (USB_HOST_CONFIG_LOW_POWER_MODE > 0U)) 602 uint64_t matchTick; 603 #endif 604 osa_event_handle_t ip3516HsEvent; /*!< IP3516HS event*/ 605 uint32_t taskEventHandleBuffer[(OSA_EVENT_HANDLE_SIZE + 3) / 4]; /*!< task event handle buffer*/ 606 osa_mutex_handle_t mutex; /*!< Ip3516Hs layer mutex*/ 607 uint32_t mutexBuffer[(OSA_MUTEX_HANDLE_SIZE + 3) / 4]; 608 usb_host_ip3516hs_pipe_struct_t pipePool[USB_HOST_CONFIG_IP3516HS_MAX_PIPE]; 609 uint8_t controllerId; /*!< Controller id */ 610 uint8_t portNumber; /*!< Port count */ 611 uint8_t isrNumber; /*!< ISR Number */ 612 volatile uint8_t isrLevel; /*!< The disable deep of the ISR */ 613 #if ((defined USB_HOST_CONFIG_COMPLIANCE_TEST) && (USB_HOST_CONFIG_COMPLIANCE_TEST)) 614 uint8_t complianceTestStart; 615 uint8_t complianceTest; 616 #endif 617 #if ((defined(USB_HOST_CONFIG_LOW_POWER_MODE)) && (USB_HOST_CONFIG_LOW_POWER_MODE > 0U)) 618 #if ((defined(USB_HOST_CONFIG_LPM_L1)) && (USB_HOST_CONFIG_LPM_L1 > 0U)) 619 uint8_t hirdValue; 620 uint8_t L1remoteWakeupEnable; 621 #endif 622 uint8_t busSuspendStatus; /*!< Bus Suspend Status*/ 623 #endif 624 #if (defined(USB_HOST_CONFIG_BATTERY_CHARGER) && (USB_HOST_CONFIG_BATTERY_CHARGER > 0U)) && \ 625 (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U)) 626 uint8_t chargerType; 627 #endif 628 } usb_host_ip3516hs_state_struct_t; 629 630 /******************************************************************************* 631 * API 632 ******************************************************************************/ 633 634 #ifdef __cplusplus 635 extern "C" { 636 #endif 637 /*! 638 * @name USB host IP3516HS APIs 639 * @{ 640 */ 641 642 /*! 643 * @brief Creates the USB host IP3516HS instance. 644 * 645 * This function initializes the USB host IP3516HS controller driver. 646 * 647 * @param controllerId The controller ID of the USB IP. See the enumeration usb_controller_index_t. 648 * @param hostHandle The host level handle. 649 * @param controllerHandle Returns the controller instance handle. 650 * 651 * @retval kStatus_USB_Success The host is initialized successfully. 652 * @retval kStatus_USB_AllocFail Allocates memory failed. 653 * @retval kStatus_USB_Error Host mutex create failed, IP3516HS mutex or IP3516HS event create failed. 654 * Or, IP3516HS IP initialize failed. 655 */ 656 extern usb_status_t USB_HostIp3516HsCreate(uint8_t controllerId, 657 usb_host_handle hostHandle, 658 usb_host_controller_handle *controllerHandle); 659 660 /*! 661 * @brief Destroys the USB host IP3516HS instance. 662 * 663 * This function deinitializes the USB host IP3516HS controller driver. 664 * 665 * @param controllerHandle The controller handle. 666 * 667 * @retval kStatus_USB_Success The host is initialized successfully. 668 */ 669 extern usb_status_t USB_HostIp3516HsDestory(usb_host_controller_handle controllerHandle); 670 671 /*! 672 * @brief Opens the USB host pipe. 673 * 674 * This function opens a pipe according to the pipe_init_ptr parameter. 675 * 676 * @param controllerHandle The controller handle. 677 * @param pipeHandle The pipe handle pointer used to return the pipe handle. 678 * @param pipeInit It is used to initialize the pipe. 679 * 680 * @retval kStatus_USB_Success The host is initialized successfully. 681 * @retval kStatus_USB_Error There is no idle pipe. 682 * 683 */ 684 extern usb_status_t USB_HostIp3516HsOpenPipe(usb_host_controller_handle controllerHandle, 685 usb_host_pipe_handle *pipeHandle, 686 usb_host_pipe_init_t *pipeInit); 687 688 /*! 689 * @brief Closes the USB host pipe. 690 * 691 * This function closes a pipe and frees the related resources. 692 * 693 * @param controllerHandle The controller handle. 694 * @param pipeHandle The closing pipe handle. 695 * 696 * @retval kStatus_USB_Success The host is initialized successfully. 697 */ 698 extern usb_status_t USB_HostIp3516HsClosePipe(usb_host_controller_handle controllerHandle, 699 usb_host_pipe_handle pipeHandle); 700 701 /*! 702 * @brief Sends data to the pipe. 703 * 704 * This function requests to send the transfer to the specified pipe. 705 * 706 * @param controllerHandle The controller handle. 707 * @param pipeHandle The sending pipe handle. 708 * @param transfer The transfer information. 709 * 710 * @retval kStatus_USB_Success Send successful. 711 * @retval kStatus_USB_LackSwapBuffer There is no swap buffer for IP3516HS. 712 */ 713 extern usb_status_t USB_HostIp3516HsWritePipe(usb_host_controller_handle controllerHandle, 714 usb_host_pipe_handle pipeHandle, 715 usb_host_transfer_t *transfer); 716 717 /*! 718 * @brief Receives data from the pipe. 719 * 720 * This function requests to receive the transfer from the specified pipe. 721 * 722 * @param controllerHandle The controller handle. 723 * @param pipeHandle The receiving pipe handle. 724 * @param transfer The transfer information. 725 * 726 * @retval kStatus_USB_Success Receive successful. 727 * @retval kStatus_USB_LackSwapBuffer There is no swap buffer for IP3516HS. 728 */ 729 extern usb_status_t USB_HostIp3516HsReadPipe(usb_host_controller_handle controllerHandle, 730 usb_host_pipe_handle pipeHandle, 731 usb_host_transfer_t *transfer); 732 733 /*! 734 * @brief Controls the IP3516HS. 735 * 736 * This function controls the IP3516HS. 737 * 738 * @param controllerHandle The controller handle. 739 * @param ioctlEvent See the enumeration host_bus_control_t. 740 * @param ioctlParam The control parameter. 741 * 742 * @retval kStatus_USB_Success Cancel successful. 743 * @retval kStatus_USB_InvalidHandle The controllerHandle is a NULL pointer. 744 */ 745 extern usb_status_t USB_HostIp3516HsIoctl(usb_host_controller_handle controllerHandle, 746 uint32_t ioctlEvent, 747 void *ioctlParam); 748 749 /*! @}*/ 750 #ifdef __cplusplus 751 } 752 #endif 753 /*! @}*/ 754 #endif /* __USB_HOST_IP3516HS_H__ */ 755
