1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2019, 2021, 2023 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include "fsl_slcd.h"
10
11 /*******************************************************************************
12 * Definitions
13 ******************************************************************************/
14
15 /* Component ID definition, used by tools. */
16 #ifndef FSL_COMPONENT_ID
17 #define FSL_COMPONENT_ID "platform.drivers.slcd"
18 #endif
19
20 #define SLCD_WAVEFORM_CONFIG_NUM 16U
21
22 /*******************************************************************************
23 * Prototypes
24 ******************************************************************************/
25
26 /*!
27 * @brief Get the SLCD instance from peripheral base address.
28 *
29 * @param base SLCD peripheral base address.
30 * @return SLCD instance.
31 */
32 static uint32_t SLCD_GetInstance(LCD_Type *base);
33
34 /*******************************************************************************
35 * Variables
36 ******************************************************************************/
37
38 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
39 /*! @brief Pointers to slcd clocks for each instance. */
40 static const clock_ip_name_t s_slcdClock[FSL_FEATURE_SOC_SLCD_COUNT] = SLCD_CLOCKS;
41 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
42
43 /*! @brief Pointers to slcd bases for each instance. */
44 static LCD_Type *const s_slcdBases[] = LCD_BASE_PTRS;
45
46 /*******************************************************************************
47 * Code
48 ******************************************************************************/
49
SLCD_GetInstance(LCD_Type * base)50 static uint32_t SLCD_GetInstance(LCD_Type *base)
51 {
52 uint32_t instance;
53
54 /* Find the instance index from base address mappings. */
55 for (instance = 0; instance < ARRAY_SIZE(s_slcdBases); instance++)
56 {
57 if (s_slcdBases[instance] == base)
58 {
59 break;
60 }
61 }
62
63 assert(instance < ARRAY_SIZE(s_slcdBases));
64
65 return instance;
66 }
67
68 /*!
69 * brief Initializes the SLCD, ungates the module clock, initializes the power
70 * setting, enables all used plane pins, and sets with interrupt and work mode
71 * with the configuration.
72 *
73 * param base SLCD peripheral base address.
74 * param configure SLCD configuration pointer.
75 * For the configuration structure, many parameters have the default setting
76 * and the SLCD_Getdefaultconfig() is provided to get them. Use it
77 * verified for their applications.
78 * The others have no default settings, such as "clkConfig", and must be provided
79 * by the application before calling the SLCD_Init() API.
80 */
SLCD_Init(LCD_Type * base,slcd_config_t * configure)81 void SLCD_Init(LCD_Type *base, slcd_config_t *configure)
82 {
83 assert(configure);
84 assert(configure->clkConfig);
85
86 uint32_t gcrReg = 0;
87 bool intEnabled = false;
88 uint32_t regNum = 0;
89 uint32_t instance = SLCD_GetInstance(base);
90
91 /* Bit mask of the LCD_GCR to modify in this function. */
92 uint32_t gcrMsk = 0;
93
94 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
95 /* Un-gate the SLCD clock. */
96 CLOCK_EnableClock(s_slcdClock[instance]);
97 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
98
99 /* Configure general setting: power supply. */
100 gcrReg = LCD_GCR_RVEN((uint32_t)configure->powerSupply & 0x1U) |
101 LCD_GCR_CPSEL(((uint32_t)configure->powerSupply >> 1U) & 0x1U) |
102 LCD_GCR_VSUPPLY(((uint32_t)configure->powerSupply >> 2U) & 0x1U) |
103 LCD_GCR_LADJ((uint32_t)configure->loadAdjust);
104 /* Configure general setting: clock source. */
105 gcrReg |= LCD_GCR_SOURCE(((uint32_t)configure->clkConfig->clkSource) & 0x1U) |
106 LCD_GCR_LCLK(configure->clkConfig->clkPrescaler) | LCD_GCR_ALTDIV(configure->clkConfig->altClkDivider);
107 /* Configure the duty and set the work for low power wait and stop mode. */
108 gcrReg |= LCD_GCR_DUTY(configure->dutyCycle) | LCD_GCR_LCDSTP((uint32_t)configure->lowPowerBehavior & 0x1U);
109
110 gcrMsk = LCD_GCR_RVEN_MASK | LCD_GCR_CPSEL_MASK | LCD_GCR_VSUPPLY_MASK | LCD_GCR_LADJ_MASK | LCD_GCR_SOURCE_MASK |
111 LCD_GCR_LCLK_MASK | LCD_GCR_ALTDIV_MASK | LCD_GCR_DUTY_MASK | LCD_GCR_LCDSTP_MASK;
112
113 #if FSL_FEATURE_SLCD_HAS_LCD_WAIT
114 gcrReg |= LCD_GCR_LCDWAIT(((uint32_t)configure->lowPowerBehavior >> 1U) & 0x1U);
115 gcrMsk |= LCD_GCR_LCDWAIT_MASK;
116 #endif
117 #if FSL_FEATURE_SLCD_HAS_LCD_DOZE_ENABLE
118 gcrReg |= LCD_GCR_LCDDOZE(((uint32_t)configure->lowPowerBehavior >> 1U) & 0x1U);
119 gcrMsk |= LCD_GCR_LCDDOZE_MASK;
120 #endif
121 #if FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT
122 /* Configure for frame frequency interrupt. */
123 gcrReg |= LCD_GCR_LCDIEN(configure->frameFreqIntEnable);
124 gcrMsk |= LCD_GCR_LCDIEN_MASK;
125 #endif /* FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT */
126 #if FSL_FEATURE_SLCD_HAS_MULTI_ALTERNATE_CLOCK_SOURCE
127 /* Select the alternate clock for alternate clock source. */
128 gcrReg |= LCD_GCR_ALTSOURCE((((uint32_t)configure->clkConfig->clkSource) >> 1U) & 0x1U);
129 gcrMsk |= LCD_GCR_ALTSOURCE_MASK;
130 #endif /* FSL_FEATURE_SLCD_HAS_MULTI_ALTERNATE_CLOCK_SOURCE */
131 #if FSL_FEATURE_SLCD_HAS_FAST_FRAME_RATE
132 /* Configure the for fast frame rate. */
133 gcrReg |= LCD_GCR_FFR(configure->clkConfig->fastFrameRateEnable ? 1U : 0U);
134 gcrMsk |= LCD_GCR_FFR_MASK;
135 #endif /* FSL_FEATURE_SLCD_HAS_FAST_FRAME_RATE */
136
137 gcrReg |= LCD_GCR_RVTRIM(configure->voltageTrim);
138 gcrMsk |= LCD_GCR_RVTRIM_MASK;
139
140 base->GCR = (base->GCR & ~gcrMsk) | gcrReg;
141
142 /* Set display mode. */
143 base->AR = LCD_AR_ALT((uint32_t)configure->displayMode & 0x1U) |
144 LCD_AR_BLANK(((uint32_t)configure->displayMode >> 1U) & 0x1U);
145
146 /* Configure the front plane and back plane pin setting. */
147 base->BPEN[0] = configure->backPlaneLowPin;
148 base->BPEN[1] = configure->backPlaneHighPin;
149 base->PEN[0] = configure->slcdLowPinEnabled;
150 base->PEN[1] = configure->slcdHighPinEnabled;
151
152 /* Set the fault frame detection. */
153 base->FDCR = 0;
154 if (NULL != configure->faultConfig)
155 {
156 /* If fault configure structure is not NULL, the fault detection is enabled. */
157 base->FDCR = LCD_FDCR_FDPRS(configure->faultConfig->faultPrescaler) |
158 LCD_FDCR_FDSWW(configure->faultConfig->width) |
159 LCD_FDCR_FDBPEN(configure->faultConfig->faultDetectBackPlaneEnable ? 1U : 0U) |
160 LCD_FDCR_FDPINID(configure->faultConfig->faultDetectPinIndex) | LCD_FDCR_FDEN_MASK;
161 if (configure->faultConfig->faultDetectIntEnable)
162 {
163 base->GCR |= LCD_GCR_FDCIEN_MASK;
164 intEnabled = true;
165 }
166 }
167
168 /* Initialize the Waveform. */
169 for (regNum = 0; regNum < SLCD_WAVEFORM_CONFIG_NUM; regNum++)
170 {
171 base->WF[regNum] = 0;
172 }
173
174 /* Enable the NVIC. */
175 #if FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT
176 if (configure->frameFreqIntEnable)
177 {
178 intEnabled = true;
179 }
180 #endif /* FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT */
181 if (intEnabled)
182 {
183 (void)EnableIRQ(LCD_IRQn);
184 }
185 }
186
187 /*!
188 * brief Deinitializes the SLCD module, gates the module clock, disables an interrupt,
189 * and displays the SLCD.
190 *
191 * param base SLCD peripheral base address.
192 */
SLCD_Deinit(LCD_Type * base)193 void SLCD_Deinit(LCD_Type *base)
194 {
195 uint32_t instance = SLCD_GetInstance(base);
196
197 /* Stop SLCD display. */
198 SLCD_StopDisplay(base);
199
200 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
201 /* Gate the SLCD clock. */
202 CLOCK_DisableClock(s_slcdClock[instance]);
203 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
204
205 /* Disable NVIC. */
206 (void)DisableIRQ(LCD_IRQn);
207 }
208
209 /*!
210 * brief Gets the SLCD default configuration structure. The
211 * purpose of this API is to get default parameters of the configuration structure
212 * for the SLCD_Init(). Use these initialized parameters unchanged in SLCD_Init()
213 * or modify fields of the structure before the calling SLCD_Init().
214 * All default parameters of the configure structuration are listed.
215 * code
216 config.displayMode = kSLCD_NormalMode;
217 config.powerSupply = kSLCD_InternalVll3UseChargePump;
218 config.voltageTrim = kSLCD_RegulatedVolatgeTrim00;
219 config.lowPowerBehavior = kSLCD_EnabledInWaitStop;
220 config.interruptSrc = 0;
221 config.faultConfig = NULL;
222 config.frameFreqIntEnable = false;
223 endcode
224 * param configure The SLCD configuration structure pointer.
225 */
SLCD_GetDefaultConfig(slcd_config_t * configure)226 void SLCD_GetDefaultConfig(slcd_config_t *configure)
227 {
228 assert(configure);
229
230 /* Initializes the configure structure to zero. */
231 (void)memset(configure, 0, sizeof(*configure));
232
233 /* Get Default parameters for the configuration structure. */
234 /* SLCD in normal mode. */
235 configure->displayMode = kSLCD_NormalMode;
236 /* Power supply default: use charge pump to generate VLL1 and VLL2, VLL3 connected to VDD internally. */
237 configure->powerSupply = kSLCD_InternalVll3UseChargePump;
238 configure->voltageTrim = kSLCD_RegulatedVolatgeTrim08;
239 /* Work in low power mode. */
240 configure->lowPowerBehavior = kSLCD_EnabledInWaitStop;
241 #if FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT
242 /* No interrupt source is enabled. */
243 configure->frameFreqIntEnable = false;
244 #endif /* FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT */
245 /* Fault detection is disabled. */
246 configure->faultConfig = NULL;
247 }
248
249 /*!
250 * brief Starts the SLCD blink mode.
251 *
252 * param base SLCD peripheral base address.
253 * param mode SLCD blink mode.
254 * param rate SLCD blink rate.
255 */
SLCD_StartBlinkMode(LCD_Type * base,slcd_blink_mode_t mode,slcd_blink_rate_t rate)256 void SLCD_StartBlinkMode(LCD_Type *base, slcd_blink_mode_t mode, slcd_blink_rate_t rate)
257 {
258 uint32_t mask = LCD_AR_BMODE_MASK | LCD_AR_BRATE_MASK;
259 uint32_t arReg = base->AR;
260
261 #if FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT
262 mask |= LCD_AR_LCDIF_MASK;
263 #endif /* FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT */
264
265 arReg &= ~mask;
266 /* Set blink mode and blink rate. */
267 arReg |= LCD_AR_BMODE(mode) | LCD_AR_BRATE(rate);
268 base->AR = arReg;
269
270 /* Enable Blink after setting the blink rate to meet some hardware requirement. */
271 arReg |= LCD_AR_BLINK_MASK;
272 base->AR = arReg;
273 }
274
275 /*!
276 * brief Enables the SLCD interrupt.
277 * For example, to enable fault detect complete interrupt and frame frequency interrupt,
278 * for FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT enabled case, do the following.
279 * code
280 * SLCD_EnableInterrupts(LCD,kSLCD_FaultDetectCompleteInterrupt | kSLCD_FrameFreqInterrupt);
281 * endcode
282 *
283 * param base SLCD peripheral base address.
284 * param mask SLCD interrupts to enable. This is a logical OR of the
285 * enumeration :: slcd_interrupt_enable_t.
286 */
SLCD_EnableInterrupts(LCD_Type * base,uint32_t mask)287 void SLCD_EnableInterrupts(LCD_Type *base, uint32_t mask)
288 {
289 uint32_t gcReg = base->GCR;
290
291 gcReg |= LCD_GCR_FDCIEN(mask & 0x1U);
292 #if FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT
293 gcReg |= LCD_GCR_LCDIEN((mask >> 1U) & 0x1U);
294 #endif /* FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT */
295
296 base->GCR = gcReg;
297 }
298
299 /*!
300 * brief Disables the SLCD interrupt.
301 * For example, to disable fault detect complete interrupt and frame frequency interrupt,
302 * for FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT enabled case, do the following.
303 * code
304 * SLCD_DisableInterrupts(LCD,kSLCD_FaultDetectCompleteInterrupt | kSLCD_FrameFreqInterrupt);
305 * endcode
306 *
307 * param base SLCD peripheral base address.
308 * param mask SLCD interrupts to disable. This is a logical OR of the
309 * enumeration :: slcd_interrupt_enable_t.
310 */
SLCD_DisableInterrupts(LCD_Type * base,uint32_t mask)311 void SLCD_DisableInterrupts(LCD_Type *base, uint32_t mask)
312 {
313 uint32_t gcrReg = base->GCR;
314
315 /*!< SLCD fault detection complete interrupt source. */
316 if (0U != (mask & (uint32_t)kSLCD_FaultDetectCompleteInterrupt))
317 {
318 gcrReg &= ~LCD_GCR_FDCIEN_MASK;
319 }
320 /*!< SLCD frame frequency interrupt source. */
321 #if FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT
322 if (0U != (mask & (uint32_t)kSLCD_FrameFreqInterrupt))
323 {
324 gcrReg &= ~LCD_GCR_LCDIEN_MASK;
325 }
326 #endif /* FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT */
327
328 base->GCR = gcrReg;
329 }
330
331 /*!
332 * brief Clears the SLCD interrupt events status flag.
333 *
334 * param base SLCD peripheral base address.
335 * param mask SLCD interrupt source to be cleared.
336 * This is the logical OR of members of the enumeration :: slcd_interrupt_enable_t.
337 */
SLCD_ClearInterruptStatus(LCD_Type * base,uint32_t mask)338 void SLCD_ClearInterruptStatus(LCD_Type *base, uint32_t mask)
339 {
340 /*!< SLCD fault detection complete interrupt source. */
341 if (0U != (mask & (uint32_t)kSLCD_FaultDetectCompleteInterrupt))
342 {
343 base->FDSR |= LCD_FDSR_FDCF_MASK;
344 }
345 /*!< SLCD frame frequency interrupt source. */
346 #if FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT
347 if (0U != (mask & (uint32_t)kSLCD_FrameFreqInterrupt))
348 {
349 base->AR |= LCD_AR_LCDIF_MASK;
350 }
351 #endif /* FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT */
352 }
353
354 /*!
355 * brief Gets the SLCD interrupt status flag.
356 *
357 * param base SLCD peripheral base address.
358 * return The event status of the interrupt source. This is the logical OR of members
359 * of the enumeration :: slcd_interrupt_enable_t.
360 */
SLCD_GetInterruptStatus(LCD_Type * base)361 uint32_t SLCD_GetInterruptStatus(LCD_Type *base)
362 {
363 uint32_t status = 0;
364
365 /* Get the frame detect complete interrupt status. */
366 status = ((base->FDSR & LCD_FDSR_FDCF_MASK) >> LCD_FDSR_FDCF_SHIFT);
367
368 #if FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT
369 /* Get the frame frequency interrupt status. */
370 status |= ((base->AR & LCD_AR_LCDIF_MASK) >> (LCD_AR_LCDIF_SHIFT - 1U));
371 #endif /* FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT */
372
373 return status;
374 }
375
