1 /*
2  * Copyright (c) 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016, NXP
4  * All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #include "fsl_common.h"
10 #include "fsl_reset.h"
11 
12 /*******************************************************************************
13  * Definitions
14  ******************************************************************************/
15 /* Component ID definition, used by tools. */
16 #ifndef FSL_COMPONENT_ID
17 #define FSL_COMPONENT_ID "platform.drivers.reset"
18 #endif
19 
20 /*******************************************************************************
21  * Variables
22  ******************************************************************************/
23 
24 /*******************************************************************************
25  * Prototypes
26  ******************************************************************************/
27 
28 /*******************************************************************************
29  * Code
30  ******************************************************************************/
31 
32 /*!
33  * brief Assert reset to peripheral.
34  *
35  * Asserts reset signal to specified peripheral module.
36  *
37  * param peripheral Assert reset to this peripheral. The enum argument contains encoding of reset register
38  *                   and reset bit position in the reset register.
39  */
RESET_SetPeripheralReset(reset_ip_name_t peripheral)40 void RESET_SetPeripheralReset(reset_ip_name_t peripheral)
41 {
42     const uint32_t regIndex = ((uint32_t)peripheral & 0x0000FF00u) >> 8;
43     const uint32_t bitPos   = ((uint32_t)peripheral & 0x000000FFu);
44     const uint32_t bitMask  = 1UL << bitPos;
45 
46     assert(bitPos < 32u);
47 
48     switch (regIndex)
49     {
50         case RST_CTL0_PSCCTL0:
51             RSTCTL0->PRSTCTL0_SET = bitMask;
52             while (0u == (RSTCTL0->PRSTCTL0 & bitMask))
53             {
54             }
55             break;
56         case RST_CTL0_PSCCTL1:
57             RSTCTL0->PRSTCTL1_SET = bitMask;
58             while (0u == (RSTCTL0->PRSTCTL1 & bitMask))
59             {
60             }
61             break;
62         case RST_CTL0_PSCCTL2:
63             RSTCTL0->PRSTCTL2_SET = bitMask;
64             while (0u == (RSTCTL0->PRSTCTL2 & bitMask))
65             {
66             }
67             break;
68         case RST_CTL1_PSCCTL0:
69             RSTCTL1->PRSTCTL0_SET = bitMask;
70             while (0u == (RSTCTL1->PRSTCTL0 & bitMask))
71             {
72             }
73             break;
74         case RST_CTL1_PSCCTL1:
75             RSTCTL1->PRSTCTL1_SET = bitMask;
76             while (0u == (RSTCTL1->PRSTCTL1 & bitMask))
77             {
78             }
79             break;
80         case RST_CTL1_PSCCTL2:
81             RSTCTL1->PRSTCTL2_SET = bitMask;
82             while (0u == (RSTCTL1->PRSTCTL2 & bitMask))
83             {
84             }
85             break;
86         default:
87             /* Added comments to prevent the violation of MISRA C-2012 rule. */
88             break;
89     }
90 }
91 
92 /*!
93  * brief Clear reset to peripheral.
94  *
95  * Clears reset signal to specified peripheral module, allows it to operate.
96  *
97  * param peripheral Clear reset to this peripheral. The enum argument contains encoding of reset register
98  *                   and reset bit position in the reset register.
99  */
RESET_ClearPeripheralReset(reset_ip_name_t peripheral)100 void RESET_ClearPeripheralReset(reset_ip_name_t peripheral)
101 {
102     const uint32_t regIndex = ((uint32_t)peripheral & 0x0000FF00u) >> 8;
103     const uint32_t bitPos   = ((uint32_t)peripheral & 0x000000FFu);
104     const uint32_t bitMask  = 1UL << bitPos;
105 
106     assert(bitPos < 32u);
107 
108     switch (regIndex)
109     {
110         case RST_CTL0_PSCCTL0:
111             RSTCTL0->PRSTCTL0_CLR = bitMask;
112             while (bitMask == (RSTCTL0->PRSTCTL0 & bitMask))
113             {
114             }
115             break;
116         case RST_CTL0_PSCCTL1:
117             RSTCTL0->PRSTCTL1_CLR = bitMask;
118             while (bitMask == (RSTCTL0->PRSTCTL1 & bitMask))
119             {
120             }
121             break;
122         case RST_CTL0_PSCCTL2:
123             RSTCTL0->PRSTCTL2_CLR = bitMask;
124             while (bitMask == (RSTCTL0->PRSTCTL2 & bitMask))
125             {
126             }
127             break;
128         case RST_CTL1_PSCCTL0:
129             RSTCTL1->PRSTCTL0_CLR = bitMask;
130             while (bitMask == (RSTCTL1->PRSTCTL0 & bitMask))
131             {
132             }
133             break;
134         case RST_CTL1_PSCCTL1:
135             RSTCTL1->PRSTCTL1_CLR = bitMask;
136             while (bitMask == (RSTCTL1->PRSTCTL1 & bitMask))
137             {
138             }
139             break;
140         case RST_CTL1_PSCCTL2:
141             RSTCTL1->PRSTCTL2_CLR = bitMask;
142             while (bitMask == (RSTCTL1->PRSTCTL2 & bitMask))
143             {
144             }
145             break;
146         default:
147             /* Added comments to prevent the violation of MISRA C-2012 rule. */
148             break;
149     }
150 }
151 
152 /*!
153  * brief Reset peripheral module.
154  *
155  * Reset peripheral module.
156  *
157  * param peripheral Peripheral to reset. The enum argument contains encoding of reset register
158  *                   and reset bit position in the reset register.
159  */
RESET_PeripheralReset(reset_ip_name_t peripheral)160 void RESET_PeripheralReset(reset_ip_name_t peripheral)
161 {
162     RESET_SetPeripheralReset(peripheral);
163     RESET_ClearPeripheralReset(peripheral);
164 }
165