1 /* 2 * Copyright 2017-2020 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef _FSL_ROMAPI_H_ 9 #define _FSL_ROMAPI_H_ 10 11 #include "fsl_common.h" 12 13 /*! 14 * @addtogroup romapi 15 * @{ 16 */ 17 18 /*! @brief ROMAPI version 1.1.0. */ 19 #define FSL_ROM_ROMAPI_VERSION (MAKE_VERSION(1U, 1U, 0U)) 20 /*! @brief ROM FLEXSPI NOR driver version 1.4.0. */ 21 #define FSL_ROM_FLEXSPINOR_DRIVER_VERSION (MAKE_VERSION(1U, 4U, 0U)) 22 23 /*! 24 * @name Common ROMAPI fearures info defines 25 * @{ 26 */ 27 /* @brief ROM has FLEXSPI NOR API. */ 28 #define FSL_ROM_HAS_FLEXSPINOR_API (1) 29 /* @brief ROM has run bootloader API. */ 30 #define FSL_ROM_HAS_RUNBOOTLOADER_API (0) 31 /* @brief ROM has FLEXSPI NOR get config API. */ 32 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG (0) 33 /* @brief ROM has flash init API. */ 34 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_FLASH_INIT (1) 35 /* @brief ROM has erase API. */ 36 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE (1) 37 /* @brief ROM has erase sector API. */ 38 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR (1) 39 /* @brief ROM has erase block API. */ 40 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK (1) 41 /* @brief ROM has erase all API. */ 42 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL (0) 43 /* @brief ROM has page program API. */ 44 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_PAGE_PROGRAM (1) 45 /* @brief ROM has update lut API. */ 46 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT (1) 47 /* @brief ROM has FLEXSPI command API. */ 48 #define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER (1) 49 50 /*@}*/ 51 52 #define kROM_StatusGroup_FLEXSPI 60U /*!< ROM FLEXSPI status group number.*/ 53 #define kROM_StatusGroup_FLEXSPINOR 200U /*!< ROM FLEXSPI NOR status group number.*/ 54 55 #define FSL_ROM_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \ 56 (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \ 57 FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) 58 59 /*! @brief Generate bit mask */ 60 #define FSL_ROM_FLEXSPI_BITMASK(bit_offset) (1U << (bit_offset)) 61 62 /*! @brief FLEXSPI memory config block related defintions */ 63 #define FLEXSPI_CFG_BLK_TAG (0x42464346UL) /*!< ascii "FCFB" Big Endian */ 64 #define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) /*!< V1.4.0 */ 65 66 #define CMD_SDR 0x01U 67 #define CMD_DDR 0x21U 68 #define RADDR_SDR 0x02U 69 #define RADDR_DDR 0x22U 70 #define CADDR_SDR 0x03U 71 #define CADDR_DDR 0x23U 72 #define MODE1_SDR 0x04U 73 #define MODE1_DDR 0x24U 74 #define MODE2_SDR 0x05U 75 #define MODE2_DDR 0x25U 76 #define MODE4_SDR 0x06U 77 #define MODE4_DDR 0x26U 78 #define MODE8_SDR 0x07U 79 #define MODE8_DDR 0x27U 80 #define WRITE_SDR 0x08U 81 #define WRITE_DDR 0x28U 82 #define READ_SDR 0x09U 83 #define READ_DDR 0x29U 84 #define LEARN_SDR 0x0AU 85 #define LEARN_DDR 0x2AU 86 #define DATSZ_SDR 0x0BU 87 #define DATSZ_DDR 0x2BU 88 #define DUMMY_SDR 0x0CU 89 #define DUMMY_DDR 0x2CU 90 #define DUMMY_RWDS_SDR 0x0DU 91 #define DUMMY_RWDS_DDR 0x2DU 92 #define JMP_ON_CS 0x1FU 93 #define STOP 0U 94 95 #define FLEXSPI_1PAD 0U 96 #define FLEXSPI_2PAD 1U 97 #define FLEXSPI_4PAD 2U 98 #define FLEXSPI_8PAD 3U 99 100 /*! 101 * NOR LUT sequence index used for default LUT assignment 102 * NOTE: 103 * The will take effect if the lut sequences are not customized. 104 */ 105 #define NOR_CMD_LUT_SEQ_IDX_READ 0U /*!< READ LUT sequence id in lookupTable stored in config block */ 106 #define NOR_CMD_LUT_SEQ_IDX_READSTATUS 1U /*!< Read Status LUT sequence id in lookupTable stored in config block */ 107 #define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \ 108 2U /*!< Read status DPI/QPI/OPI sequence id in lookupTable stored in config block */ 109 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 3U /*!< Write Enable sequence id in lookupTable stored in config block */ 110 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \ 111 4U /*!< Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block */ 112 #define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5U /*!< Erase Sector sequence id in lookupTable stored in config block */ 113 #define NOR_CMD_LUT_SEQ_IDX_READID 7U 114 #define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8U /*!< Erase Block sequence id in lookupTable stored in config block */ 115 #define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM 9U /*!< Program sequence id in lookupTable stored in config block */ 116 #define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11U /*!< Chip Erase sequence in lookupTable id stored in config block */ 117 #define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13U /*!< Read SFDP sequence in lookupTable id stored in config block */ 118 #define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \ 119 14U /*!< Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */ 120 #define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \ 121 15U /*!< Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk */ 122 123 /*! 124 * @name Support for init FLEXSPI NOR configuration 125 * @{ 126 */ 127 /*! @brief Flash Pad Definitions */ 128 enum 129 { 130 kSerialFlash_1Pad = 1U, 131 kSerialFlash_2Pads = 2U, 132 kSerialFlash_4Pads = 4U, 133 kSerialFlash_8Pads = 8U, 134 }; 135 136 /*! @brief FLEXSPI clock configuration type */ 137 enum 138 { 139 kFLEXSPIClk_SDR, /*!< Clock configure for SDR mode */ 140 kFLEXSPIClk_DDR, /*!< Clock configurat for DDR mode */ 141 }; 142 143 /*! @brief FLEXSPI Read Sample Clock Source definition */ 144 typedef enum _flexspi_read_sample_clk 145 { 146 kFLEXSPIReadSampleClk_LoopbackInternally = 0U, 147 kFLEXSPIReadSampleClk_LoopbackFromDqsPad = 1U, 148 kFLEXSPIReadSampleClk_LoopbackFromSckPad = 2U, 149 kFLEXSPIReadSampleClk_ExternalInputFromDqsPad = 3U, 150 } flexspi_read_sample_clk_t; 151 152 /*! @brief Flash Type Definition */ 153 enum 154 { 155 kFLEXSPIDeviceType_SerialNOR = 1U, /*!< Flash device is Serial NOR */ 156 }; 157 158 /*! @brief Flash Configuration Command Type */ 159 enum 160 { 161 kDeviceConfigCmdType_Generic, /*!< Generic command, for example: configure dummy cycles, drive strength, etc */ 162 kDeviceConfigCmdType_QuadEnable, /*!< Quad Enable command */ 163 kDeviceConfigCmdType_Spi2Xpi, /*!< Switch from SPI to DPI/QPI/OPI mode */ 164 kDeviceConfigCmdType_Xpi2Spi, /*!< Switch from DPI/QPI/OPI to SPI mode */ 165 kDeviceConfigCmdType_Spi2NoCmd, /*!< Switch to 0-4-4/0-8-8 mode */ 166 kDeviceConfigCmdType_Reset, /*!< Reset device command */ 167 }; 168 169 /*! @brief Defintions for FLEXSPI Serial Clock Frequency */ 170 typedef enum _flexspi_serial_clk_freq 171 { 172 kFLEXSPISerialClk_NoChange = 0U, 173 kFLEXSPISerialClk_30MHz = 1U, 174 kFLEXSPISerialClk_50MHz = 2U, 175 kFLEXSPISerialClk_60MHz = 3U, 176 kFLEXSPISerialClk_75MHz = 4U, 177 kFLEXSPISerialClk_80MHz = 5U, 178 kFLEXSPISerialClk_100MHz = 6U, 179 kFLEXSPISerialClk_133MHz = 7U, 180 kFLEXSPISerialClk_166MHz = 8U, 181 kFLEXSPISerialClk_200MHz = 9U, 182 } flexspi_serial_clk_freq_t; 183 184 /*! @brief Misc feature bit definitions */ 185 enum 186 { 187 kFLEXSPIMiscOffset_DiffClkEnable = 0U, /*!< Bit for Differential clock enable */ 188 kFLEXSPIMiscOffset_Ck2Enable = 1U, /*!< Bit for CK2 enable */ 189 kFLEXSPIMiscOffset_ParallelEnable = 2U, /*!< Bit for Parallel mode enable */ 190 kFLEXSPIMiscOffset_WordAddressableEnable = 3U, /*!< Bit for Word Addressable enable */ 191 kFLEXSPIMiscOffset_SafeConfigFreqEnable = 4U, /*!< Bit for Safe Configuration Frequency enable */ 192 kFLEXSPIMiscOffset_PadSettingOverrideEnable = 5U, /*!< Bit for Pad setting override enable */ 193 kFLEXSPIMiscOffset_DdrModeEnable = 6U, /*!< Bit for DDR clock confiuration indication. */ 194 kFLEXSPIMiscOffset_UseValidTimeForAllFreq = 7U, /*!< Bit for DLLCR settings under all modes */ 195 }; 196 197 /*@}*/ 198 199 /*! 200 * @name FLEXSPI NOR Configuration 201 * @{ 202 */ 203 204 /*! @brief FLEXSPI LUT Sequence structure */ 205 typedef struct _flexspi_lut_seq 206 { 207 uint8_t seqNum; /*!< Sequence Number, valid number: 1-16 */ 208 uint8_t seqId; /*!< Sequence Index, valid number: 0-15 */ 209 uint16_t reserved; 210 } flexspi_lut_seq_t; 211 212 typedef struct 213 { 214 uint8_t time_100ps; /*!< Data valid time, in terms of 100ps */ 215 uint8_t delay_cells; /*!< Data valid time, in terms of delay cells */ 216 } flexspi_dll_time_t; 217 218 /*! @brief FLEXSPI Memory Configuration Block */ 219 typedef struct _flexspi_mem_config 220 { 221 uint32_t tag; /*!< [0x000-0x003] Tag, fixed value 0x42464346UL */ 222 uint32_t version; /*!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix */ 223 uint32_t reserved0; /*!< [0x008-0x00b] Reserved for future use */ 224 uint8_t readSampleClkSrc; /*!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 */ 225 uint8_t csHoldTime; /*!< [0x00d-0x00d] Data hold time, default value: 3 */ 226 uint8_t csSetupTime; /*!< [0x00e-0x00e] Date setup time, default value: 3 */ 227 uint8_t columnAddressWidth; /*!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For 228 Serial NAND, need to refer to datasheet */ 229 uint8_t deviceModeCfgEnable; /*!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable */ 230 uint8_t deviceModeType; /*!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch, 231 Generic configuration, etc. */ 232 uint16_t waitTimeCfgCommands; /*!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for 233 DPI/QPI/OPI switch or reset command */ 234 flexspi_lut_seq_t deviceModeSeq; /*!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt 235 sequence number, [31:16] Reserved */ 236 uint32_t deviceModeArg; /*!< [0x018-0x01b] Argument/Parameter for device configuration */ 237 uint8_t configCmdEnable; /*!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable */ 238 uint8_t configModeType[3]; /*!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe */ 239 flexspi_lut_seq_t 240 configCmdSeqs[3]; /*!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq */ 241 uint32_t reserved1; /*!< [0x02c-0x02f] Reserved for future use */ 242 uint32_t configCmdArgs[3]; /*!< [0x030-0x03b] Arguments/Parameters for device Configuration commands */ 243 uint32_t reserved2; /*!< [0x03c-0x03f] Reserved for future use */ 244 uint32_t controllerMiscOption; /*!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more 245 details */ 246 uint8_t deviceType; /*!< [0x044-0x044] Device Type: See Flash Type Definition for more details */ 247 uint8_t sflashPadType; /*!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal */ 248 uint8_t serialClkFreq; /*!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot 249 Chapter for more details */ 250 uint8_t 251 lutCustomSeqEnable; /*!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot 252 be done using 1 LUT sequence, currently, only applicable to HyperFLASH */ 253 uint32_t reserved3[2]; /*!< [0x048-0x04f] Reserved for future use */ 254 uint32_t sflashA1Size; /*!< [0x050-0x053] Size of Flash connected to A1 */ 255 uint32_t sflashA2Size; /*!< [0x054-0x057] Size of Flash connected to A2 */ 256 uint32_t sflashB1Size; /*!< [0x058-0x05b] Size of Flash connected to B1 */ 257 uint32_t sflashB2Size; /*!< [0x05c-0x05f] Size of Flash connected to B2 */ 258 uint32_t csPadSettingOverride; /*!< [0x060-0x063] CS pad setting override value */ 259 uint32_t sclkPadSettingOverride; /*!< [0x064-0x067] SCK pad setting override value */ 260 uint32_t dataPadSettingOverride; /*!< [0x068-0x06b] data pad setting override value */ 261 uint32_t dqsPadSettingOverride; /*!< [0x06c-0x06f] DQS pad setting override value */ 262 uint32_t timeoutInMs; /*!< [0x070-0x073] Timeout threshold for read status command */ 263 uint32_t commandInterval; /*!< [0x074-0x077] CS deselect interval between two commands */ 264 flexspi_dll_time_t dataValidTime[2]; /*!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B */ 265 uint16_t busyOffset; /*!< [0x07c-0x07d] Busy offset, valid value: 0-31 */ 266 uint16_t busyBitPolarity; /*!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 - 267 busy flag is 0 when flash device is busy */ 268 uint32_t lookupTable[64]; /*!< [0x080-0x17f] Lookup table holds Flash command sequences */ 269 flexspi_lut_seq_t lutCustomSeq[12]; /*!< [0x180-0x1af] Customizable LUT Sequences */ 270 uint32_t reserved4[4]; /*!< [0x1b0-0x1bf] Reserved for future use */ 271 } flexspi_mem_config_t; 272 273 /*! @brief Serial NOR configuration block */ 274 typedef struct _flexspi_nor_config 275 { 276 flexspi_mem_config_t memConfig; /*!< Common memory configuration info via FLEXSPI */ 277 uint32_t pageSize; /*!< Page size of Serial NOR */ 278 uint32_t sectorSize; /*!< Sector size of Serial NOR */ 279 uint8_t ipcmdSerialClkFreq; /*!< Clock frequency for IP command */ 280 uint8_t isUniformBlockSize; /*!< Sector/Block size is the same */ 281 uint8_t isDataOrderSwapped; /*!< Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2) */ 282 uint8_t reserved0[1]; /*!< Reserved for future use */ 283 uint8_t serialNorType; /*!< Serial NOR Flash type: 0/1/2/3 */ 284 uint8_t needExitNoCmdMode; /*!< Need to exit NoCmd mode before other IP command */ 285 uint8_t halfClkForNonReadCmd; /*!< Half the Serial Clock for non-read command: true/false */ 286 uint8_t needRestoreNoCmdMode; /*!< Need to Restore NoCmd mode after IP commmand execution */ 287 uint32_t blockSize; /*!< Block size */ 288 uint32_t reserve2[11]; /*!< Reserved for future use */ 289 } flexspi_nor_config_t; 290 291 /*@}*/ 292 293 /*! @brief Manufacturer ID */ 294 enum 295 { 296 kSerialFlash_ISSI_ManufacturerID = 0x9DU, /*!< Manufacturer ID of the ISSI serial flash */ 297 kSerialFlash_Adesto_ManufacturerID = 0x1F, /*!< Manufacturer ID of the Adesto Technologies serial flash*/ 298 kSerialFlash_Winbond_ManufacturerID = 0xEFU, /*!< Manufacturer ID of the Winbond serial flash */ 299 kSerialFlash_Cypress_ManufacturerID = 0x01U, /*!< Manufacturer ID for Cypress */ 300 }; 301 302 /*! @brief ROM FLEXSPI NOR flash status */ 303 enum _flexspi_nor_status 304 { 305 kStatus_ROM_FLEXSPI_SequenceExecutionTimeout = 306 MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 0), /*!< Status for Sequence Execution timeout */ 307 kStatus_ROM_FLEXSPI_InvalidSequence = MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 1), /*!< Status for Invalid Sequence */ 308 kStatus_ROM_FLEXSPI_DeviceTimeout = MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 2), /*!< Status for Device timeout */ 309 kStatus_FLEXSPINOR_DTRRead_DummyProbeFailed = 310 MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 10), /*!< Status for DDR Read dummy probe failure */ 311 kStatus_ROM_FLEXSPINOR_SFDP_NotFound = 312 MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 7), /*!< Status for SFDP read failure */ 313 kStatus_ROM_FLEXSPINOR_Flash_NotFound = 314 MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 9), /*!< Status for Flash detection failure */ 315 }; 316 317 typedef enum _flexspi_operation 318 { 319 kFLEXSPIOperation_Command, /*!< FLEXSPI operation: Only command, both TX and RX buffer are ignored. */ 320 kFLEXSPIOperation_Config, /*!< FLEXSPI operation: Configure device mode, the TX FIFO size is fixed in LUT. */ 321 kFLEXSPIOperation_Write, /*!< FLEXSPI operation: Write, only TX buffer is effective */ 322 kFLEXSPIOperation_Read, /*!< FLEXSPI operation: Read, only Rx Buffer is effective. */ 323 kFLEXSPIOperation_End = kFLEXSPIOperation_Read, 324 } flexspi_operation_t; 325 326 /*! @brief FLEXSPI Transfer Context */ 327 typedef struct _flexspi_xfer 328 { 329 flexspi_operation_t operation; /*!< FLEXSPI operation */ 330 uint32_t baseAddress; /*!< FLEXSPI operation base address */ 331 uint32_t seqId; /*!< Sequence Id */ 332 uint32_t seqNum; /*!< Sequence Number */ 333 bool isParallelModeEnable; /*!< Is a parallel transfer */ 334 uint32_t *txBuffer; /*!< Tx buffer */ 335 uint32_t txSize; /*!< Tx size in bytes */ 336 uint32_t *rxBuffer; /*!< Rx buffer */ 337 uint32_t rxSize; /*!< Rx size in bytes */ 338 } flexspi_xfer_t; 339 340 #ifdef __cplusplus 341 extern "C" { 342 #endif 343 344 #if defined(FSL_FEATURE_BOOT_ROM_HAS_ROMAPI) && FSL_FEATURE_BOOT_ROM_HAS_ROMAPI 345 346 /*! 347 * @name Initialization 348 * @{ 349 */ 350 351 /*! 352 * @brief Initialize Serial NOR devices via FLEXSPI 353 * 354 * This function checks and initializes the FLEXSPI module for the other FLEXSPI APIs. 355 * 356 * @param instance storage the instance of FLEXSPI. 357 * @param config A pointer to the storage for the driver runtime state. 358 * 359 * @retval kStatus_Success Api was executed succesfuly. 360 * @retval kStatus_InvalidArgument A invalid argument is provided. 361 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 362 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 363 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 364 */ 365 status_t ROM_FLEXSPI_NorFlash_Init(uint32_t instance, flexspi_nor_config_t *config); 366 367 /*@}*/ 368 369 /*! 370 * @name Programming 371 * @{ 372 */ 373 /*! 374 * @brief Program data to Serial NOR via FLEXSPI. 375 * 376 * This function programs the NOR flash memory with the dest address for a given 377 * flash area as determined by the dst address and the length. 378 * 379 * @param instance storage the instance of FLEXSPI. 380 * @param config A pointer to the storage for the driver runtime state. 381 * @param dstAddr A pointer to the desired flash memory to be programmed. 382 * NOTE: 383 * It is recommended that use page aligned access; 384 * If the dstAddr is not aligned to page,the driver automatically 385 * aligns address down with the page address. 386 * @param src A pointer to the source buffer of data that is to be programmed 387 * into the NOR flash. 388 * 389 * @retval kStatus_Success Api was executed succesfuly. 390 * @retval kStatus_InvalidArgument A invalid argument is provided. 391 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 392 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 393 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 394 */ 395 status_t ROM_FLEXSPI_NorFlash_ProgramPage(uint32_t instance, 396 flexspi_nor_config_t *config, 397 uint32_t dstAddr, 398 const uint32_t *src); 399 400 /*@}*/ 401 402 /*! 403 * @name Erasing 404 * @{ 405 */ 406 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR 407 /*! 408 * @brief Erase one sector specified by address 409 * 410 * This function erases one of NOR flash sectors based on the desired address. 411 * 412 * @param instance storage the index of FLEXSPI. 413 * @param config A pointer to the storage for the driver runtime state. 414 * @param address The start address of the desired NOR flash memory to be erased. 415 * NOTE: 416 * It is recommended that use sector-aligned access nor device; 417 * If dstAddr is not aligned with the sector,The driver automatically 418 * aligns address down with the sector address. 419 * 420 * @retval kStatus_Success Api was executed succesfuly. 421 * @retval kStatus_InvalidArgument A invalid argument is provided. 422 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 423 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 424 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 425 */ 426 status_t ROM_FLEXSPI_NorFlash_EraseSector(uint32_t instance, flexspi_nor_config_t *config, uint32_t address); 427 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR */ 428 429 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK 430 /*! 431 * @brief Erase one block specified by address 432 * 433 * This function erases one block of NOR flash based on the desired address. 434 * 435 * @param instance storage the index of FLEXSPI. 436 * @param config A pointer to the storage for the driver runtime state. 437 * @param start The start address of the desired NOR flash memory to be erased. 438 * NOTE: 439 * It is recommended that use block-aligned access nor device; 440 * If dstAddr is not aligned with the block,The driver automatically 441 * aligns address down with the block address. 442 * 443 * @retval kStatus_Success Api was executed succesfuly. 444 * @retval kStatus_InvalidArgument A invalid argument is provided. 445 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 446 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 447 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 448 */ 449 status_t ROM_FLEXSPI_NorFlash_EraseBlock(uint32_t instance, flexspi_nor_config_t *config, uint32_t start); 450 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK */ 451 452 /*! 453 * @brief Erase Flash Region specified by address and length 454 * 455 * This function erases the appropriate number of flash sectors based on the 456 * desired start address and length. 457 * 458 * @param instance storage the index of FLEXSPI. 459 * @param config A pointer to the storage for the driver runtime state. 460 * @param start The start address of the desired NOR flash memory to be erased. 461 * NOTE: 462 * It is recommended that use sector-aligned access nor device; 463 * If dstAddr is not aligned with the sector,the driver automatically 464 * aligns address down with the sector address. 465 * @param length The length, given in bytes to be erased. 466 * NOTE: 467 * It is recommended that use sector-aligned access nor device; 468 * If length is not aligned with the sector,the driver automatically 469 * aligns up with the sector. 470 * @retval kStatus_Success Api was executed succesfuly. 471 * @retval kStatus_InvalidArgument A invalid argument is provided. 472 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 473 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 474 * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout 475 */ 476 status_t ROM_FLEXSPI_NorFlash_Erase(uint32_t instance, flexspi_nor_config_t *config, uint32_t start, uint32_t length); 477 478 /*@}*/ 479 480 /*! 481 * @name Command 482 * @{ 483 */ 484 485 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER 486 /*! 487 * @brief FLEXSPI command 488 * 489 * This function is used to perform the command write sequence to the NOR device. 490 * 491 * @param instance storage the index of FLEXSPI. 492 * @param xfer A pointer to the storage FLEXSPI Transfer Context. 493 * 494 * @retval kStatus_Success Api was executed succesfuly. 495 * @retval kStatus_InvalidArgument A invalid argument is provided. 496 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 497 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 498 */ 499 status_t ROM_FLEXSPI_NorFlash_CommandXfer(uint32_t instance, flexspi_xfer_t *xfer); 500 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER */ 501 /*@}*/ 502 503 /*! 504 * @name UpdateLut 505 * @{ 506 */ 507 #if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT 508 /*! 509 * @brief Configure FLEXSPI Lookup table 510 * 511 * @param instance storage the index of FLEXSPI. 512 * @param seqIndex storage the sequence Id. 513 * @param lutBase A pointer to the look-up-table for command sequences. 514 * @param seqNumber storage sequence number. 515 * 516 * @retval kStatus_Success Api was executed succesfuly. 517 * @retval kStatus_InvalidArgument A invalid argument is provided. 518 * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. 519 * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. 520 */ 521 status_t ROM_FLEXSPI_NorFlash_UpdateLut(uint32_t instance, 522 uint32_t seqIndex, 523 const uint32_t *lutBase, 524 uint32_t seqNumber); 525 #endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT */ 526 527 /*@}*/ 528 529 /*! 530 * @name ClearCache 531 * @{ 532 */ 533 534 /*! 535 * @brief Software reset for the FLEXSPI logic. 536 * 537 * This function sets the software reset flags for both AHB and buffer domain and 538 * resets both AHB buffer and also IP FIFOs. 539 * 540 * @param instance storage the index of FLEXSPI. 541 */ 542 void ROM_FLEXSPI_NorFlash_ClearCache(uint32_t instance); 543 544 /*@}*/ 545 546 #endif /* FSL_FEATURE_BOOT_ROM_HAS_ROMAPI */ 547 548 #ifdef __cplusplus 549 } 550 #endif 551 552 /*! @}*/ 553 554 #endif /* _FSL_ROMAPI_H_ */ 555
