1 /*
2 * Copyright 2018 -2021 NXP
3 * All rights reserved.
4 *
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include "fsl_common.h"
10 #include "fsl_lpspi.h"
11
12 #include "fsl_adapter_spi.h"
13 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U)) || \
14 (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
15
16 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
17 #include "fsl_lpspi_edma.h"
18 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
19 #include "fsl_lpspi_dma.h"
20 #endif
21 #if defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT
22 #include "fsl_dmamux.h"
23 #endif
24 #endif /* HAL_UART_DMA_ENABLE */
25 /*******************************************************************************
26 * Definitions
27 ******************************************************************************/
28 #if defined(__GIC_PRIO_BITS)
29 #ifndef HAL_SPI_ISR_PRIORITY
30 #define HAL_SPI_ISR_PRIORITY (25U)
31 #endif
32 #else
33 #if defined(configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY)
34 #ifndef HAL_SPI_ISR_PRIORITY
35 #define HAL_SPI_ISR_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY)
36 #endif
37 #else
38 /* The default value 3 is used to support different ARM Core, such as CM0P, CM4, CM7, and CM33, etc.
39 * The minimum number of priority bits implemented in the NVIC is 2 on these SOCs. The value of mininum
40 * priority is 3 (2^2 - 1). So, the default value is 3.
41 */
42 #ifndef HAL_SPI_ISR_PRIORITY
43 #define HAL_SPI_ISR_PRIORITY (3U)
44 #endif
45 #endif
46 #endif
47
48 /*! @brief hal_spi master state structure. */
49 typedef struct _hal_spi_master
50 {
51 hal_spi_master_transfer_callback_t callback;
52 void *callbackParam;
53 lpspi_master_handle_t hardwareHandle;
54 uint8_t instance;
55 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
56 hal_spi_master_dma_handle_t *dmaHandle;
57 #endif
58
59 } hal_spi_master_t;
60
61 /*! @brief hal_spi slave state structure. */
62 typedef struct _hal_spi_slave
63 {
64 hal_spi_slave_transfer_callback_t callback;
65 void *callbackParam;
66 lpspi_slave_handle_t hardwareHandle;
67 uint8_t instance;
68 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
69 hal_spi_slave_dma_handle_t *dmaHandle;
70 #endif
71 } hal_spi_slave_t;
72 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
73 typedef struct _hal_spi_slave_dma_state
74 {
75 uint8_t instance; /* spi instance */
76 hal_spi_slave_transfer_callback_t callback;
77 void *callbackParam;
78 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
79 lpspi_slave_edma_handle_t edmaHandle;
80 edma_handle_t txEdmaHandle;
81 edma_handle_t rxEdmaHandle;
82 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
83 lpspi_slave_dma_handle_t dmaHandle;
84 dma_handle_t txDmaHandle;
85 dma_handle_t rxDmaHandle;
86 #endif
87
88 } hal_spi_slave_dma_state_t;
89 #endif
90
91 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
92 typedef struct _hal_spi_master_dma_state
93 {
94 uint8_t instance; /* spi instance */
95 hal_spi_master_transfer_callback_t callback;
96 void *callbackParam;
97 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
98 lpspi_master_edma_handle_t edmaHandle;
99 edma_handle_t txEdmaHandle;
100 edma_handle_t rxEdmaHandle;
101
102 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
103 lpspi_master_dma_handle_t dmaHandle;
104 dma_handle_t txDmaHandle;
105 dma_handle_t rxDmaHandle;
106 #endif
107
108 } hal_spi_master_dma_state_t;
109 #endif
110 /*******************************************************************************
111 * Prototypes
112 ******************************************************************************/
113
114 /*******************************************************************************
115 * Variables
116 ******************************************************************************/
117
118 /*! @brief Base pointer array */
119 static LPSPI_Type *const s_spiBases[] = LPSPI_BASE_PTRS;
120
121 /*******************************************************************************
122 * Code
123 ******************************************************************************/
124
HAL_SpiGetStatus(status_t status)125 static hal_spi_status_t HAL_SpiGetStatus(status_t status)
126 {
127 hal_spi_status_t returnStatus;
128 switch (status)
129 {
130 case kStatus_Success:
131 {
132 returnStatus = kStatus_HAL_SpiSuccess;
133 break;
134 }
135 case kStatus_LPSPI_Busy:
136 {
137 returnStatus = kStatus_HAL_SpiBusy;
138 break;
139 }
140 case kStatus_LPSPI_Idle:
141 {
142 returnStatus = kStatus_HAL_SpiIdle;
143 break;
144 }
145 default:
146 {
147 returnStatus = kStatus_HAL_SpiError;
148 break;
149 }
150 }
151 return returnStatus;
152 }
153 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
HAL_SpiMasterDMACallback(LPSPI_Type * base,lpspi_master_edma_handle_t * handle,status_t status,void * callbackParam)154 static void HAL_SpiMasterDMACallback(LPSPI_Type *base,
155 lpspi_master_edma_handle_t *handle,
156 status_t status,
157 void *callbackParam)
158 {
159 hal_spi_master_t *spiMasterHandle;
160
161 assert(callbackParam);
162
163 spiMasterHandle = (hal_spi_master_t *)callbackParam;
164
165 if (NULL != spiMasterHandle->callback)
166 {
167 spiMasterHandle->callback(spiMasterHandle, HAL_SpiGetStatus(status), spiMasterHandle->callbackParam);
168 }
169 }
170 #else
171
HAL_SpiMasterCallback(LPSPI_Type * base,lpspi_master_handle_t * handle,status_t status,void * callbackParam)172 static void HAL_SpiMasterCallback(LPSPI_Type *base, lpspi_master_handle_t *handle, status_t status, void *callbackParam)
173 {
174 hal_spi_master_t *spiMasterHandle;
175
176 assert(callbackParam);
177
178 spiMasterHandle = (hal_spi_master_t *)callbackParam;
179
180 if (NULL != spiMasterHandle->callback)
181 {
182 spiMasterHandle->callback(spiMasterHandle, HAL_SpiGetStatus(status), spiMasterHandle->callbackParam);
183 }
184 }
185
186 #endif
187
188 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
HAL_SpiSlaveDMACallback(LPSPI_Type * base,lpspi_slave_edma_handle_t * handle,status_t status,void * callbackParam)189 static void HAL_SpiSlaveDMACallback(LPSPI_Type *base,
190 lpspi_slave_edma_handle_t *handle,
191 status_t status,
192 void *callbackParam)
193 {
194 hal_spi_master_t *spiSlaveHandle;
195
196 assert(callbackParam);
197
198 spiSlaveHandle = (hal_spi_master_t *)callbackParam;
199
200 if (NULL != spiSlaveHandle->callback)
201 {
202 spiSlaveHandle->callback(spiSlaveHandle, HAL_SpiGetStatus(status), spiSlaveHandle->callbackParam);
203 }
204 }
205 #else
HAL_SpiSlaveCallback(LPSPI_Type * base,lpspi_slave_handle_t * handle,status_t status,void * callbackParam)206 static void HAL_SpiSlaveCallback(LPSPI_Type *base, lpspi_slave_handle_t *handle, status_t status, void *callbackParam)
207 {
208 hal_spi_slave_t *spiSlaveHandle;
209
210 assert(callbackParam);
211
212 spiSlaveHandle = (hal_spi_slave_t *)callbackParam;
213
214 if (NULL != spiSlaveHandle->callback)
215 {
216 spiSlaveHandle->callback(spiSlaveHandle, HAL_SpiGetStatus(status), spiSlaveHandle->callbackParam);
217 }
218 }
219 #endif
HAL_SpiMasterInit(hal_spi_master_handle_t handle,const hal_spi_master_config_t * config)220 hal_spi_status_t HAL_SpiMasterInit(hal_spi_master_handle_t handle, const hal_spi_master_config_t *config)
221 {
222 hal_spi_master_t *masterHandle;
223 lpspi_master_config_t lpspiConfig;
224 assert(handle);
225 assert(config);
226
227 assert(HAL_SPI_MASTER_HANDLE_SIZE >= sizeof(hal_spi_master_t));
228
229 masterHandle = (hal_spi_master_t *)handle;
230
231 LPSPI_MasterGetDefaultConfig(&lpspiConfig);
232
233 lpspiConfig.cpol = (kHAL_SpiClockPolarityActiveHigh == config->polarity) ? kLPSPI_ClockPolarityActiveHigh :
234 kLPSPI_ClockPolarityActiveLow;
235 lpspiConfig.cpha =
236 (kHAL_SpiClockPhaseFirstEdge == config->phase) ? kLPSPI_ClockPhaseFirstEdge : kLPSPI_ClockPhaseSecondEdge;
237 lpspiConfig.direction = (kHAL_SpiMsbFirst == config->direction) ? kLPSPI_MsbFirst : kLPSPI_LsbFirst;
238 lpspiConfig.baudRate = config->baudRate_Bps;
239
240 masterHandle->instance = config->instance;
241
242 LPSPI_MasterInit((LPSPI_Type *)s_spiBases[masterHandle->instance], &lpspiConfig, config->srcClock_Hz);
243 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
244 masterHandle->dmaHandle = NULL;
245 #endif
246
247 return kStatus_HAL_SpiSuccess;
248 }
249
HAL_SpiSlaveInit(hal_spi_slave_handle_t handle,const hal_spi_slave_config_t * config)250 hal_spi_status_t HAL_SpiSlaveInit(hal_spi_slave_handle_t handle, const hal_spi_slave_config_t *config)
251 {
252 hal_spi_slave_t *slaveHandle;
253 lpspi_slave_config_t lpspiConfig;
254 assert(handle);
255 assert(config);
256
257 assert(HAL_SPI_SLAVE_HANDLE_SIZE >= sizeof(hal_spi_slave_t));
258
259 slaveHandle = (hal_spi_slave_t *)handle;
260
261 LPSPI_SlaveGetDefaultConfig(&lpspiConfig);
262
263 lpspiConfig.cpol = (kHAL_SpiClockPolarityActiveHigh == config->polarity) ? kLPSPI_ClockPolarityActiveHigh :
264 kLPSPI_ClockPolarityActiveLow;
265 lpspiConfig.cpha =
266 (kHAL_SpiClockPhaseFirstEdge == config->phase) ? kLPSPI_ClockPhaseFirstEdge : kLPSPI_ClockPhaseSecondEdge;
267
268 slaveHandle->instance = config->instance;
269
270 LPSPI_SlaveInit((LPSPI_Type *)s_spiBases[slaveHandle->instance], &lpspiConfig);
271 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
272 slaveHandle->dmaHandle = NULL;
273 #endif
274
275 return kStatus_HAL_SpiSuccess;
276 }
277
HAL_SpiMasterDeinit(hal_spi_master_handle_t handle)278 hal_spi_status_t HAL_SpiMasterDeinit(hal_spi_master_handle_t handle)
279 {
280 hal_spi_master_t *masterHandle;
281
282 assert(handle);
283
284 masterHandle = (hal_spi_master_t *)handle;
285 LPSPI_Deinit((LPSPI_Type *)s_spiBases[masterHandle->instance]);
286
287 return kStatus_HAL_SpiSuccess;
288 }
289
HAL_SpiSlaveDeinit(hal_spi_slave_handle_t handle)290 hal_spi_status_t HAL_SpiSlaveDeinit(hal_spi_slave_handle_t handle)
291 {
292 hal_spi_slave_t *slaveHandle;
293
294 assert(handle);
295
296 slaveHandle = (hal_spi_slave_t *)handle;
297
298 LPSPI_Deinit((LPSPI_Type *)s_spiBases[slaveHandle->instance]);
299
300 return kStatus_HAL_SpiSuccess;
301 }
302
HAL_SpiMasterTransferInstallCallback(hal_spi_master_handle_t handle,hal_spi_master_transfer_callback_t callback,void * callbackParam)303 hal_spi_status_t HAL_SpiMasterTransferInstallCallback(hal_spi_master_handle_t handle,
304 hal_spi_master_transfer_callback_t callback,
305 void *callbackParam)
306 {
307 hal_spi_master_t *masterHandle;
308 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
309 hal_spi_master_dma_state_t *spi_masterDmaHandle;
310 #endif
311 assert(handle);
312
313 masterHandle = (hal_spi_master_t *)handle;
314
315 masterHandle->callback = callback;
316 masterHandle->callbackParam = callbackParam;
317
318 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
319 spi_masterDmaHandle = (hal_spi_master_dma_state_t *)masterHandle->dmaHandle;
320 spi_masterDmaHandle->callback = callback;
321 spi_masterDmaHandle->callbackParam = callbackParam;
322 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
323
324 LPSPI_MasterTransferCreateHandleEDMA((LPSPI_Type *)s_spiBases[masterHandle->instance],
325 (lpspi_master_edma_handle_t *)&spi_masterDmaHandle->edmaHandle,
326 HAL_SpiMasterDMACallback, callbackParam, &spi_masterDmaHandle->rxEdmaHandle,
327 &spi_masterDmaHandle->txEdmaHandle);
328 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
329
330 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
331
332 #else
333 LPSPI_MasterTransferCreateHandle((LPSPI_Type *)s_spiBases[masterHandle->instance], &masterHandle->hardwareHandle,
334 HAL_SpiMasterCallback, masterHandle);
335 #endif
336
337 return kStatus_HAL_SpiSuccess;
338 }
339
HAL_SpiMasterTransferBlocking(hal_spi_master_handle_t handle,hal_spi_transfer_t * xfer)340 hal_spi_status_t HAL_SpiMasterTransferBlocking(hal_spi_master_handle_t handle, hal_spi_transfer_t *xfer)
341 {
342 hal_spi_master_t *masterHandle;
343 lpspi_transfer_t transfer;
344
345 assert(handle);
346 assert(xfer);
347
348 masterHandle = (hal_spi_master_t *)handle;
349
350 transfer.txData = xfer->txData;
351 transfer.rxData = xfer->rxData;
352 transfer.dataSize = xfer->dataSize;
353 transfer.configFlags = xfer->flags;
354 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
355 (void)masterHandle;
356 return kStatus_HAL_SpiError;
357 #else
358
359 return HAL_SpiGetStatus(LPSPI_MasterTransferBlocking((LPSPI_Type *)s_spiBases[masterHandle->instance], &transfer));
360 #endif
361 }
362
HAL_SpiMasterTransferNonBlocking(hal_spi_master_handle_t handle,hal_spi_transfer_t * xfer)363 hal_spi_status_t HAL_SpiMasterTransferNonBlocking(hal_spi_master_handle_t handle, hal_spi_transfer_t *xfer)
364
365 {
366 hal_spi_master_t *masterHandle;
367 lpspi_transfer_t transfer;
368 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
369 hal_spi_master_dma_state_t *spi_masterDmaHandle;
370 #endif
371 assert(handle);
372 assert(xfer);
373
374 masterHandle = (hal_spi_master_t *)handle;
375 transfer.txData = xfer->txData;
376 transfer.rxData = xfer->rxData;
377 transfer.dataSize = xfer->dataSize;
378 transfer.configFlags = xfer->flags;
379 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
380 spi_masterDmaHandle = (hal_spi_master_dma_state_t *)masterHandle->dmaHandle;
381 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
382 return HAL_SpiGetStatus(LPSPI_MasterTransferEDMA((LPSPI_Type *)s_spiBases[masterHandle->instance],
383 (lpspi_master_edma_handle_t *)&spi_masterDmaHandle->edmaHandle,
384 &transfer));
385 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
386
387 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
388
389 #else
390 return HAL_SpiGetStatus(LPSPI_MasterTransferNonBlocking((LPSPI_Type *)s_spiBases[masterHandle->instance],
391 &masterHandle->hardwareHandle, &transfer));
392 #endif
393 }
394
HAL_SpiMasterTransferGetCount(hal_spi_master_handle_t handle,size_t * spiCount)395 hal_spi_status_t HAL_SpiMasterTransferGetCount(hal_spi_master_handle_t handle, size_t *spiCount)
396 {
397 hal_spi_master_t *masterHandle;
398 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
399 hal_spi_master_dma_state_t *spi_masterDmaHandle;
400 #endif
401
402 assert(handle);
403 assert(spiCount);
404
405 masterHandle = (hal_spi_master_t *)handle;
406 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
407 spi_masterDmaHandle = (hal_spi_master_dma_state_t *)masterHandle->dmaHandle;
408
409 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
410 return HAL_SpiGetStatus(
411 LPSPI_MasterTransferGetCountEDMA((LPSPI_Type *)s_spiBases[masterHandle->instance],
412 (lpspi_master_edma_handle_t *)&spi_masterDmaHandle->edmaHandle, spiCount));
413 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
414
415 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
416
417 #else
418 return HAL_SpiGetStatus(LPSPI_MasterTransferGetCount((LPSPI_Type *)s_spiBases[masterHandle->instance],
419 &masterHandle->hardwareHandle, spiCount));
420 #endif
421 }
422
HAL_SpiMasterTransferAbort(hal_spi_master_handle_t handle)423 hal_spi_status_t HAL_SpiMasterTransferAbort(hal_spi_master_handle_t handle)
424 {
425 hal_spi_master_t *masterHandle;
426 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
427 hal_spi_master_dma_state_t *spi_masterDmaHandle;
428 #endif
429
430 assert(handle);
431
432 masterHandle = (hal_spi_master_t *)handle;
433 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
434 spi_masterDmaHandle = (hal_spi_master_dma_state_t *)masterHandle->dmaHandle;
435
436 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
437 LPSPI_MasterTransferAbortEDMA((LPSPI_Type *)s_spiBases[masterHandle->instance],
438 (lpspi_master_edma_handle_t *)&spi_masterDmaHandle->edmaHandle);
439 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
440
441 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
442
443 #else
444 LPSPI_MasterTransferAbort((LPSPI_Type *)s_spiBases[masterHandle->instance], &masterHandle->hardwareHandle);
445
446 #endif
447
448 return kStatus_HAL_SpiSuccess;
449 }
450
HAL_SpiSlaveTransferInstallCallback(hal_spi_slave_handle_t handle,hal_spi_slave_transfer_callback_t callback,void * callbackParam)451 hal_spi_status_t HAL_SpiSlaveTransferInstallCallback(hal_spi_slave_handle_t handle,
452 hal_spi_slave_transfer_callback_t callback,
453 void *callbackParam)
454 {
455 hal_spi_slave_t *slaveHandle;
456 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
457 hal_spi_slave_dma_state_t *spi_slaveDmaHandle;
458 #endif
459 assert(handle);
460
461 slaveHandle = (hal_spi_slave_t *)handle;
462
463 slaveHandle->callback = callback;
464 slaveHandle->callbackParam = callbackParam;
465
466 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
467 spi_slaveDmaHandle = (hal_spi_slave_dma_state_t *)slaveHandle->dmaHandle;
468 spi_slaveDmaHandle->callback = callback;
469 spi_slaveDmaHandle->callbackParam = callbackParam;
470 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
471
472 LPSPI_SlaveTransferCreateHandleEDMA(
473 (LPSPI_Type *)s_spiBases[slaveHandle->instance], (lpspi_slave_edma_handle_t *)&spi_slaveDmaHandle->edmaHandle,
474 HAL_SpiSlaveDMACallback, callbackParam, &spi_slaveDmaHandle->rxEdmaHandle, &spi_slaveDmaHandle->txEdmaHandle);
475 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
476
477 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
478
479 #else
480 LPSPI_SlaveTransferCreateHandle((LPSPI_Type *)s_spiBases[slaveHandle->instance], &slaveHandle->hardwareHandle,
481 HAL_SpiSlaveCallback, slaveHandle);
482 #endif
483 return kStatus_HAL_SpiSuccess;
484 }
485
HAL_SpiSlaveTransferNonBlocking(hal_spi_slave_handle_t handle,hal_spi_transfer_t * xfer)486 hal_spi_status_t HAL_SpiSlaveTransferNonBlocking(hal_spi_slave_handle_t handle, hal_spi_transfer_t *xfer)
487 {
488 hal_spi_slave_t *slaveHandle;
489 lpspi_transfer_t transfer;
490 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
491 hal_spi_slave_dma_state_t *spi_slaveDmaHandle;
492 #endif
493
494 assert(handle);
495 assert(xfer);
496
497 slaveHandle = (hal_spi_slave_t *)handle;
498 transfer.txData = xfer->txData;
499 transfer.rxData = xfer->rxData;
500 transfer.dataSize = xfer->dataSize;
501 transfer.configFlags = xfer->flags;
502
503 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
504 spi_slaveDmaHandle = (hal_spi_slave_dma_state_t *)slaveHandle->dmaHandle;
505
506 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
507 return HAL_SpiGetStatus(LPSPI_SlaveTransferEDMA((LPSPI_Type *)s_spiBases[slaveHandle->instance],
508 (lpspi_slave_edma_handle_t *)&spi_slaveDmaHandle->edmaHandle,
509 &transfer));
510 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
511
512 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
513
514 #else
515 return HAL_SpiGetStatus(LPSPI_SlaveTransferNonBlocking((LPSPI_Type *)s_spiBases[slaveHandle->instance],
516 &slaveHandle->hardwareHandle, &transfer));
517 #endif
518 }
519
HAL_SpiSlaveTransferGetCount(hal_spi_slave_handle_t handle,size_t * spiCount)520 hal_spi_status_t HAL_SpiSlaveTransferGetCount(hal_spi_slave_handle_t handle, size_t *spiCount)
521 {
522 hal_spi_slave_t *slaveHandle;
523 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
524 hal_spi_slave_dma_state_t *spi_slaveDmaHandle;
525 #endif
526
527 assert(handle);
528 assert(spiCount);
529
530 slaveHandle = (hal_spi_slave_t *)handle;
531
532 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
533 spi_slaveDmaHandle = (hal_spi_slave_dma_state_t *)slaveHandle->dmaHandle;
534
535 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
536 return HAL_SpiGetStatus(
537 LPSPI_SlaveTransferGetCountEDMA((LPSPI_Type *)s_spiBases[slaveHandle->instance],
538 (lpspi_slave_edma_handle_t *)&spi_slaveDmaHandle->edmaHandle, spiCount));
539 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
540
541 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
542
543 #else
544 return HAL_SpiGetStatus(LPSPI_SlaveTransferGetCount((LPSPI_Type *)s_spiBases[slaveHandle->instance],
545 &slaveHandle->hardwareHandle, spiCount));
546 #endif
547 }
548
HAL_SpiSlaveTransferAbort(hal_spi_slave_handle_t handle)549 hal_spi_status_t HAL_SpiSlaveTransferAbort(hal_spi_slave_handle_t handle)
550 {
551 hal_spi_slave_t *slaveHandle;
552 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
553 hal_spi_slave_dma_state_t *spi_slaveDmaHandle;
554 #endif
555
556 assert(handle);
557
558 slaveHandle = (hal_spi_slave_t *)handle;
559
560 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
561 spi_slaveDmaHandle = (hal_spi_slave_dma_state_t *)slaveHandle->dmaHandle;
562
563 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
564 LPSPI_SlaveTransferAbortEDMA((LPSPI_Type *)s_spiBases[slaveHandle->instance],
565 (lpspi_slave_edma_handle_t *)&spi_slaveDmaHandle->edmaHandle);
566 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
567
568 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
569
570 #else
571 LPSPI_SlaveTransferAbort((LPSPI_Type *)s_spiBases[slaveHandle->instance], &slaveHandle->hardwareHandle);
572
573 #endif
574
575 return kStatus_HAL_SpiSuccess;
576 }
577
578 #if (defined(HAL_SPI_SLAVE_DMA_ENABLE) && (HAL_SPI_SLAVE_DMA_ENABLE > 0U))
HAL_SpiSlaveDMAInit(hal_spi_slave_handle_t handle,hal_spi_slave_dma_handle_t dmaHandle,hal_spi_dma_config_t * dmaConfig)579 hal_spi_status_t HAL_SpiSlaveDMAInit(hal_spi_slave_handle_t handle,
580 hal_spi_slave_dma_handle_t dmaHandle,
581 hal_spi_dma_config_t *dmaConfig)
582 {
583 hal_spi_slave_t *spi_slaveHandle;
584 hal_spi_slave_dma_state_t *spi_slaveDmaHandle;
585 #if (defined(HAL_SPI_SLAVE_DMA_INIT_ENABLE) && (HAL_SPI_SLAVE_DMA_INIT_ENABLE > 0U))
586 edma_config_t config;
587 #endif
588
589 assert(handle);
590 assert(HAL_SPI_SLAVE_DMA_HANDLE_SIZE >= sizeof(hal_spi_slave_dma_state_t));
591
592 spi_slaveHandle = (hal_spi_slave_t *)handle;
593 spi_slaveDmaHandle = (hal_spi_slave_dma_state_t *)dmaHandle;
594 spi_slaveHandle->dmaHandle = dmaHandle;
595
596 /* DMA init process. */
597 spi_slaveDmaHandle->instance = dmaConfig->spi_instance;
598 spi_slaveHandle->dmaHandle = dmaHandle;
599
600 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
601 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && (FSL_FEATURE_SOC_DMAMUX_COUNT > 0U))
602 dma_mux_configure_t *dmaMux = dmaConfig->dma_mux_configure;
603 /* Set channel for LPUART */
604 DMAMUX_Type *dmaMuxBases[] = DMAMUX_BASE_PTRS;
605 #if (defined(HAL_SPI_SLAVE_DMA_INIT_ENABLE) && (HAL_SPI_SLAVE_DMA_INIT_ENABLE > 0U))
606 DMAMUX_Init(dmaMuxBases[dmaMux->dma_dmamux_configure.dma_mux_instance]);
607 #endif
608
609 DMAMUX_SetSource(dmaMuxBases[dmaMux->dma_dmamux_configure.dma_mux_instance], dmaConfig->tx_channel,
610 dmaMux->dma_dmamux_configure.tx_request);
611 DMAMUX_SetSource(dmaMuxBases[dmaMux->dma_dmamux_configure.dma_mux_instance], dmaConfig->rx_channel,
612 dmaMux->dma_dmamux_configure.rx_request);
613 DMAMUX_EnableChannel(dmaMuxBases[dmaMux->dma_dmamux_configure.dma_mux_instance], dmaConfig->tx_channel);
614 DMAMUX_EnableChannel(dmaMuxBases[dmaMux->dma_dmamux_configure.dma_mux_instance], dmaConfig->rx_channel);
615 #endif /* FSL_FEATURE_SOC_DMAMUX_COUNT */
616 /* Init the EDMA module */
617 DMA_Type *dmaBases[] = DMA_BASE_PTRS;
618 IRQn_Type s_edmaIRQNumbers[][FSL_FEATURE_EDMA_MODULE_CHANNEL] = DMA_CHN_IRQS;
619 #if (defined(HAL_SPI_SLAVE_DMA_INIT_ENABLE) && (HAL_SPI_SLAVE_DMA_INIT_ENABLE > 0U))
620 EDMA_GetDefaultConfig(&config);
621 EDMA_Init(dmaBases[dmaConfig->dma_instance], &config);
622 #endif
623
624 EDMA_CreateHandle(&spi_slaveDmaHandle->txEdmaHandle, dmaBases[dmaConfig->dma_instance], dmaConfig->tx_channel);
625 EDMA_CreateHandle(&spi_slaveDmaHandle->rxEdmaHandle, dmaBases[dmaConfig->dma_instance], dmaConfig->rx_channel);
626 #if (defined(FSL_FEATURE_EDMA_HAS_CHANNEL_MUX) && (FSL_FEATURE_EDMA_HAS_CHANNEL_MUX > 0U))
627 dma_channel_mux_configure_t *dmaChannelMux = dmaConfig->dma_channel_mux_configure;
628 EDMA_SetChannelMux(dmaBases[dmaConfig->dma_instance], dmaConfig->tx_channel,
629 dmaChannelMux->dma_dmamux_configure.dma_tx_channel_mux);
630 EDMA_SetChannelMux(dmaBases[dmaConfig->dma_instance], dmaConfig->rx_channel,
631 dmaChannelMux->dma_dmamux_configure.dma_rx_channel_mux);
632 #endif /* FSL_FEATURE_EDMA_HAS_CHANNEL_MUX */
633 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
634
635 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
636
637 NVIC_SetPriority(s_edmaIRQNumbers[dmaConfig->dma_instance][dmaConfig->tx_channel], HAL_SPI_ISR_PRIORITY);
638 NVIC_SetPriority(s_edmaIRQNumbers[dmaConfig->dma_instance][dmaConfig->rx_channel], HAL_SPI_ISR_PRIORITY);
639
640 return kStatus_HAL_SpiSuccess;
641 }
HAL_SpiSlaveDMADeinit(hal_spi_slave_handle_t handle)642 hal_spi_status_t HAL_SpiSlaveDMADeinit(hal_spi_slave_handle_t handle)
643 {
644 hal_spi_slave_t *spi_slaveHandle;
645 hal_spi_slave_dma_state_t *spi_slaveDmaHandle;
646
647 assert(handle);
648
649 spi_slaveHandle = (hal_spi_slave_t *)handle;
650 spi_slaveDmaHandle = (hal_spi_slave_dma_state_t *)spi_slaveHandle->dmaHandle;
651 spi_slaveHandle->dmaHandle = NULL;
652
653 assert(spi_slaveDmaHandle);
654
655 /* Abort rx/tx */
656 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
657 #elif (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
658 /* Here we should not abort before create transfer handle. */
659 if (NULL != spi_slaveDmaHandle->edmaHandle.edmaRxRegToRxDataHandle)
660 {
661 LPSPI_SlaveTransferAbortEDMA(s_spiBases[spi_slaveHandle->instance],
662 (lpspi_slave_edma_handle_t *)&spi_slaveDmaHandle->edmaHandle);
663 }
664 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
665
666 return kStatus_HAL_SpiSuccess;
667 }
668 #endif
669 #if (defined(HAL_SPI_MASTER_DMA_ENABLE) && (HAL_SPI_MASTER_DMA_ENABLE > 0U))
HAL_SpiMasterDMAInit(hal_spi_master_handle_t handle,hal_spi_master_dma_handle_t dmaHandle,hal_spi_dma_config_t * dmaConfig)670 hal_spi_status_t HAL_SpiMasterDMAInit(hal_spi_master_handle_t handle,
671 hal_spi_master_dma_handle_t dmaHandle,
672 hal_spi_dma_config_t *dmaConfig)
673 {
674 hal_spi_master_t *spi_masterHandle;
675 hal_spi_master_dma_state_t *spi_masterDmaHandle;
676 #if (defined(HAL_SPI_MASTER_DMA_INIT_ENABLE) && (HAL_SPI_MASTER_DMA_INIT_ENABLE > 0U))
677 edma_config_t config;
678 #endif
679 assert(handle);
680 assert(HAL_SPI_MASTER_DMA_HANDLE_SIZE >= sizeof(hal_spi_master_dma_state_t));
681
682 spi_masterHandle = (hal_spi_master_t *)handle;
683 spi_masterDmaHandle = (hal_spi_master_dma_state_t *)dmaHandle;
684 spi_masterHandle->dmaHandle = dmaHandle;
685
686 /* DMA init process. */
687 spi_masterDmaHandle->instance = dmaConfig->spi_instance;
688 spi_masterHandle->dmaHandle = dmaHandle;
689
690 #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
691 #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && (FSL_FEATURE_SOC_DMAMUX_COUNT > 0U))
692 dma_mux_configure_t *dmaMux = dmaConfig->dma_mux_configure;
693 /* Set channel for LPUART */
694 DMAMUX_Type *dmaMuxBases[] = DMAMUX_BASE_PTRS;
695 #if (defined(HAL_SPI_MASTER_DMA_INIT_ENABLE) && (HAL_SPI_MASTER_DMA_INIT_ENABLE > 0U))
696 DMAMUX_Init(dmaMuxBases[dmaMux->dma_dmamux_configure.dma_mux_instance]);
697 #endif
698 DMAMUX_SetSource(dmaMuxBases[dmaMux->dma_dmamux_configure.dma_mux_instance], dmaConfig->tx_channel,
699 dmaMux->dma_dmamux_configure.tx_request);
700 DMAMUX_SetSource(dmaMuxBases[dmaMux->dma_dmamux_configure.dma_mux_instance], dmaConfig->rx_channel,
701 dmaMux->dma_dmamux_configure.rx_request);
702 DMAMUX_EnableChannel(dmaMuxBases[dmaMux->dma_dmamux_configure.dma_mux_instance], dmaConfig->tx_channel);
703 DMAMUX_EnableChannel(dmaMuxBases[dmaMux->dma_dmamux_configure.dma_mux_instance], dmaConfig->rx_channel);
704 #endif /* FSL_FEATURE_SOC_DMAMUX_COUNT */
705 /* Init the EDMA module */
706 DMA_Type *dmaBases[] = DMA_BASE_PTRS;
707 IRQn_Type s_edmaIRQNumbers[][FSL_FEATURE_EDMA_MODULE_CHANNEL] = DMA_CHN_IRQS;
708 #if (defined(HAL_SPI_MASTER_DMA_INIT_ENABLE) && (HAL_SPI_MASTER_DMA_INIT_ENABLE > 0U))
709 EDMA_GetDefaultConfig(&config);
710 EDMA_Init(dmaBases[dmaConfig->dma_instance], &config);
711 #endif
712 EDMA_CreateHandle(&spi_masterDmaHandle->txEdmaHandle, dmaBases[dmaConfig->dma_instance], dmaConfig->tx_channel);
713 EDMA_CreateHandle(&spi_masterDmaHandle->rxEdmaHandle, dmaBases[dmaConfig->dma_instance], dmaConfig->rx_channel);
714 #if (defined(FSL_FEATURE_EDMA_HAS_CHANNEL_MUX) && (FSL_FEATURE_EDMA_HAS_CHANNEL_MUX > 0U))
715 dma_channel_mux_configure_t *dmaChannelMux = dmaConfig->dma_channel_mux_configure;
716 EDMA_SetChannelMux(dmaBases[dmaConfig->dma_instance], dmaConfig->tx_channel,
717 dmaChannelMux->dma_dmamux_configure.dma_tx_channel_mux);
718 EDMA_SetChannelMux(dmaBases[dmaConfig->dma_instance], dmaConfig->rx_channel,
719 dmaChannelMux->dma_dmamux_configure.dma_rx_channel_mux);
720 #endif /* FSL_FEATURE_EDMA_HAS_CHANNEL_MUX */
721 #elif (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
722
723 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
724
725 NVIC_SetPriority(s_edmaIRQNumbers[dmaConfig->dma_instance][dmaConfig->tx_channel], HAL_SPI_ISR_PRIORITY);
726 NVIC_SetPriority(s_edmaIRQNumbers[dmaConfig->dma_instance][dmaConfig->rx_channel], HAL_SPI_ISR_PRIORITY);
727
728 return kStatus_HAL_SpiSuccess;
729 }
HAL_SpiMasterDMADeinit(hal_spi_master_handle_t handle)730 hal_spi_status_t HAL_SpiMasterDMADeinit(hal_spi_master_handle_t handle)
731 {
732 hal_spi_master_t *spi_masterHandle;
733 hal_spi_master_dma_state_t *spi_masterDmaHandle;
734
735 assert(handle);
736
737 spi_masterHandle = (hal_spi_master_t *)handle;
738 spi_masterDmaHandle = (hal_spi_master_dma_state_t *)spi_masterHandle->dmaHandle;
739 spi_masterHandle->dmaHandle = NULL;
740
741 assert(spi_masterDmaHandle);
742
743 /* Abort rx/tx */
744 #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
745 #elif (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
746 /* Here we should not abort before create transfer handle. */
747 if (NULL != spi_masterDmaHandle->edmaHandle.edmaRxRegToRxDataHandle)
748 {
749 LPSPI_MasterTransferAbortEDMA((LPSPI_Type *)s_spiBases[spi_masterHandle->instance],
750 (lpspi_master_edma_handle_t *)&spi_masterDmaHandle->edmaHandle);
751 }
752 #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
753
754 return kStatus_HAL_SpiSuccess;
755 }
756 #endif
757
