1 /* 2 * Copyright 2017-2021 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /*********************************************************************************************************************** 9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file 10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. 11 **********************************************************************************************************************/ 12 13 #ifndef _PIN_MUX_H_ 14 #define _PIN_MUX_H_ 15 16 /*********************************************************************************************************************** 17 * Definitions 18 **********************************************************************************************************************/ 19 20 /*! @brief Direction type */ 21 typedef enum _pin_mux_direction 22 { 23 kPIN_MUX_DirectionInput = 0U, /* Input direction */ 24 kPIN_MUX_DirectionOutput = 1U, /* Output direction */ 25 kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */ 26 } pin_mux_direction_t; 27 28 /*! 29 * @addtogroup pin_mux 30 * @{ 31 */ 32 33 /*********************************************************************************************************************** 34 * API 35 **********************************************************************************************************************/ 36 37 #if defined(__cplusplus) 38 extern "C" { 39 #endif 40 41 /*! 42 * @brief Calls initialization functions. 43 * 44 */ 45 void BOARD_InitBootPins(void); 46 47 /*! 48 * @brief Configures pin routing and optionally pin electrical features. 49 * 50 */ 51 void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */ 52 53 #define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */ 54 #define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */ 55 #define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */ 56 #define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */ 57 #define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */ 58 #define IOCON_PIO_OD_EN 0x0400u /*!<@brief Enables Open-drain function */ 59 #define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */ 60 61 /*! @name PIO0_0 (number 48), D1/P0_0-GREEN 62 @{ */ 63 /* Routed pin properties */ 64 /*! 65 * @brief Peripheral name */ 66 #define BOARD_INITLEDSPINS_LED_GREEN_PERIPHERAL GPIO 67 /*! 68 * @brief Signal name */ 69 #define BOARD_INITLEDSPINS_LED_GREEN_SIGNAL PIO0 70 /*! 71 * @brief Signal channel */ 72 #define BOARD_INITLEDSPINS_LED_GREEN_CHANNEL 0 73 /*! 74 * @brief Routed pin name */ 75 #define BOARD_INITLEDSPINS_LED_GREEN_PIN_NAME PIO0_0 76 /*! 77 * @brief Label */ 78 #define BOARD_INITLEDSPINS_LED_GREEN_LABEL "D1/P0_0-GREEN" 79 /*! 80 * @brief Identifier */ 81 #define BOARD_INITLEDSPINS_LED_GREEN_NAME "LED_GREEN" 82 /*! 83 * @brief Direction */ 84 #define BOARD_INITLEDSPINS_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput 85 86 /* Symbols to be used with GPIO driver */ 87 /*! 88 * @brief GPIO peripheral base pointer */ 89 #define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO 90 /*! 91 * @brief GPIO pin number */ 92 #define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 0U 93 /*! 94 * @brief GPIO pin mask */ 95 #define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 0U) 96 /*! 97 * @brief PORT device index: 0 */ 98 #define BOARD_INITLEDSPINS_LED_GREEN_PORT 0U 99 /*! 100 * @brief PORT pin number */ 101 #define BOARD_INITLEDSPINS_LED_GREEN_PIN 0U 102 /*! 103 * @brief PORT pin mask */ 104 #define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 0U) 105 /* @} */ 106 107 /*! @name PIO1_15 (number 24), D2/P3[44]/P1_15-BLUE 108 @{ */ 109 /* Routed pin properties */ 110 #define BOARD_INITLEDSPINS_LED_BLUE_PERIPHERAL GPIO /*!<@brief Peripheral name */ 111 #define BOARD_INITLEDSPINS_LED_BLUE_SIGNAL PIO1 /*!<@brief Signal name */ 112 #define BOARD_INITLEDSPINS_LED_BLUE_CHANNEL 15 /*!<@brief Signal channel */ 113 #define BOARD_INITLEDSPINS_LED_BLUE_PIN_NAME PIO1_15 /*!<@brief Routed pin name */ 114 #define BOARD_INITLEDSPINS_LED_BLUE_LABEL "D2/P3[44]/P1_15-BLUE" /*!<@brief Label */ 115 #define BOARD_INITLEDSPINS_LED_BLUE_NAME "LED_BLUE" /*!<@brief Identifier */ 116 #define BOARD_INITLEDSPINS_LED_BLUE_DIRECTION kPIN_MUX_DirectionOutput /*!<@brief Direction */ 117 118 /* Symbols to be used with GPIO driver */ 119 #define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ 120 #define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 15U /*!<@brief GPIO pin number */ 121 #define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 15U) /*!<@brief GPIO pin mask */ 122 #define BOARD_INITLEDSPINS_LED_BLUE_PORT 1U /*!<@brief PORT device index: 1 */ 123 #define BOARD_INITLEDSPINS_LED_BLUE_PIN 15U /*!<@brief PORT pin number */ 124 #define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 15U) /*!<@brief PORT pin mask */ 125 /* @} */ 126 127 /*! @name PIO0_12 (number 4), D3/P3[45]/SW1/P0_12-RED-ISP 128 @{ */ 129 /* Routed pin properties */ 130 #define BOARD_INITLEDSPINS_LED_RED_PERIPHERAL GPIO /*!<@brief Peripheral name */ 131 #define BOARD_INITLEDSPINS_LED_RED_SIGNAL PIO0 /*!<@brief Signal name */ 132 #define BOARD_INITLEDSPINS_LED_RED_CHANNEL 12 /*!<@brief Signal channel */ 133 #define BOARD_INITLEDSPINS_LED_RED_PIN_NAME PIO0_12 /*!<@brief Routed pin name */ 134 #define BOARD_INITLEDSPINS_LED_RED_LABEL "D3/P3[45]/SW1/P0_12-RED-ISP" /*!<@brief Label */ 135 #define BOARD_INITLEDSPINS_LED_RED_NAME "LED_RED" /*!<@brief Identifier */ 136 #define BOARD_INITLEDSPINS_LED_RED_DIRECTION kPIN_MUX_DirectionOutput /*!<@brief Direction */ 137 138 /* Symbols to be used with GPIO driver */ 139 #define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ 140 #define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 12U /*!<@brief GPIO pin number */ 141 #define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 12U) /*!<@brief GPIO pin mask */ 142 #define BOARD_INITLEDSPINS_LED_RED_PORT 0U /*!<@brief PORT device index: 0 */ 143 #define BOARD_INITLEDSPINS_LED_RED_PIN 12U /*!<@brief PORT pin number */ 144 #define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 12U) /*!<@brief PORT pin mask */ 145 /* @} */ 146 147 /*! 148 * @brief Configures pin routing and optionally pin electrical features. 149 * 150 */ 151 void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M0P */ 152 153 #define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */ 154 #define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */ 155 #define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */ 156 #define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */ 157 #define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */ 158 #define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */ 159 160 /*! @name PIO1_17 (number 37), P3[13]/P6[1]/U4[31]/TARGET_TX_DEBUG_P1_17 161 @{ */ 162 /* Routed pin properties */ 163 /*! 164 * @brief Peripheral name */ 165 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PERIPHERAL USART0 166 /*! 167 * @brief Signal name */ 168 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_SIGNAL TXD 169 /*! 170 * @brief Routed pin name */ 171 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_NAME PIO1_17 172 /*! 173 * @brief Label */ 174 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_LABEL "P3[13]/P6[1]/U4[31]/TARGET_TX_DEBUG_P1_17" 175 /*! 176 * @brief Identifier */ 177 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_NAME "DEBUG_UART_TX" 178 /*! 179 * @brief PORT device index: 1 */ 180 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 1U 181 /*! 182 * @brief PORT pin number */ 183 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 17U 184 /*! 185 * @brief PORT pin mask */ 186 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 17U) 187 /* @} */ 188 189 /*! @name PIO1_16 (number 36), P7[1]/U4[32]/TARGET_RX_DEBUG_P1_16 190 @{ */ 191 /* Routed pin properties */ 192 /*! 193 * @brief Peripheral name */ 194 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PERIPHERAL USART0 195 /*! 196 * @brief Signal name */ 197 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_SIGNAL RXD 198 /*! 199 * @brief Routed pin name */ 200 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_NAME PIO1_16 201 /*! 202 * @brief Label */ 203 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_LABEL "P7[1]/U4[32]/TARGET_RX_DEBUG_P1_16" 204 /*! 205 * @brief Identifier */ 206 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_NAME "DEBUG_UART_RX" 207 /*! 208 * @brief PORT device index: 1 */ 209 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 1U 210 /*! 211 * @brief PORT pin number */ 212 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 16U 213 /*! 214 * @brief PORT pin mask */ 215 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 16U) 216 /* @} */ 217 218 /*! 219 * @brief Configures pin routing and optionally pin electrical features. 220 * 221 */ 222 void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M0P */ 223 224 #define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */ 225 #define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */ 226 #define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */ 227 #define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */ 228 #define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */ 229 #define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */ 230 231 /*! @name SWCLK (number 12), U4[16]/P4[4]/TARGET_SWCLK 232 @{ */ 233 /* Routed pin properties */ 234 /*! 235 * @brief Peripheral name */ 236 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PERIPHERAL SWD 237 /*! 238 * @brief Signal name */ 239 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_SIGNAL SWCLK 240 /*! 241 * @brief Routed pin name */ 242 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PIN_NAME SWCLK 243 /*! 244 * @brief Label */ 245 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_LABEL "U4[16]/P4[4]/TARGET_SWCLK" 246 /*! 247 * @brief Identifier */ 248 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_NAME "DEBUG_SWD_SWCLK" 249 /*! 250 * @brief PORT device index: 0 */ 251 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PORT 0U 252 /*! 253 * @brief PORT pin number */ 254 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PIN 3U 255 /*! 256 * @brief PORT pin mask */ 257 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PIN_MASK (1U << 3U) 258 /* @} */ 259 260 /*! @name SWDIO (number 14), U4[17]/P4[2]/TARGET_SWDIO 261 @{ */ 262 /* Routed pin properties */ 263 /*! 264 * @brief Peripheral name */ 265 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PERIPHERAL SWD 266 /*! 267 * @brief Signal name */ 268 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_SIGNAL SWDIO 269 /*! 270 * @brief Routed pin name */ 271 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_NAME SWDIO 272 /*! 273 * @brief Label */ 274 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_LABEL "U4[17]/P4[2]/TARGET_SWDIO" 275 /*! 276 * @brief Identifier */ 277 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO" 278 /*! 279 * @brief PORT device index: 0 */ 280 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U 281 /*! 282 * @brief PORT pin number */ 283 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 2U 284 /*! 285 * @brief PORT pin mask */ 286 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 2U) 287 /* @} */ 288 289 /*! @name RESETN (number 5), P3[4]/J5[3]/U4[8]/P4[10]/SW3[1]/TARGET_nRESET-P0_5 290 @{ */ 291 /* Routed pin properties */ 292 /*! 293 * @brief Peripheral name */ 294 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PERIPHERAL SYSCON 295 /*! 296 * @brief Signal name */ 297 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_SIGNAL RESETN 298 /*! 299 * @brief Routed pin name */ 300 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_NAME RESETN 301 /*! 302 * @brief Label */ 303 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_LABEL "P3[4]/J5[3]/U4[8]/P4[10]/SW3[1]/TARGET_nRESET-P0_5" 304 /*! 305 * @brief Identifier */ 306 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_NAME "DEBUG_SWD_RESETN" 307 /*! 308 * @brief PORT device index: 0 */ 309 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PORT 0U 310 /*! 311 * @brief PORT pin number */ 312 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN 5U 313 /*! 314 * @brief PORT pin mask */ 315 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_MASK (1U << 5U) 316 /* @} */ 317 318 /*! 319 * @brief Configures pin routing and optionally pin electrical features. 320 * 321 */ 322 void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M0P */ 323 324 #define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */ 325 #define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */ 326 #define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */ 327 #define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */ 328 #define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */ 329 #define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */ 330 331 /*! @name PIO0_12 (number 4), D3/P3[45]/SW1/P0_12-RED-ISP 332 @{ */ 333 /* Routed pin properties */ 334 #define BOARD_INITBUTTONSPINS_SW1_PERIPHERAL GPIO /*!<@brief Peripheral name */ 335 #define BOARD_INITBUTTONSPINS_SW1_SIGNAL PIO0 /*!<@brief Signal name */ 336 #define BOARD_INITBUTTONSPINS_SW1_CHANNEL 12 /*!<@brief Signal channel */ 337 #define BOARD_INITBUTTONSPINS_SW1_PIN_NAME PIO0_12 /*!<@brief Routed pin name */ 338 #define BOARD_INITBUTTONSPINS_SW1_LABEL "D3/P3[45]/SW1/P0_12-RED-ISP" /*!<@brief Label */ 339 #define BOARD_INITBUTTONSPINS_SW1_NAME "SW1" /*!<@brief Identifier */ 340 #define BOARD_INITBUTTONSPINS_SW1_DIRECTION kPIN_MUX_DirectionInput /*!<@brief Direction */ 341 342 /* Symbols to be used with GPIO driver */ 343 #define BOARD_INITBUTTONSPINS_SW1_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ 344 #define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN 12U /*!<@brief GPIO pin number */ 345 #define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN_MASK (1U << 12U) /*!<@brief GPIO pin mask */ 346 #define BOARD_INITBUTTONSPINS_SW1_PORT 0U /*!<@brief PORT device index: 0 */ 347 #define BOARD_INITBUTTONSPINS_SW1_PIN 12U /*!<@brief PORT pin number */ 348 #define BOARD_INITBUTTONSPINS_SW1_PIN_MASK (1U << 12U) /*!<@brief PORT pin mask */ 349 /* @} */ 350 351 /*! @name PIO0_4 (number 6), P3[50]/SW2/P0_4-WAKEUP 352 @{ */ 353 /* Routed pin properties */ 354 #define BOARD_INITBUTTONSPINS_SW2_PERIPHERAL GPIO /*!<@brief Peripheral name */ 355 #define BOARD_INITBUTTONSPINS_SW2_SIGNAL PIO0 /*!<@brief Signal name */ 356 #define BOARD_INITBUTTONSPINS_SW2_CHANNEL 4 /*!<@brief Signal channel */ 357 #define BOARD_INITBUTTONSPINS_SW2_PIN_NAME PIO0_4 /*!<@brief Routed pin name */ 358 #define BOARD_INITBUTTONSPINS_SW2_LABEL "P3[50]/SW2/P0_4-WAKEUP" /*!<@brief Label */ 359 #define BOARD_INITBUTTONSPINS_SW2_NAME "SW2" /*!<@brief Identifier */ 360 #define BOARD_INITBUTTONSPINS_SW2_DIRECTION kPIN_MUX_DirectionInput /*!<@brief Direction */ 361 362 /* Symbols to be used with GPIO driver */ 363 #define BOARD_INITBUTTONSPINS_SW2_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ 364 #define BOARD_INITBUTTONSPINS_SW2_GPIO_PIN 4U /*!<@brief GPIO pin number */ 365 #define BOARD_INITBUTTONSPINS_SW2_GPIO_PIN_MASK (1U << 4U) /*!<@brief GPIO pin mask */ 366 #define BOARD_INITBUTTONSPINS_SW2_PORT 0U /*!<@brief PORT device index: 0 */ 367 #define BOARD_INITBUTTONSPINS_SW2_PIN 4U /*!<@brief PORT pin number */ 368 #define BOARD_INITBUTTONSPINS_SW2_PIN_MASK (1U << 4U) /*!<@brief PORT pin mask */ 369 /* @} */ 370 371 /*! 372 * @brief Configures pin routing and optionally pin electrical features. 373 * 374 */ 375 void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M0P */ 376 377 #if defined(__cplusplus) 378 } 379 #endif 380 381 /*! 382 * @} 383 */ 384 #endif /* _PIN_MUX_H_ */ 385 386 /*********************************************************************************************************************** 387 * EOF 388 **********************************************************************************************************************/ 389
