1 /* 2 * Copyright 2017-2021 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /*********************************************************************************************************************** 9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file 10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. 11 **********************************************************************************************************************/ 12 13 #ifndef _PIN_MUX_H_ 14 #define _PIN_MUX_H_ 15 16 /*********************************************************************************************************************** 17 * Definitions 18 **********************************************************************************************************************/ 19 20 /*! @brief Direction type */ 21 typedef enum _pin_mux_direction 22 { 23 kPIN_MUX_DirectionInput = 0U, /* Input direction */ 24 kPIN_MUX_DirectionOutput = 1U, /* Output direction */ 25 kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */ 26 } pin_mux_direction_t; 27 28 /*! 29 * @addtogroup pin_mux 30 * @{ 31 */ 32 33 /*********************************************************************************************************************** 34 * API 35 **********************************************************************************************************************/ 36 37 #if defined(__cplusplus) 38 extern "C" { 39 #endif 40 41 /*! 42 * @brief Calls initialization functions. 43 * 44 */ 45 void BOARD_InitBootPins(void); 46 47 /*! 48 * @brief Configures pin routing and optionally pin electrical features. 49 * 50 */ 51 void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */ 52 53 #define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */ 54 #define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */ 55 #define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */ 56 #define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */ 57 #define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */ 58 #define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */ 59 60 /*! @name PIO0_27 (number 11), D1[3]/P3[42]/J1[9]/P0_27-BLUE 61 @{ */ 62 /* Routed pin properties */ 63 /*! 64 * @brief Peripheral name */ 65 #define BOARD_INITLEDSPINS_LED_BLUE_PERIPHERAL GPIO 66 /*! 67 * @brief Signal name */ 68 #define BOARD_INITLEDSPINS_LED_BLUE_SIGNAL PIO0 69 /*! 70 * @brief Signal channel */ 71 #define BOARD_INITLEDSPINS_LED_BLUE_CHANNEL 27 72 /*! 73 * @brief Routed pin name */ 74 #define BOARD_INITLEDSPINS_LED_BLUE_PIN_NAME PIO0_27 75 /*! 76 * @brief Label */ 77 #define BOARD_INITLEDSPINS_LED_BLUE_LABEL "D1[3]/P3[42]/J1[9]/P0_27-BLUE" 78 /*! 79 * @brief Identifier */ 80 #define BOARD_INITLEDSPINS_LED_BLUE_NAME "LED_BLUE" 81 /*! 82 * @brief Direction */ 83 #define BOARD_INITLEDSPINS_LED_BLUE_DIRECTION kPIN_MUX_DirectionOutput 84 85 /* Symbols to be used with GPIO driver */ 86 /*! 87 * @brief GPIO peripheral base pointer */ 88 #define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO 89 /*! 90 * @brief GPIO pin number */ 91 #define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 27U 92 /*! 93 * @brief GPIO pin mask */ 94 #define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 27U) 95 /*! 96 * @brief PORT device index: 0 */ 97 #define BOARD_INITLEDSPINS_LED_BLUE_PORT 0U 98 /*! 99 * @brief PORT pin number */ 100 #define BOARD_INITLEDSPINS_LED_BLUE_PIN 27U 101 /*! 102 * @brief PORT pin mask */ 103 #define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 27U) 104 /* @} */ 105 106 /*! @name PIO0_16 (number 10), D1[4]/P3[43]/J2[2]/P0_16-GREEN 107 @{ */ 108 /* Routed pin properties */ 109 /*! 110 * @brief Peripheral name */ 111 #define BOARD_INITLEDSPINS_LED_GREEN_PERIPHERAL GPIO 112 /*! 113 * @brief Signal name */ 114 #define BOARD_INITLEDSPINS_LED_GREEN_SIGNAL PIO0 115 /*! 116 * @brief Signal channel */ 117 #define BOARD_INITLEDSPINS_LED_GREEN_CHANNEL 16 118 /*! 119 * @brief Routed pin name */ 120 #define BOARD_INITLEDSPINS_LED_GREEN_PIN_NAME PIO0_16 121 /*! 122 * @brief Label */ 123 #define BOARD_INITLEDSPINS_LED_GREEN_LABEL "D1[4]/P3[43]/J2[2]/P0_16-GREEN" 124 /*! 125 * @brief Identifier */ 126 #define BOARD_INITLEDSPINS_LED_GREEN_NAME "LED_GREEN" 127 /*! 128 * @brief Direction */ 129 #define BOARD_INITLEDSPINS_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput 130 131 /* Symbols to be used with GPIO driver */ 132 /*! 133 * @brief GPIO peripheral base pointer */ 134 #define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO 135 /*! 136 * @brief GPIO pin number */ 137 #define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 16U 138 /*! 139 * @brief GPIO pin mask */ 140 #define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 16U) 141 /*! 142 * @brief PORT device index: 0 */ 143 #define BOARD_INITLEDSPINS_LED_GREEN_PORT 0U 144 /*! 145 * @brief PORT pin number */ 146 #define BOARD_INITLEDSPINS_LED_GREEN_PIN 16U 147 /*! 148 * @brief PORT pin mask */ 149 #define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 16U) 150 /* @} */ 151 152 /*! @name PIO0_12 (number 2), SW2/D1[1]/P3[45]/J2[5]/P0_12-RED-ISP 153 @{ */ 154 /* Routed pin properties */ 155 /*! 156 * @brief Peripheral name */ 157 #define BOARD_INITLEDSPINS_LED_RED_PERIPHERAL GPIO 158 /*! 159 * @brief Signal name */ 160 #define BOARD_INITLEDSPINS_LED_RED_SIGNAL PIO0 161 /*! 162 * @brief Signal channel */ 163 #define BOARD_INITLEDSPINS_LED_RED_CHANNEL 12 164 /*! 165 * @brief Routed pin name */ 166 #define BOARD_INITLEDSPINS_LED_RED_PIN_NAME PIO0_12 167 /*! 168 * @brief Label */ 169 #define BOARD_INITLEDSPINS_LED_RED_LABEL "SW2/D1[1]/P3[45]/J2[5]/P0_12-RED-ISP" 170 /*! 171 * @brief Identifier */ 172 #define BOARD_INITLEDSPINS_LED_RED_NAME "LED_RED" 173 /*! 174 * @brief Direction */ 175 #define BOARD_INITLEDSPINS_LED_RED_DIRECTION kPIN_MUX_DirectionOutput 176 177 /* Symbols to be used with GPIO driver */ 178 /*! 179 * @brief GPIO peripheral base pointer */ 180 #define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO 181 /*! 182 * @brief GPIO pin number */ 183 #define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 12U 184 /*! 185 * @brief GPIO pin mask */ 186 #define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 12U) 187 /*! 188 * @brief PORT device index: 0 */ 189 #define BOARD_INITLEDSPINS_LED_RED_PORT 0U 190 /*! 191 * @brief PORT pin number */ 192 #define BOARD_INITLEDSPINS_LED_RED_PIN 12U 193 /*! 194 * @brief PORT pin mask */ 195 #define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 12U) 196 /* @} */ 197 198 /*! 199 * @brief Configures pin routing and optionally pin electrical features. 200 * 201 */ 202 void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M0P */ 203 204 #define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */ 205 #define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */ 206 #define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */ 207 #define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */ 208 #define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */ 209 #define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */ 210 211 /*! @name PIO0_7 (number 22), P3[14]/U2[31]/TARGET_TX-P0_7 212 @{ */ 213 /* Routed pin properties */ 214 /*! 215 * @brief Peripheral name */ 216 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PERIPHERAL USART0 217 /*! 218 * @brief Signal name */ 219 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_SIGNAL TXD 220 /*! 221 * @brief Routed pin name */ 222 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_NAME PIO0_7 223 /*! 224 * @brief Label */ 225 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_LABEL "P3[14]/U2[31]/TARGET_TX-P0_7" 226 /*! 227 * @brief Identifier */ 228 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_NAME "DEBUG_UART_TX" 229 /*! 230 * @brief PORT device index: 0 */ 231 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U 232 /*! 233 * @brief PORT pin number */ 234 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 7U 235 /*! 236 * @brief PORT pin mask */ 237 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 7U) 238 /* @} */ 239 240 /*! @name PIO0_18 (number 31), P3[21]/J2[4]/U2[32]/TARGET_RX-P0_18 241 @{ */ 242 /* Routed pin properties */ 243 /*! 244 * @brief Peripheral name */ 245 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PERIPHERAL USART0 246 /*! 247 * @brief Signal name */ 248 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_SIGNAL RXD 249 /*! 250 * @brief Routed pin name */ 251 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_NAME PIO0_18 252 /*! 253 * @brief Label */ 254 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_LABEL "P3[21]/J2[4]/U2[32]/TARGET_RX-P0_18" 255 /*! 256 * @brief Identifier */ 257 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_NAME "DEBUG_UART_RX" 258 /*! 259 * @brief PORT device index: 0 */ 260 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U 261 /*! 262 * @brief PORT pin number */ 263 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 18U 264 /*! 265 * @brief PORT pin mask */ 266 #define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 18U) 267 /* @} */ 268 269 /*! 270 * @brief Configures pin routing and optionally pin electrical features. 271 * 272 */ 273 void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M0P */ 274 275 #define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */ 276 #define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */ 277 #define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */ 278 #define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */ 279 #define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */ 280 #define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */ 281 282 /*! @name SWCLK (number 6), P5[4]/U2[16]/TARGET_SWCLK 283 @{ */ 284 /* Routed pin properties */ 285 /*! 286 * @brief Peripheral name */ 287 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PERIPHERAL SWD 288 /*! 289 * @brief Signal name */ 290 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_SIGNAL SWCLK 291 /*! 292 * @brief Routed pin name */ 293 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_NAME SWCLK 294 /*! 295 * @brief Label */ 296 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_LABEL "P5[4]/U2[16]/TARGET_SWCLK" 297 /*! 298 * @brief Identifier */ 299 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_NAME "DEBUG_SWD_SWDCLK" 300 /*! 301 * @brief PORT device index: 0 */ 302 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT 0U 303 /*! 304 * @brief PORT pin number */ 305 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 3U 306 /*! 307 * @brief PORT pin mask */ 308 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 3U) 309 /* @} */ 310 311 /*! @name SWDIO (number 7), P5[2]/U2[17]/TARGET_SWDIO 312 @{ */ 313 /* Routed pin properties */ 314 /*! 315 * @brief Peripheral name */ 316 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PERIPHERAL SWD 317 /*! 318 * @brief Signal name */ 319 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_SIGNAL SWDIO 320 /*! 321 * @brief Routed pin name */ 322 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_NAME SWDIO 323 /*! 324 * @brief Label */ 325 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_LABEL "P5[2]/U2[17]/TARGET_SWDIO" 326 /*! 327 * @brief Identifier */ 328 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO" 329 /*! 330 * @brief PORT device index: 0 */ 331 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U 332 /*! 333 * @brief PORT pin number */ 334 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 2U 335 /*! 336 * @brief PORT pin mask */ 337 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 2U) 338 /* @} */ 339 340 /*! @name RESETN (number 3), J4[3]/P3[4]/U2[3]/P5[10]/SW3[1]/TARGET_nRESET-P0_5 341 @{ */ 342 /* Routed pin properties */ 343 /*! 344 * @brief Peripheral name */ 345 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PERIPHERAL SYSCON 346 /*! 347 * @brief Signal name */ 348 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_SIGNAL RESETN 349 /*! 350 * @brief Routed pin name */ 351 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_NAME RESETN 352 /*! 353 * @brief Label */ 354 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_LABEL "J4[3]/P3[4]/U2[3]/P5[10]/SW3[1]/TARGET_nRESET-P0_5" 355 /*! 356 * @brief Identifier */ 357 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_NAME "DEBUG_SWD_RESETN" 358 /*! 359 * @brief PORT device index: 0 */ 360 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PORT 0U 361 /*! 362 * @brief PORT pin number */ 363 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN 5U 364 /*! 365 * @brief PORT pin mask */ 366 #define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_MASK (1U << 5U) 367 /* @} */ 368 369 /*! 370 * @brief Configures pin routing and optionally pin electrical features. 371 * 372 */ 373 void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M0P */ 374 375 #define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */ 376 #define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */ 377 #define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */ 378 #define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */ 379 #define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */ 380 #define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */ 381 382 /*! @name PIO0_4 (number 4), SW1/P3[9]/J2[7]/P0_4-ISP_U_TXD-WAKEUP 383 @{ */ 384 /* Routed pin properties */ 385 /*! 386 * @brief Peripheral name */ 387 #define BOARD_INITBUTTONSPINS_SW1_PERIPHERAL GPIO 388 /*! 389 * @brief Signal name */ 390 #define BOARD_INITBUTTONSPINS_SW1_SIGNAL PIO0 391 /*! 392 * @brief Signal channel */ 393 #define BOARD_INITBUTTONSPINS_SW1_CHANNEL 4 394 /*! 395 * @brief Routed pin name */ 396 #define BOARD_INITBUTTONSPINS_SW1_PIN_NAME PIO0_4 397 /*! 398 * @brief Label */ 399 #define BOARD_INITBUTTONSPINS_SW1_LABEL "SW1/P3[9]/J2[7]/P0_4-ISP_U_TXD-WAKEUP" 400 /*! 401 * @brief Identifier */ 402 #define BOARD_INITBUTTONSPINS_SW1_NAME "SW1" 403 /*! 404 * @brief Direction */ 405 #define BOARD_INITBUTTONSPINS_SW1_DIRECTION kPIN_MUX_DirectionInput 406 407 /* Symbols to be used with GPIO driver */ 408 /*! 409 * @brief GPIO peripheral base pointer */ 410 #define BOARD_INITBUTTONSPINS_SW1_GPIO GPIO 411 /*! 412 * @brief GPIO pin number */ 413 #define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN 4U 414 /*! 415 * @brief GPIO pin mask */ 416 #define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN_MASK (1U << 4U) 417 /*! 418 * @brief PORT device index: 0 */ 419 #define BOARD_INITBUTTONSPINS_SW1_PORT 0U 420 /*! 421 * @brief PORT pin number */ 422 #define BOARD_INITBUTTONSPINS_SW1_PIN 4U 423 /*! 424 * @brief PORT pin mask */ 425 #define BOARD_INITBUTTONSPINS_SW1_PIN_MASK (1U << 4U) 426 /* @} */ 427 428 /*! @name PIO0_12 (number 2), SW2/D1[1]/P3[45]/J2[5]/P0_12-RED-ISP 429 @{ */ 430 /* Routed pin properties */ 431 /*! 432 * @brief Peripheral name */ 433 #define BOARD_INITBUTTONSPINS_SW2_PERIPHERAL GPIO 434 /*! 435 * @brief Signal name */ 436 #define BOARD_INITBUTTONSPINS_SW2_SIGNAL PIO0 437 /*! 438 * @brief Signal channel */ 439 #define BOARD_INITBUTTONSPINS_SW2_CHANNEL 12 440 /*! 441 * @brief Routed pin name */ 442 #define BOARD_INITBUTTONSPINS_SW2_PIN_NAME PIO0_12 443 /*! 444 * @brief Label */ 445 #define BOARD_INITBUTTONSPINS_SW2_LABEL "SW2/D1[1]/P3[45]/J2[5]/P0_12-RED-ISP" 446 /*! 447 * @brief Identifier */ 448 #define BOARD_INITBUTTONSPINS_SW2_NAME "SW2" 449 /*! 450 * @brief Direction */ 451 #define BOARD_INITBUTTONSPINS_SW2_DIRECTION kPIN_MUX_DirectionInput 452 453 /* Symbols to be used with GPIO driver */ 454 /*! 455 * @brief GPIO peripheral base pointer */ 456 #define BOARD_INITBUTTONSPINS_SW2_GPIO GPIO 457 /*! 458 * @brief GPIO pin number */ 459 #define BOARD_INITBUTTONSPINS_SW2_GPIO_PIN 12U 460 /*! 461 * @brief GPIO pin mask */ 462 #define BOARD_INITBUTTONSPINS_SW2_GPIO_PIN_MASK (1U << 12U) 463 /*! 464 * @brief PORT device index: 0 */ 465 #define BOARD_INITBUTTONSPINS_SW2_PORT 0U 466 /*! 467 * @brief PORT pin number */ 468 #define BOARD_INITBUTTONSPINS_SW2_PIN 12U 469 /*! 470 * @brief PORT pin mask */ 471 #define BOARD_INITBUTTONSPINS_SW2_PIN_MASK (1U << 12U) 472 /* @} */ 473 474 /*! 475 * @brief Configures pin routing and optionally pin electrical features. 476 * 477 */ 478 void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M0P */ 479 480 #if defined(__cplusplus) 481 } 482 #endif 483 484 /*! 485 * @} 486 */ 487 #endif /* _PIN_MUX_H_ */ 488 489 /*********************************************************************************************************************** 490 * EOF 491 **********************************************************************************************************************/ 492
