1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2018 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include <stdint.h>
10 #include "clock_config.h"
11 #include "board.h"
12 #include "fsl_common.h"
13 #include "fsl_debug_console.h"
14 #include "fsl_emc.h"
15 #if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
16 #include "fsl_i2c.h"
17 #endif /* SDK_I2C_BASED_COMPONENT_USED */
18 #if defined BOARD_USE_CODEC
19 #include "fsl_wm8904.h"
20 #endif
21 /*******************************************************************************
22 * Definitions
23 ******************************************************************************/
24 /* The SDRAM timing. */
25 #define SDRAM_REFRESHPERIOD_NS (64 * 1000000 / 4096) /* 4096 rows/ 64ms */
26 #define SDRAM_TRP_NS (18u)
27 #define SDRAM_TRAS_NS (42u)
28 #define SDRAM_TSREX_NS (67u)
29 #define SDRAM_TAPR_NS (18u)
30 #define SDRAM_TWRDELT_NS (6u)
31 #define SDRAM_TRC_NS (60u)
32 #define SDRAM_RFC_NS (60u)
33 #define SDRAM_XSR_NS (67u)
34 #define SDRAM_RRD_NS (12u)
35 #define SDRAM_MRD_NCLK (2u)
36 #define SDRAM_RAS_NCLK (2u)
37 #define SDRAM_MODEREG_VALUE (0x33u)
38 #define SDRAM_DEV_MEMORYMAP (0x09u) /* 128Mbits (8M*16, 4banks, 12 rows, 9 columns)*/
39
40 /*******************************************************************************
41 * Variables
42 ******************************************************************************/
43
44 /* Clock rate on the CLKIN pin */
45 const uint32_t ExtClockIn = BOARD_EXTCLKINRATE;
46
47 /*******************************************************************************
48 * Code
49 ******************************************************************************/
50 /* Initialize debug console. */
BOARD_InitDebugConsole(void)51 status_t BOARD_InitDebugConsole(void)
52 {
53 #if ((SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK) || defined(SDK_DEBUGCONSOLE_UART))
54 status_t result;
55 /* attach 12 MHz clock to FLEXCOMM0 (debug console) */
56 CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
57 RESET_PeripheralReset(BOARD_DEBUG_UART_RST);
58 result = DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE,
59 BOARD_DEBUG_UART_CLK_FREQ);
60 assert(kStatus_Success == result);
61 return result;
62 #else
63 return kStatus_Success;
64 #endif
65 }
66
67 /* Initialize the external memory. */
BOARD_InitSDRAM(void)68 void BOARD_InitSDRAM(void)
69 {
70 uint32_t emcFreq;
71 emc_basic_config_t basicConfig;
72 emc_dynamic_timing_config_t dynTiming;
73 emc_dynamic_chip_config_t dynChipConfig;
74
75 emcFreq = CLOCK_GetEmcClkFreq();
76 assert(emcFreq != 0); /* Check the clock of emc */
77 /* Basic configuration. */
78 basicConfig.endian = kEMC_LittleEndian;
79 basicConfig.fbClkSrc = kEMC_IntloopbackEmcclk;
80 /* EMC Clock = CPU FREQ/2 here can fit CPU freq from 12M ~ 180M.
81 * If you change the divide to 0 and EMC clock is larger than 100M
82 * please take refer to emc.dox to adjust EMC clock delay.
83 */
84 basicConfig.emcClkDiv = 1;
85 /* Dynamic memory timing configuration. */
86 dynTiming.readConfig = kEMC_Cmddelay;
87 dynTiming.refreshPeriod_Nanosec = SDRAM_REFRESHPERIOD_NS;
88 dynTiming.tRp_Ns = SDRAM_TRP_NS;
89 dynTiming.tRas_Ns = SDRAM_TRAS_NS;
90 dynTiming.tSrex_Ns = SDRAM_TSREX_NS;
91 dynTiming.tApr_Ns = SDRAM_TAPR_NS;
92 dynTiming.tWr_Ns = (1000000000 / emcFreq + SDRAM_TWRDELT_NS); /* one clk + 6ns */
93 dynTiming.tDal_Ns = dynTiming.tWr_Ns + dynTiming.tRp_Ns;
94 dynTiming.tRc_Ns = SDRAM_TRC_NS;
95 dynTiming.tRfc_Ns = SDRAM_RFC_NS;
96 dynTiming.tXsr_Ns = SDRAM_XSR_NS;
97 dynTiming.tRrd_Ns = SDRAM_RRD_NS;
98 dynTiming.tMrd_Nclk = SDRAM_MRD_NCLK;
99 /* Dynamic memory chip specific configuration: Chip 0 - MTL48LC8M16A2B4-6A */
100 dynChipConfig.chipIndex = 0;
101 dynChipConfig.dynamicDevice = kEMC_Sdram;
102 dynChipConfig.rAS_Nclk = SDRAM_RAS_NCLK;
103 dynChipConfig.sdramModeReg = SDRAM_MODEREG_VALUE;
104 dynChipConfig.sdramExtModeReg = 0; /* it has no use for normal sdram */
105 dynChipConfig.devAddrMap = SDRAM_DEV_MEMORYMAP;
106 /* EMC Basic configuration. */
107 EMC_Init(EMC, &basicConfig);
108 /* EMC Dynamc memory configuration. */
109 EMC_DynamicMemInit(EMC, &dynTiming, &dynChipConfig, 1);
110 }
111
112 #if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
BOARD_I2C_Init(I2C_Type * base,uint32_t clkSrc_Hz)113 void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz)
114 {
115 i2c_master_config_t i2cConfig = {0};
116
117 I2C_MasterGetDefaultConfig(&i2cConfig);
118 I2C_MasterInit(base, &i2cConfig, clkSrc_Hz);
119 }
120
BOARD_I2C_Send(I2C_Type * base,uint8_t deviceAddress,uint32_t subAddress,uint8_t subaddressSize,uint8_t * txBuff,uint8_t txBuffSize)121 status_t BOARD_I2C_Send(I2C_Type *base,
122 uint8_t deviceAddress,
123 uint32_t subAddress,
124 uint8_t subaddressSize,
125 uint8_t *txBuff,
126 uint8_t txBuffSize)
127 {
128 i2c_master_transfer_t masterXfer;
129
130 /* Prepare transfer structure. */
131 masterXfer.slaveAddress = deviceAddress;
132 masterXfer.direction = kI2C_Write;
133 masterXfer.subaddress = subAddress;
134 masterXfer.subaddressSize = subaddressSize;
135 masterXfer.data = txBuff;
136 masterXfer.dataSize = txBuffSize;
137 masterXfer.flags = kI2C_TransferDefaultFlag;
138
139 return I2C_MasterTransferBlocking(base, &masterXfer);
140 }
141
BOARD_I2C_Receive(I2C_Type * base,uint8_t deviceAddress,uint32_t subAddress,uint8_t subaddressSize,uint8_t * rxBuff,uint8_t rxBuffSize)142 status_t BOARD_I2C_Receive(I2C_Type *base,
143 uint8_t deviceAddress,
144 uint32_t subAddress,
145 uint8_t subaddressSize,
146 uint8_t *rxBuff,
147 uint8_t rxBuffSize)
148 {
149 i2c_master_transfer_t masterXfer;
150
151 /* Prepare transfer structure. */
152 masterXfer.slaveAddress = deviceAddress;
153 masterXfer.subaddress = subAddress;
154 masterXfer.subaddressSize = subaddressSize;
155 masterXfer.data = rxBuff;
156 masterXfer.dataSize = rxBuffSize;
157 masterXfer.direction = kI2C_Read;
158 masterXfer.flags = kI2C_TransferDefaultFlag;
159
160 return I2C_MasterTransferBlocking(base, &masterXfer);
161 }
162
BOARD_Accel_I2C_Init(void)163 void BOARD_Accel_I2C_Init(void)
164 {
165 BOARD_I2C_Init(BOARD_ACCEL_I2C_BASEADDR, BOARD_ACCEL_I2C_CLOCK_FREQ);
166 }
167
BOARD_Accel_I2C_Send(uint8_t deviceAddress,uint32_t subAddress,uint8_t subaddressSize,uint32_t txBuff)168 status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff)
169 {
170 uint8_t data = (uint8_t)txBuff;
171
172 return BOARD_I2C_Send(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, &data, 1);
173 }
174
BOARD_Accel_I2C_Receive(uint8_t deviceAddress,uint32_t subAddress,uint8_t subaddressSize,uint8_t * rxBuff,uint8_t rxBuffSize)175 status_t BOARD_Accel_I2C_Receive(
176 uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
177 {
178 return BOARD_I2C_Receive(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, rxBuff, rxBuffSize);
179 }
180
BOARD_Codec_I2C_Init(void)181 void BOARD_Codec_I2C_Init(void)
182 {
183 BOARD_I2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
184 }
185
BOARD_Codec_I2C_Send(uint8_t deviceAddress,uint32_t subAddress,uint8_t subAddressSize,const uint8_t * txBuff,uint8_t txBuffSize)186 status_t BOARD_Codec_I2C_Send(
187 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
188 {
189 return BOARD_I2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
190 txBuffSize);
191 }
192
BOARD_Codec_I2C_Receive(uint8_t deviceAddress,uint32_t subAddress,uint8_t subAddressSize,uint8_t * rxBuff,uint8_t rxBuffSize)193 status_t BOARD_Codec_I2C_Receive(
194 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
195 {
196 return BOARD_I2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
197 }
198
BOARD_Touch_I2C_Send(uint8_t deviceAddress,uint32_t subAddress,uint8_t subAddressSize,const uint8_t * txBuff,uint8_t txBuffSize)199 status_t BOARD_Touch_I2C_Send(
200 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
201 {
202 return BOARD_I2C_Send(BOARD_TOUCH_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
203 txBuffSize);
204 }
205
BOARD_Touch_I2C_Receive(uint8_t deviceAddress,uint32_t subAddress,uint8_t subAddressSize,uint8_t * rxBuff,uint8_t rxBuffSize)206 status_t BOARD_Touch_I2C_Receive(
207 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
208 {
209 return BOARD_I2C_Receive(BOARD_TOUCH_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
210 }
211 #endif /* SDK_I2C_BASED_COMPONENT_USED */
212
