1 /*
2 * Copyright 2021 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 /***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13 /* clang-format off */
14 /*
15 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
16 !!GlobalInfo
17 product: Pins v9.0
18 processor: MKE17Z256xxx7
19 package_id: MKE17Z256VLL7
20 mcu_data: ksdk2_0
21 processor_version: 0.10.0
22 board: FRDM-KE17Z
23 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
24 */
25 /* clang-format on */
26
27 #include "fsl_common.h"
28 #include "fsl_port.h"
29 #include "fsl_gpio.h"
30 #include "pin_mux.h"
31
32 /* FUNCTION ************************************************************************************************************
33 *
34 * Function Name : BOARD_InitBootPins
35 * Description : Calls initialization functions.
36 *
37 * END ****************************************************************************************************************/
BOARD_InitBootPins(void)38 void BOARD_InitBootPins(void)
39 {
40 BOARD_InitPins();
41 BOARD_InitDEBUG_UARTPins();
42 }
43
44 /* clang-format off */
45 /*
46 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
47 BOARD_InitPins:
48 - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'}
49 - pin_list: []
50 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
51 */
52 /* clang-format on */
53
54 /* FUNCTION ************************************************************************************************************
55 *
56 * Function Name : BOARD_InitPins
57 * Description : Configures pin routing and optionally pin electrical features.
58 *
59 * END ****************************************************************************************************************/
BOARD_InitPins(void)60 void BOARD_InitPins(void)
61 {
62 }
63
64 /* clang-format off */
65 /*
66 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
67 BOARD_InitTOUCHPins:
68 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
69 - pin_list:
70 - {pin_num: '45', peripheral: TSI1, signal: 'CH, 20', pin_signal: TSI1_CH20/PTC15/FTM1_CH3}
71 - {pin_num: '95', peripheral: TSI0, signal: 'CH, 8', pin_signal: TSI0_CH8/PTC5/FTM2_CH0}
72 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
73 */
74 /* clang-format on */
75
76 /* FUNCTION ************************************************************************************************************
77 *
78 * Function Name : BOARD_InitTOUCHPins
79 * Description : Configures pin routing and optionally pin electrical features.
80 *
81 * END ****************************************************************************************************************/
BOARD_InitTOUCHPins(void)82 void BOARD_InitTOUCHPins(void)
83 {
84 /* Clock Control: Clock enabled */
85 CLOCK_EnableClock(kCLOCK_PortC);
86
87 /* PORTC15 (pin 45) is configured as TSI1_CH20 */
88 PORT_SetPinMux(BOARD_TSI_ELECTRODE2_PORT, BOARD_TSI_ELECTRODE2_PIN, kPORT_PinDisabledOrAnalog);
89
90 /* PORTC5 (pin 95) is configured as TSI0_CH8 */
91 PORT_SetPinMux(BOARD_TSI_ELECTRODE1_PORT, BOARD_TSI_ELECTRODE1_PIN, kPORT_PinDisabledOrAnalog);
92 }
93
94 /* clang-format off */
95 /*
96 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
97 BOARD_InitBUTTONSPins:
98 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
99 - pin_list:
100 - {pin_num: '70', peripheral: GPIOD, signal: 'GPIO, 3', pin_signal: PTD3/FXIO_D5/LPI2C0_SCL/TRGMUX_IN4/NMI_b, direction: INPUT, gpio_interrupt: no_init, drive_strength: low,
101 pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable}
102 - {pin_num: '17', peripheral: GPIOE, signal: 'GPIO, 14', pin_signal: PTE14/FTM0_FLT1/TRGMUX_OUT4, direction: INPUT, gpio_interrupt: no_init}
103 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
104 */
105 /* clang-format on */
106
107 /* FUNCTION ************************************************************************************************************
108 *
109 * Function Name : BOARD_InitBUTTONSPins
110 * Description : Configures pin routing and optionally pin electrical features.
111 *
112 * END ****************************************************************************************************************/
BOARD_InitBUTTONSPins(void)113 void BOARD_InitBUTTONSPins(void)
114 {
115 /* Clock Control: Clock enabled */
116 CLOCK_EnableClock(kCLOCK_PortD);
117 /* Clock Control: Clock enabled */
118 CLOCK_EnableClock(kCLOCK_PortE);
119
120 gpio_pin_config_t SW2_config = {
121 .pinDirection = kGPIO_DigitalInput,
122 .outputLogic = 0U
123 };
124 /* Initialize GPIO functionality on pin PTD3 (pin 70) */
125 GPIO_PinInit(BOARD_SW2_GPIO, BOARD_SW2_PIN, &SW2_config);
126
127 gpio_pin_config_t SW3_config = {
128 .pinDirection = kGPIO_DigitalInput,
129 .outputLogic = 0U
130 };
131 /* Initialize GPIO functionality on pin PTE14 (pin 17) */
132 GPIO_PinInit(BOARD_SW3_GPIO, BOARD_SW3_PIN, &SW3_config);
133
134 const port_pin_config_t SW2 = {/* Internal pull-up/down resistor is disabled */
135 kPORT_PullDisable,
136 /* Passive filter is disabled */
137 kPORT_PassiveFilterDisable,
138 /* Low drive strength is configured */
139 kPORT_LowDriveStrength,
140 /* Pin is configured as PTD3 */
141 kPORT_MuxAsGpio,
142 /* Pin Control Register fields [15:0] are not locked */
143 kPORT_UnlockRegister};
144 /* PORTD3 (pin 70) is configured as PTD3 */
145 PORT_SetPinConfig(BOARD_SW2_PORT, BOARD_SW2_PIN, &SW2);
146
147 /* PORTE14 (pin 17) is configured as PTE14 */
148 PORT_SetPinMux(BOARD_SW3_PORT, BOARD_SW3_PIN, kPORT_MuxAsGpio);
149 }
150
151 /* clang-format off */
152 /*
153 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
154 BOARD_InitLEDsPins:
155 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
156 - pin_list:
157 - {pin_num: '34', peripheral: GPIOD, signal: 'GPIO, 12', pin_signal: PTD12/FTM2_CH2/LPUART2_RTS}
158 - {pin_num: '35', peripheral: GPIOD, signal: 'GPIO, 11', pin_signal: PTD11/FTM2_CH1/LPUART2_CTS}
159 - {pin_num: '36', peripheral: GPIOD, signal: 'GPIO, 10', pin_signal: PTD10/FTM2_CH0}
160 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
161 */
162 /* clang-format on */
163
164 /* FUNCTION ************************************************************************************************************
165 *
166 * Function Name : BOARD_InitLEDsPins
167 * Description : Configures pin routing and optionally pin electrical features.
168 *
169 * END ****************************************************************************************************************/
BOARD_InitLEDsPins(void)170 void BOARD_InitLEDsPins(void)
171 {
172 /* Clock Control: Clock enabled */
173 CLOCK_EnableClock(kCLOCK_PortD);
174
175 /* PORTD10 (pin 36) is configured as PTD10 */
176 PORT_SetPinMux(BOARD_LED_RED_PORT, BOARD_LED_RED_PIN, kPORT_MuxAsGpio);
177
178 /* PORTD11 (pin 35) is configured as PTD11 */
179 PORT_SetPinMux(BOARD_LED_GREEN_PORT, BOARD_LED_GREEN_PIN, kPORT_MuxAsGpio);
180
181 /* PORTD12 (pin 34) is configured as PTD12 */
182 PORT_SetPinMux(BOARD_LED_BLUE_PORT, BOARD_LED_BLUE_PIN, kPORT_MuxAsGpio);
183 }
184
185 /* clang-format off */
186 /*
187 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
188 BOARD_InitOSCPins:
189 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
190 - pin_list:
191 - {pin_num: '15', peripheral: SCG, signal: EXTAL0, pin_signal: EXTAL/PTB7/LPI2C0_SCL/LPUART0_TX, drive_strength: no_init, pull_select: no_init, pull_enable: no_init,
192 passive_filter: no_init, digital_filter: no_init}
193 - {pin_num: '16', peripheral: SCG, signal: XTAL0, pin_signal: XTAL/PTB6/LPI2C0_SDA/LPUART0_RX, drive_strength: no_init, pull_select: no_init, pull_enable: no_init,
194 passive_filter: no_init, digital_filter: no_init}
195 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
196 */
197 /* clang-format on */
198
199 /* FUNCTION ************************************************************************************************************
200 *
201 * Function Name : BOARD_InitOSCPins
202 * Description : Configures pin routing and optionally pin electrical features.
203 *
204 * END ****************************************************************************************************************/
BOARD_InitOSCPins(void)205 void BOARD_InitOSCPins(void)
206 {
207 /* Clock Control: Clock enabled */
208 CLOCK_EnableClock(kCLOCK_PortB);
209
210 /* PORTB6 (pin 16) is configured as XTAL */
211 PORT_SetPinMux(BOARD_XTAL_PORT, BOARD_XTAL_PIN, kPORT_PinDisabledOrAnalog);
212
213 /* PORTB7 (pin 15) is configured as EXTAL */
214 PORT_SetPinMux(BOARD_EXTAL_PORT, BOARD_EXTAL_PIN, kPORT_PinDisabledOrAnalog);
215 }
216
217 /* clang-format off */
218 /*
219 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
220 BOARD_InitTHERMISTORPins:
221 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
222 - pin_list:
223 - {pin_num: '40', peripheral: ADC0, signal: 'SE, 10', pin_signal: ADC0_SE10/TSI1_CH23/PTC0/FTM0_CH0}
224 - {pin_num: '39', peripheral: ADC0, signal: 'SE, 8', pin_signal: ADC0_SE8/TSI1_CH24/PTC1/FTM0_CH1}
225 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
226 */
227 /* clang-format on */
228
229 /* FUNCTION ************************************************************************************************************
230 *
231 * Function Name : BOARD_InitTHERMISTORPins
232 * Description : Configures pin routing and optionally pin electrical features.
233 *
234 * END ****************************************************************************************************************/
BOARD_InitTHERMISTORPins(void)235 void BOARD_InitTHERMISTORPins(void)
236 {
237 /* Clock Control: Clock enabled */
238 CLOCK_EnableClock(kCLOCK_PortC);
239
240 /* PORTC0 (pin 40) is configured as ADC0_SE10 */
241 PORT_SetPinMux(PORTC, 0U, kPORT_PinDisabledOrAnalog);
242
243 /* PORTC1 (pin 39) is configured as ADC0_SE8 */
244 PORT_SetPinMux(PORTC, 1U, kPORT_PinDisabledOrAnalog);
245 }
246
247 /* clang-format off */
248 /*
249 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
250 BOARD_InitACCELPins:
251 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
252 - pin_list:
253 - {pin_num: '75', peripheral: GPIOB, signal: 'GPIO, 10', pin_signal: PTB10/FTM0_CH0/LPI2C0_SDAS/FXIO_D0, direction: INPUT, drive_strength: low, pull_select: down,
254 pull_enable: disable, passive_filter: disable, digital_filter: disable}
255 - {pin_num: '76', peripheral: GPIOB, signal: 'GPIO, 9', pin_signal: PTB9/LPI2C0_SCLS/FXIO_D5, direction: OUTPUT, drive_strength: low, pull_select: down, pull_enable: disable,
256 passive_filter: disable, digital_filter: disable}
257 - {pin_num: '77', peripheral: LPI2C0, signal: SCL, pin_signal: PTB8/LPI2C0_SCL/FXIO_D4}
258 - {pin_num: '82', peripheral: LPI2C0, signal: SDA, pin_signal: PTA16/FTM1_CH3/LPI2C0_SDA}
259 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
260 */
261 /* clang-format on */
262
263 /* FUNCTION ************************************************************************************************************
264 *
265 * Function Name : BOARD_InitACCELPins
266 * Description : Configures pin routing and optionally pin electrical features.
267 *
268 * END ****************************************************************************************************************/
BOARD_InitACCELPins(void)269 void BOARD_InitACCELPins(void)
270 {
271 /* Clock Control: Clock enabled */
272 CLOCK_EnableClock(kCLOCK_PortA);
273 /* Clock Control: Clock enabled */
274 CLOCK_EnableClock(kCLOCK_PortB);
275
276 gpio_pin_config_t FXOS_RST_config = {
277 .pinDirection = kGPIO_DigitalOutput,
278 .outputLogic = 0U
279 };
280 /* Initialize GPIO functionality on pin PTB9 (pin 76) */
281 GPIO_PinInit(BOARD_FXOS_RST_GPIO, BOARD_FXOS_RST_PIN, &FXOS_RST_config);
282
283 gpio_pin_config_t FXOS_INT_config = {
284 .pinDirection = kGPIO_DigitalInput,
285 .outputLogic = 0U
286 };
287 /* Initialize GPIO functionality on pin PTB10 (pin 75) */
288 GPIO_PinInit(BOARD_FXOS_INT_GPIO, BOARD_FXOS_INT_PIN, &FXOS_INT_config);
289
290 /* PORTA16 (pin 82) is configured as LPI2C0_SDA */
291 PORT_SetPinMux(BOARD_FXOS_SDA_PORT, BOARD_FXOS_SDA_PIN, kPORT_MuxAlt4);
292
293 const port_pin_config_t FXOS_INT = {/* Internal pull-up/down resistor is disabled */
294 kPORT_PullDisable,
295 /* Passive filter is disabled */
296 kPORT_PassiveFilterDisable,
297 /* Low drive strength is configured */
298 kPORT_LowDriveStrength,
299 /* Pin is configured as PTB10 */
300 kPORT_MuxAsGpio,
301 /* Pin Control Register fields [15:0] are not locked */
302 kPORT_UnlockRegister};
303 /* PORTB10 (pin 75) is configured as PTB10 */
304 PORT_SetPinConfig(BOARD_FXOS_INT_PORT, BOARD_FXOS_INT_PIN, &FXOS_INT);
305
306 /* PORTB8 (pin 77) is configured as LPI2C0_SCL */
307 PORT_SetPinMux(BOARD_FXOS_SCL_PORT, BOARD_FXOS_SCL_PIN, kPORT_MuxAlt4);
308
309 const port_pin_config_t FXOS_RST = {/* Internal pull-up/down resistor is disabled */
310 kPORT_PullDisable,
311 /* Passive filter is disabled */
312 kPORT_PassiveFilterDisable,
313 /* Low drive strength is configured */
314 kPORT_LowDriveStrength,
315 /* Pin is configured as PTB9 */
316 kPORT_MuxAsGpio,
317 /* Pin Control Register fields [15:0] are not locked */
318 kPORT_UnlockRegister};
319 /* PORTB9 (pin 76) is configured as PTB9 */
320 PORT_SetPinConfig(BOARD_FXOS_RST_PORT, BOARD_FXOS_RST_PIN, &FXOS_RST);
321 }
322
323 /* clang-format off */
324 /*
325 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
326 BOARD_InitDEBUG_UARTPins:
327 - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'}
328 - pin_list:
329 - {pin_num: '53', peripheral: LPUART0, signal: TX, pin_signal: TSI1_CH16/PTB1/LPUART0_TX/LPSPI0_SOUT/TCLK0}
330 - {pin_num: '54', peripheral: LPUART0, signal: RX, pin_signal: TSI1_CH15/PTB0/LPUART0_RX/LPSPI0_PCS0/LPTMR0_ALT3/PWT_IN3}
331 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
332 */
333 /* clang-format on */
334
335 /* FUNCTION ************************************************************************************************************
336 *
337 * Function Name : BOARD_InitDEBUG_UARTPins
338 * Description : Configures pin routing and optionally pin electrical features.
339 *
340 * END ****************************************************************************************************************/
BOARD_InitDEBUG_UARTPins(void)341 void BOARD_InitDEBUG_UARTPins(void)
342 {
343 /* Clock Control: Clock enabled */
344 CLOCK_EnableClock(kCLOCK_PortB);
345
346 /* PORTB0 (pin 54) is configured as LPUART0_RX */
347 PORT_SetPinMux(BOARD_UART0_RX_PORT, BOARD_UART0_RX_PIN, kPORT_MuxAlt2);
348
349 /* PORTB1 (pin 53) is configured as LPUART0_TX */
350 PORT_SetPinMux(BOARD_UART0_TX_PORT, BOARD_UART0_TX_PIN, kPORT_MuxAlt2);
351 }
352 /***********************************************************************************************************************
353 * EOF
354 **********************************************************************************************************************/
355
